UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Add more CPU ID which can support SmmFeatureControl,
according to IA32 SDM.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
---
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
index 079baa4..b0c442e 100644
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
@@ -296,7 +296,8 @@ SmmCpuFeaturesInitializeProcessor (
// Intel(R) Core(TM) Processor Family MSRs.
//
if (FamilyId == 0x06) {
- if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46) {
+ if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 ||
+ ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || ModelId == 0x4F) {
//
// Check to see if the CPU supports the SMM Code Access Check feature
// Do not access this MSR unless the CPU supports the SmmRegFeatureControl
--
2.7.4.windows.1
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Jiewen, Besides you added ModelId, we still have the following ModelId support SMM Code Access Check feature in IA32 SDM. Processor: ModelId Goldmont 0x5C HaswellE 0x3F XeonD 0x4F, 0x56 XeonPhi 0x57 Could you also add them into your patch? Thank! Jeff -----Original Message----- From: Yao, Jiewen Sent: Monday, June 12, 2017 10:14 AM To: edk2-devel@lists.01.org Cc: Fan, Jeff; Kinney, Michael D Subject: [PATCH] UefiCpuPkg/SmmCpuFeatureLib: Add more CPU ID for SmmFeatureControl. Add more CPU ID which can support SmmFeatureControl, according to IA32 SDM. Cc: Jeff Fan <jeff.fan@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> --- UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c index 079baa4..b0c442e 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c @@ -296,7 +296,8 @@ SmmCpuFeaturesInitializeProcessor ( // Intel(R) Core(TM) Processor Family MSRs. // if (FamilyId == 0x06) { - if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46) { + if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 || + ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || + ModelId == 0x4F) { // // Check to see if the CPU supports the SMM Code Access Check feature // Do not access this MSR unless the CPU supports the SmmRegFeatureControl -- 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Sure, I will send V2 patch soon. > -----Original Message----- > From: Fan, Jeff > Sent: Tuesday, June 13, 2017 1:32 PM > To: Yao, Jiewen <jiewen.yao@intel.com>; edk2-devel@lists.01.org > Cc: Kinney, Michael D <michael.d.kinney@intel.com> > Subject: RE: [PATCH] UefiCpuPkg/SmmCpuFeatureLib: Add more CPU ID for > SmmFeatureControl. > > Jiewen, > > Besides you added ModelId, we still have the following ModelId support SMM > Code Access Check feature in IA32 SDM. > > Processor: ModelId > Goldmont 0x5C > HaswellE 0x3F > XeonD 0x4F, 0x56 > XeonPhi 0x57 > > Could you also add them into your patch? > > Thank! > Jeff > > -----Original Message----- > From: Yao, Jiewen > Sent: Monday, June 12, 2017 10:14 AM > To: edk2-devel@lists.01.org > Cc: Fan, Jeff; Kinney, Michael D > Subject: [PATCH] UefiCpuPkg/SmmCpuFeatureLib: Add more CPU ID for > SmmFeatureControl. > > Add more CPU ID which can support SmmFeatureControl, according to IA32 SDM. > > Cc: Jeff Fan <jeff.fan@intel.com> > Cc: Michael Kinney <michael.d.kinney@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> > --- > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > index 079baa4..b0c442e 100644 > --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c > @@ -296,7 +296,8 @@ SmmCpuFeaturesInitializeProcessor ( > // Intel(R) Core(TM) Processor Family MSRs. > // > if (FamilyId == 0x06) { > - if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46) { > + if (ModelId == 0x3C || ModelId == 0x45 || ModelId == 0x46 || > + ModelId == 0x3D || ModelId == 0x47 || ModelId == 0x4E || > + ModelId == 0x4F) { > // > // Check to see if the CPU supports the SMM Code Access Check feature > // Do not access this MSR unless the CPU supports the > SmmRegFeatureControl > -- > 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
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