From nobody Sat Jul 12 10:08:48 2025 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; dkim=fail spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1497653840390132.40308755403657; Fri, 16 Jun 2017 15:57:20 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2098321A07A98; Fri, 16 Jun 2017 15:55:57 -0700 (PDT) Received: from NAM01-BY2-obe.outbound.protection.outlook.com (mail-by2nam01on0042.outbound.protection.outlook.com [104.47.34.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4BE1C21A07A98 for ; Fri, 16 Jun 2017 15:55:54 -0700 (PDT) Received: from leduran-Precision-WorkStation-T5400.amd.com (165.204.78.1) by DM5PR12MB1244.namprd12.prod.outlook.com (10.168.237.135) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1178.14; Fri, 16 Jun 2017 22:57:11 +0000 X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amd-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=HoIOAyfHZglsyjrD/BhdDbyMU1a7n1EMAkwXfueBPBY=; b=oAy//5dHcoHebuXGzWCCf1Id94DrxeB/OEZfY1muBdT6Zet6c8XBlupQ9nPrJpjKC8tHn2kWr8BXDQ2hUr9uMRuUuL0a/YNltIFHhcU8d++mY3Q1UIdQesnSY9zyUkWdjfZa5qMOIfKbeyXTvzEE/f84hsJaR7VrUnPXZiUQrTc= Authentication-Results: lists.01.org; dkim=none (message not signed) header.d=none;lists.01.org; dmarc=none action=none header.from=amd.com; From: Leo Duran To: edk2-devel@lists.01.org Date: Fri, 16 Jun 2017 17:57:00 -0500 Message-Id: <1497653820-15192-3-git-send-email-leo.duran@amd.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497653820-15192-1-git-send-email-leo.duran@amd.com> References: <1497653820-15192-1-git-send-email-leo.duran@amd.com> MIME-Version: 1.0 X-Originating-IP: [165.204.78.1] X-ClientProxiedBy: MWHPR1701CA0003.namprd17.prod.outlook.com (10.172.58.13) To DM5PR12MB1244.namprd12.prod.outlook.com (10.168.237.135) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 015f7af9-9694-4546-c476-08d4b50b0655 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(48565401081)(201703131423075)(201703031133081); SRVR:DM5PR12MB1244; X-Microsoft-Exchange-Diagnostics: 1; DM5PR12MB1244; 3:LnfG7bRXl/DTuzOF81uc+xqOHxkhRoQCvOoALkSvUX4HNDcGL4SgCThCmv/CEVxS7U3dWzMSpyAHZo62E62qpMArRhNZfuIBWCpPmpCc2M1QNt9cAVu7y3H6441sFOjTTQTX2/b2k2HSJ1Qqp33VNobwn3PFpttVVkbIaqqAiYwJVWjd0W6QaIocSrOCUvuRZI3b5fFexknJQ7Letpeq6OSJ0EeWd8whptBkIOIJI2y8oBgn/pjAGpcXQvT59r7aBWjVak7hSjj4bmJp/1uanIWOq6iy02aNfNToWixv2tXppWg1BerInTzTCP5ECZLTFYgRxNgjlxHZUrK/Wg8f+RaENUAfvPVMlUf0rzUxijI=; 25:QjEL7aLrdvUKztyXBzndHQKPgrBpPLBtxoroEnfVEEnaE/rkXnufdixlw2tBtomiBqQFhc8vEAkmWisUSFc2jmoQ0RnqS8NLlUK2B0wa/a8YPbk+nIQErQfIg3NFHLV8EL6bYlXcsL6oimSzQBPa62DGdWGfu+cdiHIOLLLJOJxkwyCj2mK4JoUhkzqzsE1Pr9vWPBoNV4tpdSIF5iGbZperyBR82GTqoyTvAj9WBscBQZJ8hTMndFrs6SgwLRUj+TlHwxfwWwqXKCQZPm9OdZY2fWde4hzuY2fCcPS3NI8ETcR4JD1aQdm0/ipTFhp5iX3lt0eC9vv4INpXXWZFCisaXjThh4XNuwemvGE8LAkNSMKp0s45TxNnybNIbTTsTqeWnjEH0T/RJhjDwQMRu6dtDQHJ4in0+fFksAu4tZ3KGKeXxbxhfiIVt1lCNP3jVL7XBWVDa2g/afFA/51vpi2n32xFCiDUFHC2WrLkyig= X-MS-TrafficTypeDiagnostic: DM5PR12MB1244: X-Microsoft-Exchange-Diagnostics: 1; DM5PR12MB1244; 31:LxrnkIkyi+VJFMJYY1Aa8OHo3Gr2Xe5oMJc0cex1hJdqNWPeckZEsoI8+ABW+Rm2tSBalddLWkke4vXe0F5YK5uZk3It+C4Kh8fZ8q7GBMbqH8HhtHXnS7UNI8zwTLZUfb3Ln8ykLt8FyGrJy8nPzag/2YBEUms5Fj6eAfPlHackV48waPaVE3pLGbCSmI+Ch8fzgxsL81SArKD9ujtkzURX+kj/SDYwsdLvrkNsF3Y=; 20:SiFw2GEZfaTMPbGuJiMSoNvk79Z+eDbHA3dAY2fk5KCNxWzJLeV1BgPYGI/DEQ3nnRhaIIQ6+eMGPRIh+DVkxEztqkTP4CtAIRvkS/isACtxRcepSkqOlhS3Wl8F6Ao/Q0NDjb78woyCo3SdNV5//LNjA6XULcjq1eOgsx+NjPo2AoBs0Y8UCtcblGSo0rNxASqMjpnBFYn/fvuJah5TrejDLzWLJnmAAK4cHWw0DDmMudJBpL0kqgTFRwqO20aDBg1XIjLBYfYjDRSuphQxIINljdovBoq6182QlS7NEeWuKUltWor/HwD9aVz9XHx8Ypnf0aMb3EvBCoZabKyvTSQq6PzxQdNV+gRTdMx5V+edwjQfp+QZ5FS6zQymA+FWs1UD4/fuV72pdF+CWzk82WYNL1LRHBLmXNaWCyPeB0lT8p5Pwf+HzwIEk/F3zaSRPiK3tn1THNeqiwT8BSdMPvpDMhcz7WUyMUx/mh1hAUaxdBB/nmJcL7M9Xa9gg41h X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(767451399110)(228905959029699); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(8121501046)(5005006)(93006095)(93001095)(3002001)(100000703101)(100105400095)(10201501046)(6055026)(6041248)(20161123558100)(20161123555025)(20161123564025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123562025)(20161123560025)(6072148)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:DM5PR12MB1244; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:DM5PR12MB1244; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM5PR12MB1244; 4:yOp75uVhnRkgu9GmP1qcDEAWGfNzcnXgVFXHaaMsRr?= =?us-ascii?Q?iZdqBYERsfnvKIKR7qzoJyokfhtoV2OT7tn2+JSCIj8f6MyckmzsK8X0m2Vr?= =?us-ascii?Q?d8QUjzUa2Xo7RvEuHLvUika9VXgvpGos1mfQuPaenn/jXa5BHMLRx+ZpyEK3?= =?us-ascii?Q?g+Tb396wAaigvIKAmr8hhwLY2lUlDrNEy/AyJkWsAHgoSs4y4Nua7C3fEYLw?= =?us-ascii?Q?17NgIomWVippWVls9EXpF7eWWSYKWYpyVdk46Y5C2RwPzu9cExvYFsQrIHI4?= =?us-ascii?Q?L2AIu1x26yb5yWoV9ZKolCfcmawM6G3nm1Bh+g+jGmgxepRoKz+yFh1XUxm1?= =?us-ascii?Q?KqXG9FGA//qXy+ofmZZBUXCCqZgmBarnJgR6cLtTf7ivTnYcA10ak8TVnNqH?= =?us-ascii?Q?EMC3CEsRQQdR1pL7x29TxL7wy4a340JQu5AhF3jtEUkbc8mcBY3JTEzxPLeg?= =?us-ascii?Q?ojtknTaJ4lflcREjXU73qjxCFji3CwJdsqO4XyMV1l1Op0WGDHEp5FyiqVMR?= =?us-ascii?Q?fRl0d+DdPI99rB5YUrmrBB/571BSLdCQVEr288HmMbXat8hhoCkL44ecGw1u?= =?us-ascii?Q?FpBR+Kw4eGYRB+VUmxwNDTkhHYvGO+a60i+vyaRI6mHY8ZFcTX9p69bgFDer?= =?us-ascii?Q?GnYD/K/bUqKiStuH2PkcWAzRWnypqmebYd8gkEphqKKHnE5O9Z1aQzVIJaR6?= =?us-ascii?Q?qIs2jw2SmpJfm1b0XlNRYZ33KLUEXz1QgPPWCltO0Y1faa4bTgrY8dvpyDhj?= =?us-ascii?Q?zVP9riSVZKz5uIAZ4FDeUu6xMfTap0sbFDkj3JWbxdmfGJT/Y3gxa5XzfzfW?= =?us-ascii?Q?5o7Slai4Zpb9XmXUqramPGujWgdlAE1NlxI9e0VHZieOTeCPftll5Yhfrl9F?= =?us-ascii?Q?m2ixg2sCNvZO/MNsJj2v/97bJOsY7xKC8ovKqD5+13OdR4HEc4yoRmBDseGk?= =?us-ascii?Q?N2TCzabaW00Ctsr10Gnk1sDPWgR0m+FIOg6c/Fhl3eXCyBpAr1IbT/tIWEHu?= =?us-ascii?Q?ilw0lzPInvlrkqgYESehfh2Yoa8WYRNQsPHxJgJPzPA2cX5qjHVxgcuWinO6?= =?us-ascii?Q?L2ei7q38R2tTXHTFIp+/XS7WXZIuDPQTwVsWOUEeIgCUvKaVtW+u6VhLjErq?= =?us-ascii?Q?KXE/1ngVj9iZdV6MUebT56bZ62XpSpdnR8xurhnE5mIZ765puAUr9rRaSQUe?= =?us-ascii?Q?VNMMLX2CiEZAHKgPKbGfqFBx+tWTKKrylsDF8R9oqzjKYNL0iq08jTFA=3D?= =?us-ascii?Q?=3D?= X-Forefront-PRVS: 0340850FCD X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6009001)(39850400002)(39840400002)(39860400002)(39400400002)(39410400002)(39450400003)(110136004)(2906002)(5660300001)(38730400002)(8676002)(5003940100001)(25786009)(53936002)(33646002)(81166006)(4326008)(54906002)(86362001)(36756003)(6486002)(6116002)(2351001)(3846002)(47776003)(48376002)(66066001)(50466002)(50226002)(42186005)(478600001)(189998001)(53416004)(6916009)(6666003)(50986999)(2950100002)(2361001)(7736002)(305945005)(76176999)(19627235001); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR12MB1244; H:leduran-Precision-WorkStation-T5400.amd.com; FPR:; SPF:None; MLV:sfv; LANG:en; X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM5PR12MB1244; 23:xh3cqRMoPY9p7OMmvcyURbRyrbNgm7Ue9AH0eIkFN?= =?us-ascii?Q?eaFCt1WUOMH2xZ2Sgn0l4jNyD/iGcqXzWIOj4sjOmbZK7uNUWHf0+nebpyP1?= =?us-ascii?Q?Sn0/FPdDPJGI5TFyYR/izC2+SNn4i9pHqL26Vsza5dBknxDDckj9ubQHUm9X?= =?us-ascii?Q?YkuF0WOK+g+x/nrfFxHtciSpdhdTp790UkV8O6l+VsPkFtuXIKad2X8za3rx?= =?us-ascii?Q?UMP8HprKsH6Qx7sQ0mOOFWXcCJVwT6DfG/TL83O7pY32AtzBY7xsuUc7Yv1q?= =?us-ascii?Q?uleyKlgIp7TrKCyU3M/lbDZ1OFYoYM3yoKaNrIhPajmDvCpjJhs2uSs+GXSV?= =?us-ascii?Q?sC+07GcK/fjmlWKo1mPLT4mFtzywcPNfqPOUUMDS4ZOQQrrLFBr59JiZQ7qZ?= =?us-ascii?Q?9zQj+tO0W/sxU7s1KwLafehbaPrhNReWEdM1ZNkqOZ2A8sQddDV70lu8Oa/3?= =?us-ascii?Q?k0xT7mg63oTgkG/kD77rJa7ityg2HmCZSpbMR3u+/kKsfH/B8ww49zpyeOxd?= =?us-ascii?Q?4fMfJiPB0O+QV5YYDkDPG6lg+sJ9ZTouDY7hNzoLKcmxIJSEZhyMTgCz5qfY?= =?us-ascii?Q?lUZUYXh94pi7jNHMttuWymPyrK6aglBInHw7k6ScXJXUyA97dOLta9r+9kRL?= =?us-ascii?Q?nnL9+23npGR2hVdenTYTsnd+D16YcWKX6druvGdceaqBJ/Q6qu25fS1RLakt?= =?us-ascii?Q?NHhdtFCXeuwD0eKpLKTaSkSNjtofVfWQfPyZggkLM3zv4WJ1JBhyuQscFI03?= =?us-ascii?Q?jGgtSd6I4CK/tIIAvTC7HvPsFn+CTOQ1EIF9NnLDNnzQLqsWOvxh9JQXuzvq?= =?us-ascii?Q?5hLl3GYiroIfsVYtDryYaTdbj+YoxtUCuW4nHRLuey6YRMKO1NXcJdKZU5JT?= =?us-ascii?Q?hdmTp7Z5+Xv4IJc/MXK5FGsmnsw2MFp+637Frht4TNTNY02qC6lsW9s7lSLJ?= =?us-ascii?Q?7duZH4NjvmQvFsAkLA6WPfjoFaD2OY5oVKfeV43b2jKU+ZXaawLEWfCW8rHo?= =?us-ascii?Q?ZgbSTOci31WSxlSmDj+iklXLRG8sjNwhBDegX1Ere5VMwup3EtZNptmLeev3?= =?us-ascii?Q?ejCIt+gyzRHbly9i71Y641l45xRfOxYHOanxOU+qupQmJ9gQEW6cx3Je4kvI?= =?us-ascii?Q?e3qn+wcV4g=3D?= X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM5PR12MB1244; 6:U4PPfAC/vIifeZZcPo+nYHOagsFolH4/mWLPsy6Amj?= =?us-ascii?Q?11VYddbpjrXYGOl7OImatMXq1+alrzzZs61jyzxVePtUrzqSz0bdoPMOG+5u?= =?us-ascii?Q?EQO04I0TwWo45Dwma05Wh9fw3scLPMDkl3QLatYwhweXzPJ8uaSqOxm0iC3O?= =?us-ascii?Q?04ns36AVU9O6n8tztt0JgiD7jpc6KvPhEtD2J+EAAfZ13ZkN7qoK43RTak4p?= =?us-ascii?Q?lsA+DTJ38reEkTKyoS8/iw5AjVUYbPl7ebH2eiXGaKxiRQHvigCbA2qYAVxV?= =?us-ascii?Q?oHXS4U/VGGqZlMH42OhTwCO+pusaER3RhYQVzQcVPdr+RMRxudU/NJ2HQNMG?= =?us-ascii?Q?3LXU0XdFmjGFXzR/qSuOveH46us08wQmlIA7GVF0Jjj2LoDcQbbZQY+STPbz?= =?us-ascii?Q?XH4YoHuzsJHEwdYaaCZtiGStadWJULhLhhYtmN1ys3wKDciZidcIvcNaiCVX?= =?us-ascii?Q?MHQqV5h4vJN2wglrQK7uYQgekgAnE4vWkjJ8o5/a6bRSsiRVXwBgXtV2dqIY?= =?us-ascii?Q?uvxbkFBTppkmKGJ7qCI6gCzrQ3pY1pdsN6ia+QQFOaSSk7xrVqISk1eq5yQA?= =?us-ascii?Q?pICcrnfcIoyWhw+Ug3bYTat04dhhI17RUQV7dtQqu9yGVFxmSsxMBgTP9L9I?= =?us-ascii?Q?SQy0A4dCC0ItE5euYO6/NAFf+0/fddnb5x2q2/lPEkL4kKBWDpAu0cprNbl+?= =?us-ascii?Q?rHzdVciQeWjEE+emfHZpdqcEkrbBQV+NNTyH98EXZ9SmL3HabagHN9rDNysm?= =?us-ascii?Q?Bpr7T5Qw1Hxx6wimKMJeedb35N2nR0ekB00vo8B6kTdYo0cu+VbLxdccQ4Eh?= =?us-ascii?Q?o13VHpgbsuTkiz9KRw07KbHafUNBbaGPK+D2uCanNSEJOcEyHjHxBKR8hIYu?= =?us-ascii?Q?WA5ZFpTA7DcoIN6I81HxPSQ80399/i/5Mk84gJSgNvtXpoIaSXcTQrVTYqlS?= =?us-ascii?Q?eV6wLjnlt0nQVZhgUis2Td78OQKbDeaWMxvzi3iFyI7VUflwnVYuJR9T00KJ?= =?us-ascii?Q?MCZmSt2skTJHy9ET6qVumn?= X-Microsoft-Exchange-Diagnostics: 1; DM5PR12MB1244; 5:uN03VGSohkJg3sTfrHnjI5XqPLDuT/SMmXltCy7NDOxwwHqUpHaq4rFTOMVBxsfSg1gR0E1uXPv4yqv16fq8RD7gdux2tTxPPpeyVUNlaS9yGh8PUaFCVw5evJXYGokw9VA4X8hCsvT7IWsiuRHkUVhH5X+h61E7mGlmT6MuH0ymDOiO/GA/Bw0gsY94k0Pmd/GcegJkr2hfP6jZCBuCoFdxtpXtvIH6aDJkMgqMF9piHX3YHJFG4BoZuMd1J9UMo/cQ1Kqt9J3tushW0L42fo8TkNwfSqbo5gsWJR1xS+6D08MscxVSoGtAjkLAkmBkARTLsl0MT34VUAZLhycilKNaKdYt9PrP4VKR/8WTYwjjI6egWLLnf3jdtC2XHyLvl8UN5KK4OsUoNmFYlJsKlwpH71J/EXUPS3ohY5/hDr+xVtpuu95QnaqYKBPEw/K5s19JMziaHXaxie4WnlAS3yoxIQqDgTN202qj3ku4UhIcF6mnJyPp5/br6UKFtNoX; 24:l2irvHp3n/i45P7bpNR5LqqJV0ypriwPh4bX/RhwWd1iAwjihvsRQ+ABIOzfzlcZ0m+VqcCkyYNvMBQkAsldmz2frq8SgDZeF5q5UxIG0J8= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; DM5PR12MB1244; 7:JOc5CnlKS3GL6OQbeyScYnTxgoaZ7JS9BTJyBQyqfEQIXmS04LD+ucalln9SsRzZxiJefuR8S1LNVMbf56rRzGeph3lNn9tMpHmpIo+PnhlQYqZEQBMD55m8C0+ScTYW5LeYPMt16KLCLdP+Z/iXO+SFkFiFshe1YZMqjvY6+5ccyAkLlFmx69GWM//vYbsfjx18RDorri/QrSJ9FakfH61exGC6qzGmd1qmpl4gbjL7zxREr+SmkTnaQtHVXkcXG2NLk5DjKILVY+br2rBcC9a9uQFvNp+uVXW3blXJngwW48VXaArxkMerpceQ8w3VGD180Et01zflNrE1RMlE2I9qfgWBR3RCQUtbfOuGRq0d68eimBvau0phWyX6fsxJ2xrJu/du9XzbsmZouN5eKKxeo/gjFzw1W9kjZhuKEHvCQspHWvTMNsdMdu4py64v9fIHnKqmSh1XGWtF3pEZP/jXcmHeg5Se8w/GRkcCOMHUI6lub+V6GyuLe0RC5v91BjIc/tNUwgdT4HKgSrOhTBnN6/Wo2bVpSPsrxtztEgLXioQjIhJ87QpAjWN0CWt1nEgjF9rE5VVr7L0nzpjgHOskrxRmfEggL+wiTTF1cSdq7xS8Q3HIAz9SStlKrR+rs5CgSarLa8yCzk+dOn5KdNX6h6GfRIFA6KqLry9uGh1PRH0s6qpPGmz4KoLk8QEQapBWAw2GSVXRB7P/+lRSuy08jEQ6ULGzdHGvT7L7eWY28rjhZrnoM8JM97CSqyVnCrw2YzMbtXNM4+r9/igavfd3dxaM7WHYj9x9/Wq/WMg= X-Microsoft-Exchange-Diagnostics: 1; DM5PR12MB1244; 20:GJpy4JGcYTpH8Zny6XfoFQQxuHon9Kp5Zt352+ehCCupM5jugkMLEpxu7odrUDCCoveQwh3tWiokY9h08RrRs0paxtNoXtijRPiXxgydH+V3J27AhUv5b5s7TOzZH8vfqrevLjI6OrAtZ9F9K/XmhZpPAHW9JFIqUY68FTwlSOTZ20KTPJiWPu3Ae4nkyVFmCYzCM9zxXG5NViftC0b8sSlUnJtxzQKmbf4grCDQkgqEBwwv0AlmYH9S3qQ4OPvO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jun 2017 22:57:11.3353 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1244 Subject: [edk2] [PATCH v4 2/2] UefiCpuPkg: Modify GetProcessorLocationByApicId() to support AMD. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jordan Justen , Leo Duran , Jeff Fan , Liming Gao Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Cc: Jordan Justen Cc: Jeff Fan Cc: Liming Gao Cc: Brijesh Singh Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leo Duran --- UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 140 ++++++++++++++++-= ---- .../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 140 ++++++++++++++++-= ---- 2 files changed, 216 insertions(+), 64 deletions(-) diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Li= brary/BaseXApicLib/BaseXApicLib.c index f81bbb2..898d844 100644 --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c @@ -4,6 +4,8 @@ This local APIC library instance supports xAPIC mode only. =20 Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2017, AMD Inc. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -15,6 +17,7 @@ **/ =20 #include +#include #include #include =20 @@ -966,20 +969,33 @@ GetProcessorLocationByApicId ( OUT UINT32 *Thread OPTIONAL ) { - BOOLEAN TopologyLeafSupported; - UINTN ThreadBits; - UINTN CoreBits; - CPUID_VERSION_INFO_EBX VersionInfoEbx; - CPUID_VERSION_INFO_EDX VersionInfoEdx; - CPUID_CACHE_PARAMS_EAX CacheParamsEax; - CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax; - CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx; - CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx; - UINT32 MaxCpuIdIndex; - UINT32 SubIndex; - UINTN LevelType; - UINT32 MaxLogicProcessorsPerPackage; - UINT32 MaxCoresPerPackage; + BOOLEAN TopologyLeafSupported; + CPUID_VERSION_INFO_EBX VersionInfoEbx; + CPUID_VERSION_INFO_EDX VersionInfoEdx; + CPUID_CACHE_PARAMS_EAX CacheParamsEax; + CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax; + CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx; + CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx; + CPUID_AMD_EXTENDED_CPU_SIG_ECX AmdExtendedCpuSigEcx; + CPUID_AMD_PROCESSOR_TOPOLOGY_EBX AmdProcessorTopologyEbx; + CPUID_AMD_PROCESSOR_TOPOLOGY_ECX AmdProcessorTopologyEcx; + CPUID_AMD_VIR_PHY_ADDRESS_SIZE_ECX AmdVirPhyAddressSizeEcx; + UINT32 SignatureEbx; + UINT32 SignatureEcx; + UINT32 SignatureEdx; + UINT32 MaxStandardCpuIdIndex; + UINT32 MaxExtendedCpuIdIndex; + UINT32 SubIndex; + UINTN LevelType; + UINT32 MaxLogicProcessorsPerPackage; + UINT32 MaxCoresPerPackage; + UINT32 MaxThreadPerPackageMask; + UINT32 ActualThreadPerPackageMask; + UINT32 MaxCoresPerNode; + UINT32 CorePerNodeMask; + UINT32 ApicIdShift; + UINTN ThreadBits; + UINTN CoreBits; =20 // // Check if the processor is capable of supporting more than one logical= processor. @@ -987,10 +1003,10 @@ GetProcessorLocationByApicId ( AsmCpuid(CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32); if (VersionInfoEdx.Bits.HTT =3D=3D 0) { if (Thread !=3D NULL) { - *Thread =3D 0; + *Thread =3D 0; } if (Core !=3D NULL) { - *Core =3D 0; + *Core =3D 0; } if (Package !=3D NULL) { *Package =3D 0; @@ -998,24 +1014,24 @@ GetProcessorLocationByApicId ( return; } =20 + // + // Assume three-level mapping of APIC ID: Package|Core|Thread. + // ThreadBits =3D 0; CoreBits =3D 0; =20 // - // Assume three-level mapping of APIC ID: Package:Core:SMT. + // Get max index of CPUID and vendor's signature // - TopologyLeafSupported =3D FALSE; - - // - // Get the max index of basic CPUID - // - AsmCpuid(CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL); + AsmCpuid(CPUID_SIGNATURE, &MaxStandardCpuIdIndex, &SignatureEbx, &Signat= ureEcx, &SignatureEdx); + AsmCpuid(CPUID_EXTENDED_FUNCTION, &MaxExtendedCpuIdIndex, NULL, NULL, NU= LL); =20 // // If the extended topology enumeration leaf is available, it // is the preferred mechanism for enumerating topology. // - if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { + TopologyLeafSupported =3D FALSE; + if (MaxStandardCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { AsmCpuidEx( CPUID_EXTENDED_TOPOLOGY, 0, @@ -1065,27 +1081,87 @@ GetProcessorLocationByApicId ( } =20 if (!TopologyLeafSupported) { + // + // Get logical processor count + // AsmCpuid(CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL); MaxLogicProcessorsPerPackage =3D VersionInfoEbx.Bits.MaximumAddressabl= eIdsForLogicalProcessors; - if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { - AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL= , NULL); - MaxCoresPerPackage =3D CacheParamsEax.Bits.MaximumAddressableIdsForL= ogicalProcessors + 1; + + // + // Assume single-core processor + // + MaxCoresPerPackage =3D 1; + + // + // Check for topology extensions on AMD processor + // + if (SignatureEbx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_EBX && + SignatureEcx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_ECX && + SignatureEdx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_EDX) { + if (MaxExtendedCpuIdIndex >=3D CPUID_AMD_PROCESSOR_TOPOLOGY) { + AsmCpuid(CPUID_EXTENDED_CPU_SIG, NULL, NULL, &AmdExtendedCpuSigEcx= .Uint32, NULL); + if (AmdExtendedCpuSigEcx.Bits.TopologyExtensions !=3D 0) { + AsmCpuid(CPUID_AMD_PROCESSOR_TOPOLOGY, NULL, &AmdProcessorTopolo= gyEbx.Uint32, + &AmdProcessorTopologyEcx.Uint32, NULL); + // + // Get cores per processor package + // + MaxCoresPerPackage =3D MaxLogicProcessorsPerPackage / (AmdProces= sorTopologyEbx.Bits.ThreadsPerCore + 1); + + // + // Account for actual thread count (e.g., SMT disabled) + // + AsmCpuid(CPUID_VIR_PHY_ADDRESS_SIZE, NULL, NULL, &AmdVirPhyAddre= ssSizeEcx.Uint32, NULL); + MaxThreadPerPackageMask =3D 1 << AmdVirPhyAddressSizeEcx.Bits.Ap= icIdCoreIdSize; + ActualThreadPerPackageMask =3D 1; + while (ActualThreadPerPackageMask < MaxLogicProcessorsPerPackage= ) { + ActualThreadPerPackageMask <<=3D 1; + } + + // + // Adjust APIC Id to report concatenation of Package|Core|Thread. + // + if (ActualThreadPerPackageMask < MaxThreadPerPackageMask) { + MaxCoresPerNode =3D MaxCoresPerPackage / (AmdProcessorTopology= Ecx.Bits.NodesPerProcessor + 1); + + CorePerNodeMask =3D 1; + while (CorePerNodeMask < MaxCoresPerNode) { + CorePerNodeMask <<=3D 1; + } + CorePerNodeMask -=3D 1; + + ApicIdShift =3D 0; + do { + ApicIdShift +=3D 1; + ActualThreadPerPackageMask <<=3D 1; + } while (ActualThreadPerPackageMask < MaxThreadPerPackageMask); + + InitialApicId =3D ((InitialApicId & ~CorePerNodeMask) >> ApicI= dShift) | (InitialApicId & CorePerNodeMask); + } + } + } } else { // - // Must be a single-core processor. + // Extract core count based on CACHE information // - MaxCoresPerPackage =3D 1; + if (MaxStandardCpuIdIndex >=3D CPUID_CACHE_PARAMS) { + AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NU= LL, NULL); + if (CacheParamsEax.Uint32 !=3D 0) { + MaxCoresPerPackage =3D CacheParamsEax.Bits.MaximumAddressableIds= ForLogicalProcessors + 1; + } + } } =20 ThreadBits =3D (UINTN)(HighBitSet32(MaxLogicProcessorsPerPackage / Max= CoresPerPackage - 1) + 1); - CoreBits =3D (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1); } + CoreBits =3D (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1); + } =20 if (Thread !=3D NULL) { - *Thread =3D InitialApicId & ((1 << ThreadBits) - 1); + *Thread =3D InitialApicId & ((1 << ThreadBits) - 1); } if (Core !=3D NULL) { - *Core =3D (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1); + *Core =3D (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1); } if (Package !=3D NULL) { *Package =3D (InitialApicId >> (ThreadBits + CoreBits)); diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/U= efiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index e690d2a..9d3b82f 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -5,6 +5,8 @@ which have xAPIC and x2APIC modes. =20 Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2017, AMD Inc. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -16,6 +18,7 @@ **/ =20 #include +#include #include #include =20 @@ -1061,20 +1064,33 @@ GetProcessorLocationByApicId ( OUT UINT32 *Thread OPTIONAL ) { - BOOLEAN TopologyLeafSupported; - UINTN ThreadBits; - UINTN CoreBits; - CPUID_VERSION_INFO_EBX VersionInfoEbx; - CPUID_VERSION_INFO_EDX VersionInfoEdx; - CPUID_CACHE_PARAMS_EAX CacheParamsEax; - CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax; - CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx; - CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx; - UINT32 MaxCpuIdIndex; - UINT32 SubIndex; - UINTN LevelType; - UINT32 MaxLogicProcessorsPerPackage; - UINT32 MaxCoresPerPackage; + BOOLEAN TopologyLeafSupported; + CPUID_VERSION_INFO_EBX VersionInfoEbx; + CPUID_VERSION_INFO_EDX VersionInfoEdx; + CPUID_CACHE_PARAMS_EAX CacheParamsEax; + CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax; + CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx; + CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx; + CPUID_AMD_EXTENDED_CPU_SIG_ECX AmdExtendedCpuSigEcx; + CPUID_AMD_PROCESSOR_TOPOLOGY_EBX AmdProcessorTopologyEbx; + CPUID_AMD_PROCESSOR_TOPOLOGY_ECX AmdProcessorTopologyEcx; + CPUID_AMD_VIR_PHY_ADDRESS_SIZE_ECX AmdVirPhyAddressSizeEcx; + UINT32 SignatureEbx; + UINT32 SignatureEcx; + UINT32 SignatureEdx; + UINT32 MaxStandardCpuIdIndex; + UINT32 MaxExtendedCpuIdIndex; + UINT32 SubIndex; + UINTN LevelType; + UINT32 MaxLogicProcessorsPerPackage; + UINT32 MaxCoresPerPackage; + UINT32 MaxThreadPerPackageMask; + UINT32 ActualThreadPerPackageMask; + UINT32 MaxCoresPerNode; + UINT32 CorePerNodeMask; + UINT32 ApicIdShift; + UINTN ThreadBits; + UINTN CoreBits; =20 // // Check if the processor is capable of supporting more than one logical= processor. @@ -1082,10 +1098,10 @@ GetProcessorLocationByApicId ( AsmCpuid(CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32); if (VersionInfoEdx.Bits.HTT =3D=3D 0) { if (Thread !=3D NULL) { - *Thread =3D 0; + *Thread =3D 0; } if (Core !=3D NULL) { - *Core =3D 0; + *Core =3D 0; } if (Package !=3D NULL) { *Package =3D 0; @@ -1093,24 +1109,24 @@ GetProcessorLocationByApicId ( return; } =20 + // + // Assume three-level mapping of APIC ID: Package|Core|Thread. + // ThreadBits =3D 0; CoreBits =3D 0; =20 // - // Assume three-level mapping of APIC ID: Package:Core:SMT. + // Get max index of CPUID and vendor's signature // - TopologyLeafSupported =3D FALSE; - - // - // Get the max index of basic CPUID - // - AsmCpuid(CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL); + AsmCpuid(CPUID_SIGNATURE, &MaxStandardCpuIdIndex, &SignatureEbx, &Signat= ureEcx, &SignatureEdx); + AsmCpuid(CPUID_EXTENDED_FUNCTION, &MaxExtendedCpuIdIndex, NULL, NULL, NU= LL); =20 // // If the extended topology enumeration leaf is available, it // is the preferred mechanism for enumerating topology. // - if (MaxCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { + TopologyLeafSupported =3D FALSE; + if (MaxStandardCpuIdIndex >=3D CPUID_EXTENDED_TOPOLOGY) { AsmCpuidEx( CPUID_EXTENDED_TOPOLOGY, 0, @@ -1160,27 +1176,87 @@ GetProcessorLocationByApicId ( } =20 if (!TopologyLeafSupported) { + // + // Get logical processor count + // AsmCpuid(CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL); MaxLogicProcessorsPerPackage =3D VersionInfoEbx.Bits.MaximumAddressabl= eIdsForLogicalProcessors; - if (MaxCpuIdIndex >=3D CPUID_CACHE_PARAMS) { - AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL= , NULL); - MaxCoresPerPackage =3D CacheParamsEax.Bits.MaximumAddressableIdsForL= ogicalProcessors + 1; + + // + // Assume single-core processor + // + MaxCoresPerPackage =3D 1; + + // + // Check for topology extensions on AMD processor + // + if (SignatureEbx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_EBX && + SignatureEcx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_ECX && + SignatureEdx =3D=3D CPUID_SIGNATURE_GENUINE_AMD_EDX) { + if (MaxExtendedCpuIdIndex >=3D CPUID_AMD_PROCESSOR_TOPOLOGY) { + AsmCpuid(CPUID_EXTENDED_CPU_SIG, NULL, NULL, &AmdExtendedCpuSigEcx= .Uint32, NULL); + if (AmdExtendedCpuSigEcx.Bits.TopologyExtensions !=3D 0) { + AsmCpuid(CPUID_AMD_PROCESSOR_TOPOLOGY, NULL, &AmdProcessorTopolo= gyEbx.Uint32, + &AmdProcessorTopologyEcx.Uint32, NULL); + // + // Get cores per processor package + // + MaxCoresPerPackage =3D MaxLogicProcessorsPerPackage / (AmdProces= sorTopologyEbx.Bits.ThreadsPerCore + 1); + + // + // Account for actual thread count (e.g., SMT disabled) + // + AsmCpuid(CPUID_VIR_PHY_ADDRESS_SIZE, NULL, NULL, &AmdVirPhyAddre= ssSizeEcx.Uint32, NULL); + MaxThreadPerPackageMask =3D 1 << AmdVirPhyAddressSizeEcx.Bits.Ap= icIdCoreIdSize; + ActualThreadPerPackageMask =3D 1; + while (ActualThreadPerPackageMask < MaxLogicProcessorsPerPackage= ) { + ActualThreadPerPackageMask <<=3D 1; + } + + // + // Adjust APIC Id to report concatenation of Package|Core|Thread. + // + if (ActualThreadPerPackageMask < MaxThreadPerPackageMask) { + MaxCoresPerNode =3D MaxCoresPerPackage / (AmdProcessorTopology= Ecx.Bits.NodesPerProcessor + 1); + + CorePerNodeMask =3D 1; + while (CorePerNodeMask < MaxCoresPerNode) { + CorePerNodeMask <<=3D 1; + } + CorePerNodeMask -=3D 1; + + ApicIdShift =3D 0; + do { + ApicIdShift +=3D 1; + ActualThreadPerPackageMask <<=3D 1; + } while (ActualThreadPerPackageMask < MaxThreadPerPackageMask); + + InitialApicId =3D ((InitialApicId & ~CorePerNodeMask) >> ApicI= dShift) | (InitialApicId & CorePerNodeMask); + } + } + } } else { // - // Must be a single-core processor. + // Extract core count based on CACHE information // - MaxCoresPerPackage =3D 1; + if (MaxStandardCpuIdIndex >=3D CPUID_CACHE_PARAMS) { + AsmCpuidEx(CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NU= LL, NULL); + if (CacheParamsEax.Uint32 !=3D 0) { + MaxCoresPerPackage =3D CacheParamsEax.Bits.MaximumAddressableIds= ForLogicalProcessors + 1; + } + } } =20 ThreadBits =3D (UINTN)(HighBitSet32(MaxLogicProcessorsPerPackage / Max= CoresPerPackage - 1) + 1); - CoreBits =3D (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1); } + CoreBits =3D (UINTN)(HighBitSet32(MaxCoresPerPackage - 1) + 1); + } =20 if (Thread !=3D NULL) { - *Thread =3D InitialApicId & ((1 << ThreadBits) - 1); + *Thread =3D InitialApicId & ((1 << ThreadBits) - 1); } if (Core !=3D NULL) { - *Core =3D (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1); + *Core =3D (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1); } if (Package !=3D NULL) { *Package =3D (InitialApicId >> (ThreadBits + CoreBits)); --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel