Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
MdeModulePkg/Include/Ppi/SmmAccess.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Include/Ppi/SmmAccess.h b/MdeModulePkg/Include/Ppi/SmmAccess.h
index 085ad64..d91374e 100644
--- a/MdeModulePkg/Include/Ppi/SmmAccess.h
+++ b/MdeModulePkg/Include/Ppi/SmmAccess.h
@@ -128,8 +128,9 @@ EFI_STATUS
///
/// EFI SMM Access PPI is used to control the visibility of the SMRAM on the platform.
-/// It abstracts the location and characteristics of SMRAM. The expectation is
-/// that the north bridge or memory controller would publish this PPI.
+/// It abstracts the location and characteristics of SMRAM. The platform should report
+/// all MMRAM via PEI_SMM_ACCESS_PPI. The expectation is that the north bridge or
+/// memory controller would publish this PPI.
///
struct _PEI_SMM_ACCESS_PPI {
PEI_SMM_OPEN Open;
--
2.7.0.windows.1
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Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Thanks/Ray
> -----Original Message-----
> From: Dong, Eric
> Sent: Wednesday, July 19, 2017 10:38 AM
> To: edk2-devel@lists.01.org
> Cc: Fan, Jeff <jeff.fan@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>
> Subject: [Patch 2/2] MdeModulePkg SmmAccess: Update comments to
> follow PI spec.
>
> Cc: Jeff Fan <jeff.fan@intel.com>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Eric Dong <eric.dong@intel.com>
> ---
> MdeModulePkg/Include/Ppi/SmmAccess.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/MdeModulePkg/Include/Ppi/SmmAccess.h
> b/MdeModulePkg/Include/Ppi/SmmAccess.h
> index 085ad64..d91374e 100644
> --- a/MdeModulePkg/Include/Ppi/SmmAccess.h
> +++ b/MdeModulePkg/Include/Ppi/SmmAccess.h
> @@ -128,8 +128,9 @@ EFI_STATUS
>
> ///
> /// EFI SMM Access PPI is used to control the visibility of the SMRAM on the
> platform.
> -/// It abstracts the location and characteristics of SMRAM. The expectation
> is
> -/// that the north bridge or memory controller would publish this PPI.
> +/// It abstracts the location and characteristics of SMRAM. The platform
> should report
> +/// all MMRAM via PEI_SMM_ACCESS_PPI. The expectation is that the
> north bridge or
> +/// memory controller would publish this PPI.
> ///
> struct _PEI_SMM_ACCESS_PPI {
> PEI_SMM_OPEN Open;
> --
> 2.7.0.windows.1
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