[edk2] [Patch 2/7] Vlv2TbltDevicePkg: Enhance get mtrr mask logic.

Eric Dong posted 7 patches 7 years, 4 months ago
[edk2] [Patch 2/7] Vlv2TbltDevicePkg: Enhance get mtrr mask logic.
Posted by Eric Dong 7 years, 4 months ago
In order to not use the deprecated macro, refine
get mtrr mask value logic.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
 Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c | 45 ++++++++++++++++++++++----
 1 file changed, 38 insertions(+), 7 deletions(-)

diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
index 99bdeb1..5a18a3f 100644
--- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
@@ -70,6 +70,34 @@ GetMemorySize (
   );
 
 
+/**
+  Initializes the valid address mask for MTRRs.
+
+  This function initializes the valid bits mask and valid address mask for MTRRs.
+
+**/
+UINT64
+InitializeAddressMtrrMask (
+  VOID
+  )
+{
+  UINT32                    RegEax;
+  UINT8                     PhysicalAddressBits; 
+  UINT64                    ValidMtrrBitsMask;
+
+  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+
+  if (RegEax >= 0x80000008) {
+    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
+
+    PhysicalAddressBits = (UINT8) RegEax;
+  } else {
+    PhysicalAddressBits = 36;
+  }
+
+  ValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
+  return (ValidMtrrBitsMask & 0xfffffffffffff000ULL);
+}
 
 EFI_STATUS
 EFIAPI
@@ -89,6 +117,7 @@ SetPeiCacheMode (
   UINT64                  HighMemoryLength;
   UINT8                   Index;
   MTRR_SETTINGS           MtrrSetting;
+  UINT64                  ValidMtrrAddressMask;
 
   //
   // Load Cache PPI
@@ -124,6 +153,8 @@ SetPeiCacheMode (
                              &BootMode
                              );
 
+  ValidMtrrAddressMask = InitializeAddressMtrrMask ();
+
   //
   // Determine memory usage
   //
@@ -166,15 +197,15 @@ SetPeiCacheMode (
   //
   Index = 0;
   MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected);
-  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
+  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
   Index ++;
 
   MemOverflow =0;
   while (MaxMemoryLength > MemOverflow){
-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;
+    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
     MemoryLength = MaxMemoryLength - MemOverflow;
     MemoryLength = GetPowerOfTwo64 (MemoryLength);
-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
+    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
 
     MemOverflow += MemoryLength;
     Index++;
@@ -185,15 +216,15 @@ SetPeiCacheMode (
   while (MaxMemoryLength != MemoryLength) {
     MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);
 
-    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheUncacheable;
-    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
+    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable;
+    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
     MaxMemoryLength -= MemoryLengthUc;
     Index++;
   }
 
   MemOverflow =0x100000000;
   while (HighMemoryLength > 0) {
-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;
+    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
     MemoryLength = HighMemoryLength;
     MemoryLength = GetPowerOfTwo64 (MemoryLength);
 
@@ -201,7 +232,7 @@ SetPeiCacheMode (
       MemoryLength = MemOverflow;
     }
 
-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
+    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
 
     MemOverflow += MemoryLength;
     HighMemoryLength -= MemoryLength;
-- 
2.7.0.windows.1

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Re: [edk2] [Patch 2/7] Vlv2TbltDevicePkg: Enhance get mtrr mask logic.
Posted by Ni, Ruiyu 7 years, 4 months ago
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

Thanks/Ray

> -----Original Message-----
> From: Dong, Eric
> Sent: Thursday, August 3, 2017 5:32 PM
> To: edk2-devel@lists.01.org
> Cc: Fan, Jeff <jeff.fan@intel.com>; Ni, Ruiyu <ruiyu.ni@intel.com>; Wei,
> David <david.wei@intel.com>
> Subject: [Patch 2/7] Vlv2TbltDevicePkg: Enhance get mtrr mask logic.
> 
> In order to not use the deprecated macro, refine get mtrr mask value logic.
> 
> Cc: Jeff Fan <jeff.fan@intel.com>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Cc: David Wei <david.wei@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Eric Dong <eric.dong@intel.com>
> ---
>  Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c | 45
> ++++++++++++++++++++++----
>  1 file changed, 38 insertions(+), 7 deletions(-)
> 
> diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
> b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
> index 99bdeb1..5a18a3f 100644
> --- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
> +++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
> @@ -70,6 +70,34 @@ GetMemorySize (
>    );
> 
> 
> +/**
> +  Initializes the valid address mask for MTRRs.
> +
> +  This function initializes the valid bits mask and valid address mask for
> MTRRs.
> +
> +**/
> +UINT64
> +InitializeAddressMtrrMask (
> +  VOID
> +  )
> +{
> +  UINT32                    RegEax;
> +  UINT8                     PhysicalAddressBits;
> +  UINT64                    ValidMtrrBitsMask;
> +
> +  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
> +
> +  if (RegEax >= 0x80000008) {
> +    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
> +
> +    PhysicalAddressBits = (UINT8) RegEax;  } else {
> +    PhysicalAddressBits = 36;
> +  }
> +
> +  ValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;
> +  return (ValidMtrrBitsMask & 0xfffffffffffff000ULL); }
> 
>  EFI_STATUS
>  EFIAPI
> @@ -89,6 +117,7 @@ SetPeiCacheMode (
>    UINT64                  HighMemoryLength;
>    UINT8                   Index;
>    MTRR_SETTINGS           MtrrSetting;
> +  UINT64                  ValidMtrrAddressMask;
> 
>    //
>    // Load Cache PPI
> @@ -124,6 +153,8 @@ SetPeiCacheMode (
>                               &BootMode
>                               );
> 
> +  ValidMtrrAddressMask = InitializeAddressMtrrMask ();
> +
>    //
>    // Determine memory usage
>    //
> @@ -166,15 +197,15 @@ SetPeiCacheMode (
>    //
>    Index = 0;
>    MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32
> (PcdFlashAreaBaseAddress) | CacheWriteProtected);
> -  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32
> (PcdFlashAreaSize) - 1))) & MTRR_LIB_CACHE_VALID_ADDRESS) |
> MTRR_LIB_CACHE_MTRR_ENABLED;
> +  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32
> + (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) |
> + MTRR_LIB_CACHE_MTRR_ENABLED;
>    Index ++;
> 
>    MemOverflow =0;
>    while (MaxMemoryLength > MemOverflow){
> -    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow &
> MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;
> +    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow &
> + ValidMtrrAddressMask) | CacheWriteBack;
>      MemoryLength = MaxMemoryLength - MemOverflow;
>      MemoryLength = GetPowerOfTwo64 (MemoryLength);
> -    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) &
> MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
> +    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) &
> + ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
> 
>      MemOverflow += MemoryLength;
>      Index++;
> @@ -185,15 +216,15 @@ SetPeiCacheMode (
>    while (MaxMemoryLength != MemoryLength) {
>      MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength -
> MemoryLength);
> 
> -    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength -
> MemoryLengthUc) & MTRR_LIB_CACHE_VALID_ADDRESS) |
> CacheUncacheable;
> -    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) &
> MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
> +    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength -
> MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable;
> +    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) &
> ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
>      MaxMemoryLength -= MemoryLengthUc;
>      Index++;
>    }
> 
>    MemOverflow =0x100000000;
>    while (HighMemoryLength > 0) {
> -    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow &
> MTRR_LIB_CACHE_VALID_ADDRESS) | CacheWriteBack;
> +    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow &
> + ValidMtrrAddressMask) | CacheWriteBack;
>      MemoryLength = HighMemoryLength;
>      MemoryLength = GetPowerOfTwo64 (MemoryLength);
> 
> @@ -201,7 +232,7 @@ SetPeiCacheMode (
>        MemoryLength = MemOverflow;
>      }
> 
> -    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) &
> MTRR_LIB_CACHE_VALID_ADDRESS) | MTRR_LIB_CACHE_MTRR_ENABLED;
> +    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) &
> + ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
> 
>      MemOverflow += MemoryLength;
>      HighMemoryLength -= MemoryLength;
> --
> 2.7.0.windows.1

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