Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c | 29 ++++++++++++++++++-------- 1 file changed, 20 insertions(+), 9 deletions(-)
v2 changes include:
1. Use MSR data structure instead of redefin local macro.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
---
Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c | 29 ++++++++++++++++++--------
1 file changed, 20 insertions(+), 9 deletions(-)
diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
index 5a18a3f..6f37e3b 100644
--- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
@@ -196,16 +196,22 @@ SetPeiCacheMode (
// Cache the flash area to improve the boot performance in PEI phase
//
Index = 0;
- MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected);
- MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Uint64 = FixedPcdGet32 (PcdFlashAreaBaseAddress);
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Bits.Type = CacheWriteProtected;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Uint64 = (~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Bits.V = 1;
+
Index ++;
MemOverflow =0;
while (MaxMemoryLength > MemOverflow){
- MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
MemoryLength = MaxMemoryLength - MemOverflow;
MemoryLength = GetPowerOfTwo64 (MemoryLength);
- MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
+
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
MemOverflow += MemoryLength;
Index++;
@@ -216,23 +222,28 @@ SetPeiCacheMode (
while (MaxMemoryLength != MemoryLength) {
MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);
- MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable;
- MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = (MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheUncacheable;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLengthUc - 1)) & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
+
MaxMemoryLength -= MemoryLengthUc;
Index++;
}
MemOverflow =0x100000000;
while (HighMemoryLength > 0) {
- MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
+
MemoryLength = HighMemoryLength;
MemoryLength = GetPowerOfTwo64 (MemoryLength);
-
if (MemoryLength > MemOverflow){
MemoryLength = MemOverflow;
}
- MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;
+ ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
MemOverflow += MemoryLength;
HighMemoryLength -= MemoryLength;
--
2.7.0.windows.1
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Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com> Thanks/Ray > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Eric Dong > Sent: Friday, August 4, 2017 1:59 PM > To: edk2-devel@lists.01.org > Cc: Ni, Ruiyu <ruiyu.ni@intel.com>; Fan, Jeff <jeff.fan@intel.com>; Wei, > David <david.wei@intel.com> > Subject: [edk2] [Patch v2] Vlv2TbltDevicePkg: Remove reference deprecated > macro. > > v2 changes include: > 1. Use MSR data structure instead of redefin local macro. > > Cc: Jeff Fan <jeff.fan@intel.com> > Cc: Ruiyu Ni <ruiyu.ni@intel.com> > Cc: David Wei <david.wei@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Eric Dong <eric.dong@intel.com> > --- > Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c | 29 > ++++++++++++++++++-------- > 1 file changed, 20 insertions(+), 9 deletions(-) > > diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c > b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c > index 5a18a3f..6f37e3b 100644 > --- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c > +++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c > @@ -196,16 +196,22 @@ SetPeiCacheMode ( > // Cache the flash area to improve the boot performance in PEI phase > // > Index = 0; > - MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 > (PcdFlashAreaBaseAddress) | CacheWriteProtected); > - MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 > (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | > MTRR_LIB_CACHE_MTRR_ENABLED; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[0].Base)->Uint64 = FixedPcdGet32 > (PcdFlashAreaBaseAddress); > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[0].Base)->Bits.Type = CacheWriteProtected; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[0].Mask)->Uint64 = (~((UINT64)(FixedPcdGet32 > (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[0].Mask)->Bits.V = 1; > + > Index ++; > > MemOverflow =0; > while (MaxMemoryLength > MemOverflow){ > - MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & > ValidMtrrAddressMask) | CacheWriteBack; > MemoryLength = MaxMemoryLength - MemOverflow; > MemoryLength = GetPowerOfTwo64 (MemoryLength); > - MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & > ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; > + > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & > ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) > & ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1; > > MemOverflow += MemoryLength; > Index++; > @@ -216,23 +222,28 @@ SetPeiCacheMode ( > while (MaxMemoryLength != MemoryLength) { > MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - > MemoryLength); > > - MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - > MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable; > - MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc - 1)) & > ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = (MaxMemoryLength - > MemoryLengthUc) & ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheUncacheable; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLengthUc - > 1)) & ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1; > + > MaxMemoryLength -= MemoryLengthUc; > Index++; > } > > MemOverflow =0x100000000; > while (HighMemoryLength > 0) { > - MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & > ValidMtrrAddressMask) | CacheWriteBack; > + > MemoryLength = HighMemoryLength; > MemoryLength = GetPowerOfTwo64 (MemoryLength); > - > if (MemoryLength > MemOverflow){ > MemoryLength = MemOverflow; > } > > - MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & > ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & > ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) > & ValidMtrrAddressMask; > + ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) > &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1; > > MemOverflow += MemoryLength; > HighMemoryLength -= MemoryLength; > -- > 2.7.0.windows.1 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
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