[edk2] [platforms: PATCH 5/7] Platforms/Marvell: Update ethernet ports types on A70x0 DB

Marcin Wojtas posted 7 patches 7 years, 3 months ago
There is a newer version of this series
[edk2] [platforms: PATCH 5/7] Platforms/Marvell: Update ethernet ports types on A70x0 DB
Posted by Marcin Wojtas 7 years, 3 months ago
Modify ethernet Port0 and Port1 types to be on par with the board
settings. Initial support required extra extension boards and
converters. This patch sets ports to following settings:

* Port0 (eth0) -> SFI @ 10Gbps
* Port1 (eth1) -> SGMII over 88E1512 PHY @ 1Gbps

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Armada/Armada70x0.dsc | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
index d77e0b6..bbe6ba5 100644
--- a/Platform/Marvell/Armada/Armada70x0.dsc
+++ b/Platform/Marvell/Armada/Armada70x0.dsc
@@ -101,8 +101,8 @@
 
   #ComPhy
   gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
-  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SGMII0;SATA1;USB3_HOST1;PCIE2"
-  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"3125;5000;1250;5000;5000;5000"
+  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SFI;SATA1;USB3_HOST1;PCIE2"
+  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"1250;5000;10310;5000;5000;5000"
 
   #UtmiPhy
   gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2
@@ -115,7 +115,7 @@
   gMarvellTokenSpaceGuid.PcdMdioBaseAddress|0xF212A200
 
   #PHY
-  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x4, 0x4, 0x0 }
+  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x8, 0x4, 0x0 }
   gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 }
   gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE
 
@@ -123,8 +123,8 @@
   gMarvellTokenSpaceGuid.PcdPhySmiAddresses|{ 0xff, 0x0, 0x1 }
   gMarvellTokenSpaceGuid.PcdPp2ClockFrequency|333333333
   gMarvellTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 }
-  gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x1, 0x1, 0x0 }
-  gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ 0x3, 0x4, 0x3 }
+  gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x0, 0x0, 0x0 }
+  gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ 0x5, 0x3, 0x3 }
   gMarvellTokenSpaceGuid.PcdPp2NumPorts|3
   gMarvellTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 }
   gMarvellTokenSpaceGuid.PcdPp2SharedAddress|0xf2000000
-- 
1.8.3.1

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Re: [edk2] [platforms: PATCH 5/7] Platforms/Marvell: Update ethernet ports types on A70x0 DB
Posted by Ard Biesheuvel 7 years, 3 months ago
On 1 September 2017 at 03:37, Marcin Wojtas <mw@semihalf.com> wrote:
> Modify ethernet Port0 and Port1 types to be on par with the board
> settings. Initial support required extra extension boards and
> converters. This patch sets ports to following settings:
>
> * Port0 (eth0) -> SFI @ 10Gbps
> * Port1 (eth1) -> SGMII over 88E1512 PHY @ 1Gbps
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

> ---
>  Platform/Marvell/Armada/Armada70x0.dsc | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
> index d77e0b6..bbe6ba5 100644
> --- a/Platform/Marvell/Armada/Armada70x0.dsc
> +++ b/Platform/Marvell/Armada/Armada70x0.dsc
> @@ -101,8 +101,8 @@
>
>    #ComPhy
>    gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
> -  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SGMII0;SATA1;USB3_HOST1;PCIE2"
> -  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"3125;5000;1250;5000;5000;5000"
> +  gMarvellTokenSpaceGuid.PcdChip0ComPhyTypes|L"SGMII1;USB3_HOST0;SFI;SATA1;USB3_HOST1;PCIE2"
> +  gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|L"1250;5000;10310;5000;5000;5000"
>
>    #UtmiPhy
>    gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2
> @@ -115,7 +115,7 @@
>    gMarvellTokenSpaceGuid.PcdMdioBaseAddress|0xF212A200
>
>    #PHY
> -  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x4, 0x4, 0x0 }
> +  gMarvellTokenSpaceGuid.PcdPhyConnectionTypes|{ 0x8, 0x4, 0x0 }
>    gMarvellTokenSpaceGuid.PcdPhyDeviceIds|{ 0x0, 0x0 }
>    gMarvellTokenSpaceGuid.PcdPhyStartupAutoneg|FALSE
>
> @@ -123,8 +123,8 @@
>    gMarvellTokenSpaceGuid.PcdPhySmiAddresses|{ 0xff, 0x0, 0x1 }
>    gMarvellTokenSpaceGuid.PcdPp2ClockFrequency|333333333
>    gMarvellTokenSpaceGuid.PcdPp2GopIndexes|{ 0x0, 0x2, 0x3 }
> -  gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x1, 0x1, 0x0 }
> -  gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ 0x3, 0x4, 0x3 }
> +  gMarvellTokenSpaceGuid.PcdPp2InterfaceAlwaysUp|{ 0x0, 0x0, 0x0 }
> +  gMarvellTokenSpaceGuid.PcdPp2InterfaceSpeed|{ 0x5, 0x3, 0x3 }
>    gMarvellTokenSpaceGuid.PcdPp2NumPorts|3
>    gMarvellTokenSpaceGuid.PcdPp2PortIds|{ 0x0, 0x1, 0x2 }
>    gMarvellTokenSpaceGuid.PcdPp2SharedAddress|0xf2000000
> --
> 1.8.3.1
>
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