[edk2] [platforms: PATCH 05/11] Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash

Marcin Wojtas posted 11 patches 7 years, 3 months ago
[edk2] [platforms: PATCH 05/11] Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash
Posted by Marcin Wojtas 7 years, 3 months ago
This patch makes use of recently added SPI configuration
PCDs and sets CS with SCLK mode on Armada 7040 DB.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Armada/Armada70x0.dsc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
index f519196..df2ebdb 100644
--- a/Platform/Marvell/Armada/Armada70x0.dsc
+++ b/Platform/Marvell/Armada/Armada70x0.dsc
@@ -98,6 +98,8 @@
   gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536
   gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256
   gMarvellTokenSpaceGuid.PcdSpiFlashId|0x20BA18
+  gMarvellTokenSpaceGuid.PcdSpiFlashMode|3
+  gMarvellTokenSpaceGuid.PcdSpiFlashCs|0
 
   #ComPhy
   gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
-- 
1.8.3.1

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Re: [edk2] [platforms: PATCH 05/11] Platform/Marvell/Armada70x0: set CS and SCLK Mode for SPI flash
Posted by Leif Lindholm 7 years, 3 months ago
On Fri, Sep 01, 2017 at 03:08:17PM +0200, Marcin Wojtas wrote:
> This patch makes use of recently added SPI configuration
> PCDs and sets CS with SCLK mode on Armada 7040 DB.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> ---
>  Platform/Marvell/Armada/Armada70x0.dsc | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Armada/Armada70x0.dsc
> index f519196..df2ebdb 100644
> --- a/Platform/Marvell/Armada/Armada70x0.dsc
> +++ b/Platform/Marvell/Armada/Armada70x0.dsc
> @@ -98,6 +98,8 @@
>    gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536
>    gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256
>    gMarvellTokenSpaceGuid.PcdSpiFlashId|0x20BA18
> +  gMarvellTokenSpaceGuid.PcdSpiFlashMode|3
> +  gMarvellTokenSpaceGuid.PcdSpiFlashCs|0
>  
>    #ComPhy
>    gMarvellTokenSpaceGuid.PcdComPhyDevices|{ 0x1 }
> -- 
> 1.8.3.1
> 
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