Add a FixedPCD to replace an Intel-specific hard-coded macro.
The new PCD allows SMM support on AMD-based x86 systems.
PcdCpuSmmSmramSaveStateMapOffset - SMRAM Save State Map Offset.
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
UefiCpuPkg/Include/Register/SmramSaveStateMap.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Include/Register/SmramSaveStateMap.h b/UefiCpuPkg/Include/Register/SmramSaveStateMap.h
index a7c7562..2167f33 100644
--- a/UefiCpuPkg/Include/Register/SmramSaveStateMap.h
+++ b/UefiCpuPkg/Include/Register/SmramSaveStateMap.h
@@ -8,6 +8,8 @@ Intel(R) 64 and IA-32 Architectures Software Developer's Manual
Volume 3C, Section 34.7 Managing Synchronous and Asynchronous SMIs
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -34,7 +36,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
///
/// Offset of SMRAM Save State Map from SMBASE
///
-#define SMRAM_SAVE_STATE_MAP_OFFSET 0xfc00
+#define SMRAM_SAVE_STATE_MAP_OFFSET (FixedPcdGet16 (PcdCpuSmmSmramSaveStateMapOffset))
#pragma pack (1)
--
2.7.4
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel