Add a FixedPCD to replace an Intel-specific hard-coded macro.
The new PCD allows SMM support on AMD-based x86 systems.

PcdCpuSmmPSDOffset - Processor SMM Descriptor Offset in SMRAM.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leo Duran <leo.duran@amd.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S    | 4 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm  | 4 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 4 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S     | 4 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm   | 4 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm  | 4 +++-
 6 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
index 3243a91..25af6e7 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.S
@@ -1,6 +1,8 @@
 #------------------------------------------------------------------------------
 #
 # Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
 # This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
 # which accompanies this distribution.  The full text of the license may be found at
@@ -35,7 +37,7 @@ ASM_GLOBAL  ASM_PFX(gSmiHandlerIdtr)
 #
 # Constants relating to PROCESSOR_SMM_DESCRIPTOR
 #
-.equ            DSC_OFFSET, 0xfb00
+.equ            DSC_OFFSET, (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 .equ            DSC_GDTPTR, 0x30
 .equ            DSC_GDTSIZ, 0x38
 .equ            DSC_CS, 14
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
index 8296f36..f526778 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm
@@ -1,5 +1,7 @@
 ;------------------------------------------------------------------------------ ;
 ; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -29,7 +31,7 @@ MSR_EFER_XD   EQU     0800h
 ;
 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
 ;
-DSC_OFFSET    EQU     0fb00h
+DSC_OFFSET    EQU     (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 DSC_GDTPTR    EQU     30h
 DSC_GDTSIZ    EQU     38h
 DSC_CS        EQU     14
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
index 4d2383f..9092dcc 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
@@ -1,5 +1,7 @@
 ;------------------------------------------------------------------------------ ;
 ; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -25,7 +27,7 @@
 ;
 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
 ;
-%define DSC_OFFSET 0xfb00
+%define DSC_OFFSET (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 %define DSC_GDTPTR 0x30
 %define DSC_GDTSIZ 0x38
 %define DSC_CS 14
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
index 600d862..ebea477 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.S
@@ -1,6 +1,8 @@
 #------------------------------------------------------------------------------
 #
 # Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+#
 # This program and the accompanying materials
 # are licensed and made available under the terms and conditions of the BSD License
 # which accompanies this distribution.  The full text of the license may be found at
@@ -34,7 +36,7 @@ ASM_GLOBAL  ASM_PFX(gSmiHandlerIdtr)
 #
 # Constants relating to PROCESSOR_SMM_DESCRIPTOR
 #
-.equ            DSC_OFFSET, 0xfb00
+.equ            DSC_OFFSET, (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 .equ            DSC_GDTPTR, 0x30
 .equ            DSC_GDTSIZ, 0x38
 .equ            DSC_CS, 14
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
index c74f82a..ff46838 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.asm
@@ -1,5 +1,7 @@
 ;------------------------------------------------------------------------------ ;
 ; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -39,7 +41,7 @@ MSR_EFER_XD   EQU     0800h
 ;
 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
 ;
-DSC_OFFSET    EQU     0fb00h
+DSC_OFFSET    EQU     (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 DSC_GDTPTR    EQU     30h
 DSC_GDTSIZ    EQU     38h
 DSC_CS        EQU     14
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
index c3c094f..f55da9b 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm
@@ -1,5 +1,7 @@
 ;------------------------------------------------------------------------------ ;
 ; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+;
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -29,7 +31,7 @@
 ;
 ; Constants relating to PROCESSOR_SMM_DESCRIPTOR
 ;
-%define DSC_OFFSET 0xfb00
+%define DSC_OFFSET (FixedPcdGet16 (PcdCpuSmmPSDOffset))
 %define DSC_GDTPTR 0x30
 %define DSC_GDTSIZ 0x38
 %define DSC_CS 14
-- 
2.7.4

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