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charset="utf-8" Consume a FixedPCD to replace Intel-specific macro. The new PCD will allow SMM support on AMD-based x86 systems. PcdCpuSmmSmramSaveStateMapOffset - SMRAM Save State Map Offset. Cc: Jiewen Yao Cc: Ruiyu Ni Cc: Michael D Kinney Cc: Jordan Justen Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran --- UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c b/Uef= iCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c index 2d2bc6d..88f43b4 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c @@ -2,6 +2,8 @@ The CPU specific programming for PiSmmCpuDxeSmm module. =20 Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -224,7 +226,7 @@ SmmCpuFeaturesInitializeProcessor ( // // Configure SMBASE. // - CpuState =3D (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_= SAVE_STATE_MAP_OFFSET); + CpuState =3D (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + FixedP= cdGet16 (PcdCpuSmmSmramSaveStateMapOffset)); CpuState->x86.SMBASE =3D (UINT32)CpuHotPlugData->SmBase[CpuIndex]; =20 // --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel