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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id y17sm930370lfj.0.2017.10.08.03.49.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 08 Oct 2017 03:49:53 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::232; helo=mail-lf0-x232.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n5YUNv5BiVULFYtT5tzR1WMWRVEz1B8cBZuhyHjYZD8=; b=ep993a/ROL8J1zYH98W3MRiJQlQifXawRN/6Lb9g14+f6HXL/Sj7KtJz2Vn/jEZm94 VJ+T1PnMJNPzmhDc3BY/EZlK64hxES55LW5ugUGR/OdB9WQnsNYOhI5etJv0BelQIB/H sqYFcUTNDG4N5R/FUR74yxEOMwjYMso02LQZpXR5PmQJtwA6+26VEs57DWrnW+XccFx8 oGXApolOizCpwreuopGWOB6M8LB7gSdmSrB33U+L6uA4Mi0UJ+ScaHpxZmN5J1RvXNOk CePyIyeWRO7GzOykTD6rP08uHrlUmxg+s3mk/82iGZNTfNPq0JN0bCX/x6Yc+pEYp5Ur VtUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n5YUNv5BiVULFYtT5tzR1WMWRVEz1B8cBZuhyHjYZD8=; b=nerVELjOZuMKwh7JgLREff24bEiZQJhCjteEtVDvpRmF4FWbm+cHW79F9myqNn0n28 GvWOh1kTm6oIJuWaiq3gyLHE8XJYjeuwekP618rXZOJ5YP4NNIj95hKnsOj8zDHpCn9v z/9uwi90tbmSifVB0g8rIE9Kf0QgK6q6HAXv3p6ovICk9i6eY+t8mIL34BEcRSjIQ2KL yzEdw3/8yZ+/0ttfb08nQ69pGFT3Hngtiz4PajhbJqA901sBRE80zeKmMQj7Urs400BW ElFubrb/fiDT6Z/hMZIdewjwuXRCTj+V6XsuIn4SwG/yUYXjcYdIT/DbJDiX4X12FirZ wq9g== X-Gm-Message-State: AMCzsaXLkPMN3uK3YDdvPaXw6bZu55iYpW38gGqHAUek8TYIBTqaE4tg Cc8PvLZFaK4ii0U3R/wvK4947zIEPMU= X-Google-Smtp-Source: AOwi7QB3tVB2KH7+x+y833UByOB5JazhMjGR8i+DqP0nRXBh56vmOtVqVDO7922b/ueOGsWlEfJGTA== X-Received: by 10.25.59.208 with SMTP id d77mr2523397lfl.189.1507459793759; Sun, 08 Oct 2017 03:49:53 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Sun, 8 Oct 2017 12:56:50 +0200 Message-Id: <1507460212-10323-4-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1507460212-10323-1-git-send-email-mw@semihalf.com> References: <1507460212-10323-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 3/5] Marvell/Library: UtmiLib: Move devices description to MvHwDescLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This patch introduces UTMI description, using the new structures and template in MvHwDescLib. This change enables more flexible addition of multiple CP with UTMI PHY's and also significantly reduces amount of used PCD's for that purpose. Update PortingGuide documentation accordingly. This patch replaces string-based description of Utmi on Armada 70x0 DB with new, reduced format, which uses macros in Armada.dsc.inc file for better readability. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada/Armada.dsc.inc | 5 + Platform/Marvell/Armada/Armada70x0.dsc | 7 +- Platform/Marvell/Include/Library/MvHwDescLib.h | 47 ++++++ Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c | 150 ++++++++++-------= --- Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h | 1 - Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf | 11 +- Platform/Marvell/Marvell.dec | 7 +- Silicon/Marvell/Documentation/PortingGuide.txt | 30 ++-- 8 files changed, 148 insertions(+), 110 deletions(-) diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Arma= da/Armada.dsc.inc index cd26506..7d0dc39 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -523,3 +523,8 @@ DEFINE CP_RXAUI0 =3D 0x15 DEFINE CP_RXAUI1 =3D 0x16 DEFINE CP_SFI =3D 0x17 + + #UTMI PHY connection type + DEFINE UTMI_USB_HOST0 =3D 0x0 + DEFINE UTMI_USB_HOST1 =3D 0x1 + DEFINE UTMI_USB_DEVICE0 =3D 0x2 diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Arma= da/Armada70x0.dsc index c11a973..b40766b 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -111,11 +111,8 @@ gMarvellTokenSpaceGuid.PcdChip0ComPhySpeeds|{ $(CP_1_25G), $(CP_5G), $(C= P_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) } =20 #UtmiPhy - gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2 - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg|L"0xF2440420;0xF2440420" - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg|L"0xF2440440;0xF2440444" - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit|L"0xF2580000;0xF2581000" - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort|L"0x0;0x1" + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1 } + gMarvellTokenSpaceGuid.PcdUtmiPortType|{ $(UTMI_USB_HOST0), $(UTMI_USB_H= OST1) } =20 #MDIO gMarvellTokenSpaceGuid.PcdMdioBaseAddress|0xF212A200 diff --git a/Platform/Marvell/Include/Library/MvHwDescLib.h b/Platform/Marv= ell/Include/Library/MvHwDescLib.h index e029b50..6ad1bc2 100644 --- a/Platform/Marvell/Include/Library/MvHwDescLib.h +++ b/Platform/Marvell/Include/Library/MvHwDescLib.h @@ -117,6 +117,19 @@ typedef struct { } MVHW_RTC_DESC; =20 // +// UTMI PHY's description template definition +// + +typedef struct { + UINT8 UtmiDevCount; + UINT32 UtmiPhyId[MVHW_MAX_XHCI_DEVS]; + UINTN UtmiBaseAddresses[MVHW_MAX_XHCI_DEVS]; + UINTN UtmiConfigAddresses[MVHW_MAX_XHCI_DEVS]; + UINTN UtmiUsbConfigAddresses[MVHW_MAX_XHCI_DEVS]; + UINTN UtmiMuxBitCount[MVHW_MAX_XHCI_DEVS]; +} MVHW_UTMI_DESC; + +// // Platform description of CommonPhy devices // #define MVHW_CP0_COMPHY_BASE 0xF2441000 @@ -217,4 +230,38 @@ MVHW_RTC_DESC mA7k8kRtcDescTemplate =3D {\ { SIZE_4KB, SIZE_4KB }\ } =20 +// +// Platform description of UTMI PHY's +// +#define MVHW_CP0_UTMI0_BASE 0xF2580000 +#define MVHW_CP0_UTMI0_CFG_BASE 0xF2440440 +#define MVHW_CP0_UTMI0_USB_CFG_BASE 0xF2440420 +#define MVHW_CP0_UTMI0_ID 0x0 +#define MVHW_CP0_UTMI1_BASE 0xF2581000 +#define MVHW_CP0_UTMI1_CFG_BASE 0xF2440444 +#define MVHW_CP0_UTMI1_USB_CFG_BASE 0xF2440420 +#define MVHW_CP0_UTMI1_ID 0x1 +#define MVHW_CP1_UTMI0_BASE 0xF4580000 +#define MVHW_CP1_UTMI0_CFG_BASE 0xF4440440 +#define MVHW_CP1_UTMI0_USB_CFG_BASE 0xF4440420 +#define MVHW_CP1_UTMI0_ID 0x0 +#define MVHW_CP1_UTMI1_BASE 0xF4581000 +#define MVHW_CP1_UTMI1_CFG_BASE 0xF4440444 +#define MVHW_CP1_UTMI1_USB_CFG_BASE 0xF4440420 +#define MVHW_CP1_UTMI1_ID 0x1 + +#define DECLARE_A7K8K_UTMI_TEMPLATE \ +STATIC \ +MVHW_UTMI_DESC mA7k8kUtmiDescTemplate =3D {\ + 4,\ + { MVHW_CP0_UTMI0_ID, MVHW_CP0_UTMI1_ID,\ + MVHW_CP1_UTMI0_ID, MVHW_CP1_UTMI1_ID },\ + { MVHW_CP0_UTMI0_BASE, MVHW_CP0_UTMI1_BASE,\ + MVHW_CP1_UTMI0_BASE, MVHW_CP1_UTMI1_BASE },\ + { MVHW_CP0_UTMI0_CFG_BASE, MVHW_CP0_UTMI1_CFG_BASE,\ + MVHW_CP1_UTMI0_CFG_BASE, MVHW_CP1_UTMI1_CFG_BASE },\ + { MVHW_CP0_UTMI0_USB_CFG_BASE, MVHW_CP0_UTMI1_USB_CFG_BASE,\ + MVHW_CP1_UTMI0_USB_CFG_BASE, MVHW_CP1_UTMI1_USB_CFG_BASE }\ +} + #endif /* __MVHWDESCLIB_H__ */ diff --git a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c b/Platform/Ma= rvell/Library/UtmiPhyLib/UtmiPhyLib.c index 95b5698..f1819c4 100644 --- a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c +++ b/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.c @@ -33,12 +33,16 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DA= MAGE. **************************************************************************= *****/ =20 #include "UtmiPhyLib.h" +#include + +DECLARE_A7K8K_UTMI_TEMPLATE; =20 typedef struct { EFI_PHYSICAL_ADDRESS UtmiBaseAddr; EFI_PHYSICAL_ADDRESS UsbCfgAddr; EFI_PHYSICAL_ADDRESS UtmiCfgAddr; UINT32 UtmiPhyPort; + UINT32 PhyId; } UTMI_PHY_DATA; =20 STATIC @@ -236,48 +240,52 @@ UtmiPhyPowerUp ( STATIC VOID Cp110UtmiPhyInit ( - IN UINT32 UtmiPhyCount, IN UTMI_PHY_DATA *UtmiData ) { - UINT32 i; + EFI_STATUS Status; =20 - for (i =3D 0; i < UtmiPhyCount; i++) { - UtmiPhyPowerDown(i, UtmiData[i].UtmiBaseAddr, - UtmiData[i].UsbCfgAddr, UtmiData[i].UtmiCfgAddr, - UtmiData[i].UtmiPhyPort); - } + UtmiPhyPowerDown ( + UtmiData->PhyId, + UtmiData->UtmiBaseAddr, + UtmiData->UsbCfgAddr, + UtmiData->UtmiCfgAddr, + UtmiData->UtmiPhyPort + ); =20 /* Power down PLL */ DEBUG((DEBUG_INFO, "UtmiPhy: stage: PHY power down PLL\n")); - RegSet (UtmiData[0].UsbCfgAddr, 0x0 << UTMI_USB_CFG_PLL_OFFSET, - UTMI_USB_CFG_PLL_MASK); - - for (i =3D 0; i < UtmiPhyCount; i++) { - UtmiPhyConfig(i, UtmiData[i].UtmiBaseAddr, - UtmiData[i].UsbCfgAddr, UtmiData[i].UtmiCfgAddr, - UtmiData[i].UtmiPhyPort); + MmioAnd32 (UtmiData->UsbCfgAddr, ~UTMI_USB_CFG_PLL_MASK); + + UtmiPhyConfig ( + UtmiData->PhyId, + UtmiData->UtmiBaseAddr, + UtmiData->UsbCfgAddr, + UtmiData->UtmiCfgAddr, + UtmiData->UtmiPhyPort + ); + + Status =3D UtmiPhyPowerUp ( + UtmiData->PhyId, + UtmiData->UtmiBaseAddr, + UtmiData->UsbCfgAddr, + UtmiData->UtmiCfgAddr, + UtmiData->UtmiPhyPort + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "UtmiPhy: Failed to initialize UTMI PHY %d\n", Ut= miData->PhyId)); + return; } =20 - for (i =3D 0; i < UtmiPhyCount; i++) { - if (EFI_ERROR(UtmiPhyPowerUp(i, UtmiData[i].UtmiBaseAddr, - UtmiData[i].UsbCfgAddr, UtmiData[i].UtmiCfgAddr, - UtmiData[i].UtmiPhyPort))) { - DEBUG((DEBUG_ERROR, "UtmiPhy: Failed to initialize UTMI PHY %d\n", i= )); - continue; - } - DEBUG((DEBUG_ERROR, "UTMI PHY %d initialized to ", i)); - - if (UtmiData[i].UtmiPhyPort =3D=3D UTMI_PHY_TO_USB_DEVICE0) - DEBUG((DEBUG_ERROR, "USB Device\n")); - else - DEBUG((DEBUG_ERROR, "USB Host%d\n", UtmiData[i].UtmiPhyPort)); - } + DEBUG ((DEBUG_ERROR, "UTMI PHY %d initialized to ", UtmiData->PhyId)); + if (UtmiData->UtmiPhyPort =3D=3D UTMI_PHY_TO_USB_DEVICE0) + DEBUG((DEBUG_ERROR, "USB Device\n")); + else + DEBUG((DEBUG_ERROR, "USB Host%d\n", UtmiData->UtmiPhyPort)); =20 /* Power up PLL */ DEBUG((DEBUG_INFO, "UtmiPhy: stage: PHY power up PLL\n")); - RegSet (UtmiData[0].UsbCfgAddr, 0x1 << UTMI_USB_CFG_PLL_OFFSET, - UTMI_USB_CFG_PLL_MASK); + MmioOr32 (UtmiData->UsbCfgAddr, UTMI_USB_CFG_PLL_MASK); } =20 EFI_STATUS @@ -285,69 +293,67 @@ UtmiPhyInit ( VOID ) { - EFI_STATUS Status; - UTMI_PHY_DATA UtmiData[PcdGet32 (PcdUtmiPhyCount)]; - EFI_PHYSICAL_ADDRESS RegUtmiUnit[PcdGet32 (PcdUtmiPhyCount)]; - EFI_PHYSICAL_ADDRESS RegUsbCfg[PcdGet32 (PcdUtmiPhyCount)]; - EFI_PHYSICAL_ADDRESS RegUtmiCfg[PcdGet32 (PcdUtmiPhyCount)]; - UINTN UtmiPort[PcdGet32 (PcdUtmiPhyCount)]; - UINTN i, Count; - - Count =3D PcdGet32 (PcdUtmiPhyCount); - if (Count =3D=3D 0) { + UTMI_PHY_DATA UtmiData; + UINT8 *UtmiDeviceTable, *XhciDeviceTable, *UtmiPortType, Index; + MVHW_UTMI_DESC *Desc =3D &mA7k8kUtmiDescTemplate; + + /* Obtain table with enabled Utmi PHY's*/ + UtmiDeviceTable =3D (UINT8 *)PcdGetPtr (PcdUtmiControllersEnabled); + if (UtmiDeviceTable =3D=3D NULL) { /* No UTMI PHY on platform */ return EFI_SUCCESS; } =20 - DEBUG((DEBUG_INFO, "UtmiPhy: Initialize USB UTMI PHYs\n")); - /* Parse UtmiPhy PCDs */ - Status =3D ParsePcdString ((CHAR16 *) PcdGetPtr (PcdUtmiPhyRegUtmiUnit), - Count, RegUtmiUnit, NULL); - if (EFI_ERROR(Status)) { - DEBUG((DEBUG_ERROR, "UtmiPhy: Wrong PcdUtmiPhyRegUtmiUnit format\n")); + if (PcdGetSize (PcdUtmiControllersEnabled) > MVHW_MAX_XHCI_DEVS) { + DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiControllersEnabled format\n")= ); return EFI_INVALID_PARAMETER; } =20 - Status =3D ParsePcdString ((CHAR16 *) PcdGetPtr (PcdUtmiPhyRegUsbCfg), - Count, RegUsbCfg, NULL); - if (EFI_ERROR(Status)) { - DEBUG((DEBUG_ERROR, "UtmiPhy: Wrong PcdUtmiPhyRegUsbCfg format\n")); + /* Make sure XHCI controllers table is present */ + XhciDeviceTable =3D (UINT8 *)PcdGetPtr (PcdPciEXhci); + if (XhciDeviceTable =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "UTMI: Missing PcdPciEXhci\n")); return EFI_INVALID_PARAMETER; } =20 - Status =3D ParsePcdString ((CHAR16 *) PcdGetPtr (PcdUtmiPhyRegUtmiCfg), - Count, RegUtmiCfg, NULL); - if (EFI_ERROR(Status)) { - DEBUG((DEBUG_ERROR, "UtmiPhy: Wrong PcdUtmiPhyRegUtmiCfg format\n")); + /* Obtain port type table */ + UtmiPortType =3D (UINT8 *)PcdGetPtr (PcdUtmiPortType); + if (UtmiPortType =3D=3D NULL || + PcdGetSize (PcdUtmiPortType) !=3D PcdGetSize (PcdUtmiControllersEnab= led)) { + DEBUG ((DEBUG_ERROR, "UTMI: Wrong PcdUtmiPortType format\n")); return EFI_INVALID_PARAMETER; } =20 - Status =3D ParsePcdString ((CHAR16 *) PcdGetPtr (PcdUtmiPhyUtmiPort), - Count, UtmiPort, NULL); - if (EFI_ERROR(Status)) { - DEBUG((DEBUG_ERROR, "UtmiPhy: Wrong PcdUtmiPhyUtmiPort format\n")); - return EFI_INVALID_PARAMETER; - } + /* Initialize enabled chips */ + for (Index =3D 0; Index < PcdGetSize (PcdUtmiControllersEnabled); Index+= +) { + if (!MVHW_DEV_ENABLED (Utmi, Index)) { + continue; + } + + /* UTMI PHY without enabled XHCI controller is useless */ + if (!MVHW_DEV_ENABLED (Xhci, Index)) { + DEBUG ((DEBUG_ERROR, "UTMI: Disabled Xhci controller %d\n", Index)); + return EFI_INVALID_PARAMETER; + } =20 - for (i =3D 0 ; i < Count ; i++) { /* Get base address of UTMI phy */ - UtmiData[i].UtmiBaseAddr =3D RegUtmiUnit[i]; + UtmiData.UtmiBaseAddr =3D Desc->UtmiBaseAddresses[Index]; =20 /* Get usb config address */ - UtmiData[i].UsbCfgAddr =3D RegUsbCfg[i]; + UtmiData.UsbCfgAddr =3D Desc->UtmiUsbConfigAddresses[Index]; =20 /* Get UTMI config address */ - UtmiData[i].UtmiCfgAddr =3D RegUtmiCfg[i]; + UtmiData.UtmiCfgAddr =3D Desc->UtmiConfigAddresses[Index]; =20 - /* - * Get the usb port number, which will be used to check if - * the utmi connected to host or device - */ - UtmiData[i].UtmiPhyPort =3D UtmiPort[i]; - } + /* Get UTMI PHY ID */ + UtmiData.PhyId =3D Desc->UtmiPhyId[Index]; =20 - /* Currently only Cp110 is supported */ - Cp110UtmiPhyInit (Count, UtmiData); + /* Get the usb port type */ + UtmiData.UtmiPhyPort =3D UtmiPortType[Index]; + + /* Currently only Cp110 is supported */ + Cp110UtmiPhyInit (&UtmiData); + } =20 return EFI_SUCCESS; } diff --git a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h b/Platform/Ma= rvell/Library/UtmiPhyLib/UtmiPhyLib.h index f9b4933..0d7d72e 100644 --- a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h +++ b/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.h @@ -42,7 +42,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #include #include #include -#include =20 #define UTMI_USB_CFG_DEVICE_EN_OFFSET 0 #define UTMI_USB_CFG_DEVICE_EN_MASK (0x1 << UTMI_USB_CFG_DEV= ICE_EN_OFFSET) diff --git a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf b/Platform/= Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf index f1e57f4..b56c43b 100644 --- a/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf +++ b/Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf @@ -50,15 +50,12 @@ DebugLib IoLib MemoryAllocationLib - ParsePcdLib PcdLib =20 [Sources.common] UtmiPhyLib.c =20 -[FixedPcd] - gMarvellTokenSpaceGuid.PcdUtmiPhyCount - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort +[Pcd] + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled + gMarvellTokenSpaceGuid.PcdUtmiPortType + gMarvellTokenSpaceGuid.PcdPciEXhci diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index d2ab0a9..e23607f 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -156,11 +156,8 @@ gMarvellTokenSpaceGuid.PcdChip3ComPhyInvFlags|{ 0x0 }|VOID*|0x30000177 =20 #UtmiPhy - gMarvellTokenSpaceGuid.PcdUtmiPhyCount|0|UINT32|0x30000205 - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg|{ 0x0 }|VOID*|0x30000206 - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg|{ 0x0 }|VOID*|0x30000207 - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit|{ 0x0 }|VOID*|0x30000208 - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort|{ 0x0 }|VOID*|0x30000209 + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x0 }|VOID*|0x30000206 + gMarvellTokenSpaceGuid.PcdUtmiPortType|{ 0x0 }|VOID*|0x30000207 =20 #MDIO gMarvellTokenSpaceGuid.PcdMdioBaseAddress|0|UINT64|0x3000043 diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marve= ll/Documentation/PortingGuide.txt index b2bb595..fa429d1 100644 --- a/Silicon/Marvell/Documentation/PortingGuide.txt +++ b/Silicon/Marvell/Documentation/PortingGuide.txt @@ -279,33 +279,23 @@ UTMI PHY configuration =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D In order to configure UTMI, following PCDs are available: =20 - - gMarvellTokenSpaceGuid.PcdUtmiPhyCount - (Indicates how many UTMI PHYs are available on platform) - -Next four PCDs are in unicode string format containing settings for all de= vices -separated with semicolon. - - - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit - (Indicates base address of the UTMI unit) - - - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg - (Indicates address of USB Configuration register) + - gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled + (Array with used controllers + Set to 0x1 for enabled, 0x0 for disabled) =20 - - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg - (Indicates address of external UTMI configuration) + - gMarvellTokenSpaceGuid.PcdUtmiPortType + (Indicates type of the connected USB port: =20 - - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort - (Indicates type of the connected USB port) + UTMI_USB_HOST0 0x0 + UTMI_USB_HOST1 0x1 + UTMI_USB_DEVICE0 0x2 ) =20 Example ------- =20 # UtmiPhy - gMarvellTokenSpaceGuid.PcdUtmiPhyCount|2 - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiUnit|L"0xF2580000;0xF2581000" - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUsbCfg|L"0xF2440420;0xF2440420" - gMarvellTokenSpaceGuid.PcdUtmiPhyRegUtmiCfg|L"0xF2440440;0xF2440444" - gMarvellTokenSpaceGuid.PcdUtmiPhyUtmiPort|L"0x0;0x1" + gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1 } + gMarvellTokenSpaceGuid.PcdUtmiPortType|{ $(UTMI_USB_HOST0), $(UTMI_USB= _HOST1) } =20 =20 SPI driver configuration --=20 1.8.3.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel