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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id 84sm1539781ljc.67.2017.10.11.03.16.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Oct 2017 03:16:07 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::22b; helo=mail-lf0-x22b.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TtztnqOEA+dqX1b9tOWUSOVeM+ZgsPTKBfHC+zwyRTs=; b=LcHESo4UO02gTdv7/0KXMVloz4s7svt5Oni6UnWluj+Jih7qR2+HfxrSa0gZlWDl+u imB8vHAIF0ZsDu/+/bkuXmEhBey0qLW+AaN6mWUHD9DgTYK7VRwiYmj3RN/jlQdL0wgI Hpzl56SfSgrGjeYY3T7yi96tXj7Cf7NsvztR97oo3FitWJzqTobAKA5PXn++pOqFBkBV L7H73nblpDWKw+CpKU9BI2sZJgVZlWl/Cv0YRfm8V34dW+ozseTTvJOSCWlHbO/Eh1sK YYk91f2Bvt96BQoZlPjq9xACFvSdG5oCS06mK5IyutQKmHvOBPVoxFpGSTpJoUNU+35d 6hfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TtztnqOEA+dqX1b9tOWUSOVeM+ZgsPTKBfHC+zwyRTs=; b=UrOKxpDhKmyszbTXChC32AVlUMFqLRyvEsDbPLePPiLLRFNZq5DEIpRQMwJvnMOTOP yx1WR+zhwpR3Cb2mSIkrUqKvF7oTckUTf1nRvqxjYAFkc/s5xf2iQoNe5AyNb065EF46 Kc2Xztr/trMAxd6YEm4rdxvJKaPPWCtL/5wnA6YwwMLDHl1e2DtPPjeCRcB05SowV1jj coktMvilVu5RU1C87lrgG+3N3lszSTgdt5smHG7cDkqDFs2nCAIL/aXrjgTUVuVfBRW/ OKfKkF5Cx9apIkmU8X7LUuMZWD1M3FhADa5OacAj7si0stEXvWJ8Y19042Wicm6MgZ/U ZyWg== X-Gm-Message-State: AMCzsaVdloD4WCXEL5eh18c/V6VktJnAeBdWpJVB78rCBc4P+1oTCvrQ oHL2EUL01jTg3JpjvowBU3SSSTJEgFg= X-Google-Smtp-Source: AOwi7QBCci67uWsO99V00Gm9Y6nAuWrcvwdszkcWqQetl/yzuunc5v5GZ2AWgMidozx1ZCP30X1zqg== X-Received: by 10.25.145.88 with SMTP id y24mr3045651lfj.5.1507716967738; Wed, 11 Oct 2017 03:16:07 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Wed, 11 Oct 2017 12:15:34 +0200 Message-Id: <1507716939-31798-8-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507716939-31798-1-git-send-email-mw@semihalf.com> References: <1507716939-31798-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 07/12] Marvell/Armada: Ensure GICC frames adjacency X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel The GIC architecture mandates that the CPU interface, which consists of 2 consecutive 4 KB frames, can be mapped using separate mappings. Since this is problematic on 64 KB pages, the MMU-400 aliases each frame 16 times, and the two consecutive frames can be found at offset 0xf000. Therefore use the last alias from the first series of aliases as the base address, so that the first frame from the second series becomes directly adjacent, whilst remaining covered by a separate 64KB page. This patch is intended to expose correct GICC alias via MADT, once ACPI support is added. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada/Armada.dsc.inc | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Arma= da/Armada.dsc.inc index 5071bd5..bd2336f 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -263,7 +263,14 @@ =20 # ARM Generic Interrupt Controller gArmTokenSpaceGuid.PcdGicDistributorBase|0xF0210000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF0220000 + + # + # NOTE: the GIC architecture mandates that the CPU interface, which cons= ists + # of 2 consecutive 4 KB frames, can be mapped using separate mappings. + # Since this is problematic on 64 KB pages, the MMU-400 aliases each fra= me + # 16 times, and the two consecutive frames can be found at offset 0xf000 + # + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xF022F000 =20 # ARM Architectural Timer Support gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|25000000 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel