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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id f21sm107393lja.25.2017.10.30.20.59.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 30 Oct 2017 20:59:55 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oC1KaiksmPCL2Z3CKCjkKrhNBWr77ganiSUK3dz8a/I=; b=KXSiLFqucLmL4+z/5MwaDPBbzAH7x0CTBra6WJZfw6DosidZUIunLwSGJRMtHqW9u0 /rEbzdKsf0DMLnmDXTeUZVXkTiklZVW2Hs9J7z/ZLH0rY8rdU9WJaog5DBHRELT+7tZm CjW7XEukjImFwDuF6IPKi6V7N+6f3RKf6fbSq+xKNKUrJBVCaBrosBwvWE5hWmVvfI/v 3sgOBV+5jR0rliv+3oh+czf+eTrBBZNeEBUsNDq8awYNLGG5btibq39kR884HSxFP9bo eD8q2UlER7uvSYIqbq7j9k9nY8RMQOIo+4Iz3mzOHwYDkWT1AMRXX9Zis7qKvBvtUjcg VgHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oC1KaiksmPCL2Z3CKCjkKrhNBWr77ganiSUK3dz8a/I=; b=d/1xGnzNZKdwjNOaIRSBkPjeWcNCkKA5B/JWBOsRVPztyz2MdKaZ4wQmqFyw0pRVaD wx1MokEWGvbadh33IhqUi83LCD1KY4POIEnaKwLAM6+oaExTjKNPDSRTWA5u83yk2UP1 XAojtM++SmyORKpFWeCZISuuGqD0IxAmeSPjSUYHsnUhnegzwOO0i2XBCFaKujTzYNcv WoV3cEWWuDLn3pRE7BepNnU+6fvriJPCHVQ7CtKqi1in6P/+d9i69VGee6w4RBTSLoq7 6aFBEqA7SCVdrtmjHKAVhHCOjmnIWlXWze3IqZS2k/JtFsh2sJCsr9aCrLrkZbwxA3ZM LO8A== X-Gm-Message-State: AMCzsaWCkoLaPdQsnjnQVmKXUjo+YRW81n9Vm7dn2WPE3xjemVkG0zId 9Fdi+qSgtMiyDHhMuEEgh9qHB5eptqY= X-Google-Smtp-Source: ABhQp+T62j5AzsRECNHlONnuc49U4R4nQgEP/03VWEGdn0xyj3tzGcJchMke93OK38dX92EiBROPRg== X-Received: by 10.46.22.83 with SMTP id 19mr225866ljw.147.1509422396400; Mon, 30 Oct 2017 20:59:56 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Tue, 31 Oct 2017 04:59:31 +0100 Message-Id: <1509422375-20198-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509422375-20198-1-git-send-email-mw@semihalf.com> References: <1509422375-20198-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH 2/6] Marvell/Drivers: MvSpiFlash: Enable dynamic SPI Flash detection X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Hitherto mechanism of fixing SPI flash model in the PCDs, occured to be very inefficient and problematic. Enable dynamic detection by reworking MvSpiFlashReadId() command, which now uses newly added NorFlashInfoLib, that helps to obtain description of the JEDEC compliant devices. This patch updates the MvSpiFlashProtocol ReadId() protocol callback on both producer's (MvFlashDxe) and consumers' sides (FirmwareUpdate and SpiTool applications). Because all information about detected SPI NOR flash is now stored in the obtained NorFlashInfo structure fields, use them instead of the PCDs. Enable compilation of the NorFlashInfoLib and update PortingGuide documentation accordingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c | 5 +- Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf | 4 +- Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c | 5 +- Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf | 2 +- Platform/Marvell/Armada/Armada.dsc.inc | 1 + Platform/Marvell/Armada/Armada70x0.dsc | 5 -- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 68 +++++++++++-= -------- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf | 9 +-- Platform/Marvell/Drivers/Spi/MvSpiDxe.inf | 2 + Platform/Marvell/Include/Protocol/Spi.h | 3 + Platform/Marvell/Include/Protocol/SpiFlash.h | 6 +- Platform/Marvell/Marvell.dec | 6 -- Silicon/Marvell/Documentation/PortingGuide.txt | 18 ------ 13 files changed, 51 insertions(+), 83 deletions(-) diff --git a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c b/Platf= orm/Marvell/Applications/FirmwareUpdate/FUpdate.c index d70645d..750e52a 100644 --- a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c +++ b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c @@ -94,12 +94,9 @@ SpiFlashProbe ( ) { EFI_STATUS Status; - UINT8 *FlashId; - - FlashId =3D (UINT8 *)PcdGetPtr (PcdSpiFlashId); =20 // Read SPI flash ID - Status =3D SpiFlashProtocol->ReadId (Slave, NOR_FLASH_ID_DEFAULT_LEN, Fl= ashId); + Status =3D SpiFlashProtocol->ReadId (Slave, FALSE); if (EFI_ERROR (Status)) { return SHELL_ABORTED; } diff --git a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf b/Pla= tform/Marvell/Applications/FirmwareUpdate/FUpdate.inf index 92c3333..53ea491 100644 --- a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf +++ b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf @@ -44,6 +44,7 @@ FUpdate.uni =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec @@ -64,9 +65,6 @@ UefiLib UefiRuntimeServicesTableLib =20 -[Pcd] - gMarvellTokenSpaceGuid.PcdSpiFlashId - [Protocols] gMarvellSpiFlashProtocolGuid gMarvellSpiMasterProtocolGuid diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c b/Platform= /Marvell/Applications/SpiTool/SpiFlashCmd.c index a12f2ec..68a6cf7 100644 --- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c +++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c @@ -166,11 +166,8 @@ FlashProbe ( ) { EFI_STATUS Status; - UINT8 *FlashId; =20 - FlashId =3D (UINT8 *)PcdGetPtr (PcdSpiFlashId); - - Status =3D SpiFlashProtocol->ReadId (Slave, NOR_FLASH_ID_DEFAULT_LEN, Fl= ashId); + Status =3D SpiFlashProtocol->ReadId (Slave, FALSE); if (EFI_ERROR (Status)) { return SHELL_ABORTED; } diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf b/Platfo= rm/Marvell/Applications/SpiTool/SpiFlashCmd.inf index 887b9a5..a52906b 100644 --- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf +++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf @@ -44,6 +44,7 @@ SpiFlashCmd.uni =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec ShellPkg/ShellPkg.dec MdeModulePkg/MdeModulePkg.dec @@ -66,7 +67,6 @@ =20 [Pcd] gMarvellTokenSpaceGuid.PcdSpiFlashCs - gMarvellTokenSpaceGuid.PcdSpiFlashId gMarvellTokenSpaceGuid.PcdSpiFlashMode =20 [Protocols] diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Arma= da/Armada.dsc.inc index b9fc384..2cd96e6 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -33,6 +33,7 @@ ArmPlatformLib|Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0L= ib.inf ComPhyLib|Platform/Marvell/Library/ComPhyLib/ComPhyLib.inf MppLib|Platform/Marvell/Library/MppLib/MppLib.inf + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf UtmiPhyLib|Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf =20 DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Arma= da/Armada70x0.dsc index 4d5f55f..8e4cdb2 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -90,11 +90,6 @@ gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|10000000 gMarvellTokenSpaceGuid.PcdSpiClockFrequency|200000000 =20 - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd|0x70 - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|3 - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536 - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256 - gMarvellTokenSpaceGuid.PcdSpiFlashId|{ 0x20, 0xBA, 0x18 } gMarvellTokenSpaceGuid.PcdSpiFlashMode|3 gMarvellTokenSpaceGuid.PcdSpiFlashCs|0 =20 diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/M= arvell/Drivers/Spi/Devices/MvSpiFlash.c index ab3ed6a..703994c 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c @@ -107,10 +107,10 @@ MvSpiFlashWriteCommon ( UINT8 PollBit =3D STATUS_REG_POLL_WIP; UINT8 CheckStatus =3D 0x0; =20 - CmdStatus =3D (UINT8)PcdGet32 (PcdSpiFlashPollCmd); - if (CmdStatus =3D=3D CMD_FLAG_STATUS) { + if (Slave->Info->Flags & NF_WRITE_FSR) { + CmdStatus =3D CMD_FLAG_STATUS; PollBit =3D STATUS_REG_POLL_PEC; - CheckStatus =3D PollBit; + CheckStatus =3D STATUS_REG_POLL_PEC; } =20 // Send command @@ -181,8 +181,19 @@ MvSpiFlashErase ( UINTN EraseSize; UINT8 Cmd[5]; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); - EraseSize =3D PcdGet64 (PcdSpiFlashEraseSize); + if (Slave->Info->Flags & NF_4B_ADDR) { + AddrSize =3D 4; + } else { + AddrSize =3D 3; + } + + if (Slave->Info->Flags & NF_ERASE_4K) { + Cmd[0] =3D CMD_ERASE_4K; + EraseSize =3D SIZE_4KB; + } else { + Cmd[0] =3D CMD_ERASE_64K; + EraseSize =3D Slave->Info->SectorSize; + } =20 // Check input parameters if (Offset % EraseSize || Length % EraseSize) { @@ -191,21 +202,6 @@ MvSpiFlashErase ( return EFI_DEVICE_ERROR; } =20 - switch (EraseSize) { - case SIZE_4KB: - Cmd[0] =3D CMD_ERASE_4K; - break; - case SIZE_32KB: - Cmd[0] =3D CMD_ERASE_32K; - break; - case SIZE_64KB: - Cmd[0] =3D CMD_ERASE_64K; - break; - default: - DEBUG ((DEBUG_ERROR, "MvSpiFlash: Invalid EraseSize parameter\n")); - return EFI_INVALID_PARAMETER; - } - while (Length) { EraseAddr =3D Offset; =20 @@ -239,7 +235,11 @@ MvSpiFlashRead ( UINT32 AddrSize, ReadAddr, ReadLength, RemainLength; UINTN BankSel =3D 0; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); + if (Slave->Info->Flags & NF_4B_ADDR) { + AddrSize =3D 4; + } else { + AddrSize =3D 3; + } =20 Cmd[0] =3D CMD_READ_ARRAY_FAST; =20 @@ -282,8 +282,13 @@ MvSpiFlashWrite ( UINT32 WriteAddr; UINT8 Cmd[5], AddrSize; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); - PageSize =3D PcdGet32 (PcdSpiFlashPageSize); + if (Slave->Info->Flags & NF_4B_ADDR) { + AddrSize =3D 4; + } else { + AddrSize =3D 3; + } + + PageSize =3D Slave->Info->PageSize; =20 Cmd[0] =3D CMD_PAGE_PROGRAM; =20 @@ -370,7 +375,7 @@ MvSpiFlashUpdate ( UINT64 SectorSize, ToUpdate, Scale =3D 1; UINT8 *TmpBuf, *End; =20 - SectorSize =3D PcdGet64 (PcdSpiFlashSectorSize); + SectorSize =3D Slave->Info->SectorSize; =20 End =3D Buf + ByteCount; =20 @@ -404,8 +409,7 @@ EFI_STATUS EFIAPI MvSpiFlashReadId ( IN SPI_DEVICE *SpiDev, - IN UINT32 DataByteCount, - IN OUT UINT8 *Buffer + IN BOOLEAN UseInRuntime ) { EFI_STATUS Status; @@ -425,9 +429,7 @@ MvSpiFlashReadId ( return Status; } =20 - if (CompareMem (Id, Buffer, DataByteCount) !=3D 0) { - Status =3D EFI_NOT_FOUND; - } + Status =3D GetNorFlashInfo (Id, &SpiDev->Info, UseInRuntime); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: Unrecognized JEDEC Id bytes: 0x%02x%02x%02x\n", @@ -438,6 +440,8 @@ MvSpiFlashReadId ( return Status; } =20 + PrintNorFlashInfo (SpiDev->Info); + return EFI_SUCCESS; } =20 @@ -452,7 +456,11 @@ MvSpiFlashInit ( UINT8 Cmd, StatusRegister; UINT32 AddrSize; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); + if (Slave->Info->Flags & NF_4B_ADDR) { + AddrSize =3D 4; + } else { + AddrSize =3D 3; + } =20 if (AddrSize =3D=3D 4) { // Set 4 byte address mode diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf b/Platform= /Marvell/Drivers/Spi/Devices/MvSpiFlash.inf index 4519b02..6587f69 100644 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf @@ -42,10 +42,12 @@ MvSpiFlash.h =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec =20 [LibraryClasses] + NorFlashInfoLib UefiBootServicesTableLib UefiDriverEntryPoint TimerLib @@ -53,13 +55,6 @@ DebugLib MemoryAllocationLib =20 -[FixedPcd] - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize - [Protocols] gMarvellSpiMasterProtocolGuid gMarvellSpiFlashProtocolGuid diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf b/Platform/Marvell/D= rivers/Spi/MvSpiDxe.inf index d38d331..08c6c04 100644 --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf @@ -42,10 +42,12 @@ MvSpiDxe.h =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec =20 [LibraryClasses] + NorFlashInfoLib UefiBootServicesTableLib UefiDriverEntryPoint TimerLib diff --git a/Platform/Marvell/Include/Protocol/Spi.h b/Platform/Marvell/Inc= lude/Protocol/Spi.h index ae78a31..93a8ec0 100644 --- a/Platform/Marvell/Include/Protocol/Spi.h +++ b/Platform/Marvell/Include/Protocol/Spi.h @@ -34,6 +34,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #ifndef __MARVELL_SPI_MASTER_PROTOCOL_H__ #define __MARVELL_SPI_MASTER_PROTOCOL_H__ =20 +#include + extern EFI_GUID gMarvellSpiMasterProtocolGuid; =20 typedef struct _MARVELL_SPI_MASTER_PROTOCOL MARVELL_SPI_MASTER_PROTOCOL; @@ -49,6 +51,7 @@ typedef struct { INTN Cs; INTN MaxFreq; SPI_MODE Mode; + NOR_FLASH_INFO *Info; } SPI_DEVICE; =20 typedef diff --git a/Platform/Marvell/Include/Protocol/SpiFlash.h b/Platform/Marvel= l/Include/Protocol/SpiFlash.h index e0d62cc..4a3053e 100644 --- a/Platform/Marvell/Include/Protocol/SpiFlash.h +++ b/Platform/Marvell/Include/Protocol/SpiFlash.h @@ -47,9 +47,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #define CMD_ERASE_64K 0xd8 #define CMD_4B_ADDR_ENABLE 0xb7 =20 -#define NOR_FLASH_MAX_ID_LEN 6 -#define NOR_FLASH_ID_DEFAULT_LEN 3 - extern EFI_GUID gMarvellSpiFlashProtocolGuid; =20 typedef struct _MARVELL_SPI_FLASH_PROTOCOL MARVELL_SPI_FLASH_PROTOCOL; @@ -65,8 +62,7 @@ typedef EFI_STATUS (EFIAPI *MV_SPI_FLASH_READ_ID) ( IN SPI_DEVICE *SpiDev, - IN UINT32 DataByteCount, - IN OUT UINT8 *Buffer + IN BOOLEAN UseInRuntime ); =20 typedef diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index 679a9d0..8255895 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -128,12 +128,6 @@ gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|0|UINT32|0x30000052 gMarvellTokenSpaceGuid.PcdSpiClockFrequency|0|UINT32|0x30000053 =20 - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd|0|UINT32|0x3000052 - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|0|UINT32|0x3000053 - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|0|UINT64|0x3000054 - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|0|UINT32|0x3000055 - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize|65536|UINT64|0x3000059 - gMarvellTokenSpaceGuid.PcdSpiFlashId|{ 0x0 }|VOID*|0x3000056 gMarvellTokenSpaceGuid.PcdSpiFlashCs|0|UINT32|0x3000057 gMarvellTokenSpaceGuid.PcdSpiFlashMode|0|UINT32|0x3000058 =20 diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marve= ll/Documentation/PortingGuide.txt index cbe3bed..d5deed5 100644 --- a/Silicon/Marvell/Documentation/PortingGuide.txt +++ b/Silicon/Marvell/Documentation/PortingGuide.txt @@ -312,24 +312,6 @@ SpiFlash configuration =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Folowing PCDs for spi flash driver configuration must be set properly: =20 - - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles - (Size of SPI flash address in bytes (3 or 4) ) - - - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize - (Size of minimal erase block in bytes) - - - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize - (Size of SPI flash page) - - - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize - (Size of SPI flash sector, 65536 bytes by default) - - - gMarvellTokenSpaceGuid.PcdSpiFlashId - (Id of SPI flash) - - - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd - (Spi flash polling flag) - - gMarvellTokenSpaceGuid.PcdSpiFlashMode (Default SCLK mode (see SPI_MODE enum in file edk2-platforms/Platform/Marvell/Drivers/Spi/MvSpi.h)) --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel