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BN6PR12MB1236; 20:MRZkYhwUQoSD8Op72B/EABIzli1Iva6w8cboZeo8ZXrr1s47BQuGB5DWel8kSfVaZ9P/fUncoAn85C3ZT8qHcg46JX+NwVpzNNuMjgH372mpE2pNFbd3QAKCm6wsYEFBuUI0DFkTmUt9GjfWTVqn8jiLCg5PXcXvDhpOHHguffnxH5zpWGVWjSEdsGKOP4qeoiPbQMVh0dsvdNGprOGRjQKfxjMMccsn7OF/eix6HOIosHrzdYoJj2ByadS4Gp3h X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2017 17:55:05.0261 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1c407dfa-4585-45d7-a1db-08d5208884b1 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1236 Subject: [edk2] [PATCH 1/2] PcAtChipsetPkg: Define FixePCD's for RTC register values X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Define FixedPCD's to replace macros in RTC driver, to allow for platform-specific configurations. Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran Reviewed-by: Ruiyu Ni --- PcAtChipsetPkg/PcAtChipsetPkg.dec | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipset= Pkg.dec index b0b2b62..f11d204 100644 --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec @@ -5,6 +5,7 @@ # PcAt defacto standard. # # Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Inc. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BS= D License @@ -181,5 +182,17 @@ # @Prompt Reset Control Register value for cold reset gPcAtChipsetPkgTokenSpaceGuid.PcdResetControlValueColdReset|0xFE|UINT8|0= x0000001A =20 + ## Specifies the initial value for Register_A in RTC. + # @Prompt Initial value for Register_A in RTC. + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA|0x26|UINT8|0x0= 000001B + + ## Specifies the initial value for Register_B in RTC. + # @Prompt Initial value for Register_B in RTC. + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB|0x02|UINT8|0x0= 000001C + + ## Specifies the initial value for Register_D in RTC. + # @Prompt Initial value for Register_D in RTC. + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD|0x00|UINT8|0x0= 000001D + [UserExtensions.TianoCore."ExtraFiles"] PcAtChipsetPkgExtra.uni --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Wed Dec 25 01:56:39 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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BN6PR12MB1236; 20:4W6WfSdOtQ7pqSw1PWZCNQXgWN5xvSIAhHOWO7hn8plrbEwH+rxHrCItTc6NrhsR4sngFEUrQ9yTlMpbpf9kHl853cEYxD1m4qT/tugapP/FUPDI8q89ufAL5E0AlfyoJevjbDfPkUs0ha74eYvhqBH2dbA13Wd4ngrF8i/5ld72iWNjjMYHjMrVJgKm8ZnmgQ7sKfymVjo5GS81kjm4ze5mBif3Zm3+cMDj6BBhdvlDs1KKDynocR0OWf7T4dd3 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2017 17:55:06.0418 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b8e7cb0a-be9f-4266-37e3-08d52088854a X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN6PR12MB1236 Subject: [edk2] [PATCH 2/2] PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe: Replace RTC macros X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ruiyu Ni Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Use FixedPCD's to set platform-specific values for RTC registers. Specifically, the replaced macros are: 1) RTC_INIT_REGISTER_A 2) RTC_INIT_REGISTER_B 3) RTC_INIT_REGISTER_D Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Leo Duran --- PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c | 8 +++++--- PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h | 9 ++-----= -- .../PcatRealTimeClockRuntimeDxe.inf | 11 +++++++= ++-- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/PcAtChips= etPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c index 857918d..c032e16 100644 --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c @@ -2,6 +2,8 @@ RTC Architectural Protocol GUID as defined in DxeCis 0.96. =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Inc. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -128,7 +130,7 @@ PcRtcInit ( // Make sure Division Chain is properly configured, // or RTC clock won't "tick" -- time won't increment // - RegisterA.Data =3D RTC_INIT_REGISTER_A; + RegisterA.Data =3D FixedPcdGet8 (PcdInitialValueRtcRegisterA); RtcWrite (RTC_ADDRESS_REGISTER_A, RegisterA.Data); =20 // @@ -144,7 +146,7 @@ PcRtcInit ( // // Clear RTC register D // - RegisterD.Data =3D RTC_INIT_REGISTER_D; + RegisterD.Data =3D FixedPcdGet8 (PcdInitialValueRtcRegisterD); RtcWrite (RTC_ADDRESS_REGISTER_D, RegisterD.Data); =20 // @@ -176,7 +178,7 @@ PcRtcInit ( // Set RTC configuration after get original time // The value of bit AIE should be reserved. // - RegisterB.Data =3D RTC_INIT_REGISTER_B | (RegisterB.Data & BIT5); + RegisterB.Data =3D FixedPcdGet8 (PcdInitialValueRtcRegisterB) | (Registe= rB.Data & BIT5); RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data); =20 // diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h b/PcAtChips= etPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h index ba6092d..8aeb12c 100644 --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h @@ -2,6 +2,8 @@ Header file for real time clock driver. =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Inc. All rights reserved.
+ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -75,13 +77,6 @@ extern PC_RTC_MODULE_GLOBALS mModuleGlobal; #define RTC_INIT_DAY 1 #define RTC_INIT_MONTH 1 =20 -// -// Register initial values -// -#define RTC_INIT_REGISTER_A 0x26 -#define RTC_INIT_REGISTER_B 0x02 -#define RTC_INIT_REGISTER_D 0x0 - #pragma pack(1) // // Register A diff --git a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRu= ntimeDxe.inf b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClock= RuntimeDxe.inf index dd746a2..1b2b063 100644 --- a/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDx= e.inf +++ b/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDx= e.inf @@ -5,6 +5,8 @@ # It will install a tagging protocol with gEfiRealTimeClockArchProtocolGui= d. # # Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Inc. All rights reserved.
+# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BS= D License # which accompanies this distribution. The full text of the license may b= e found at @@ -66,13 +68,18 @@ ## SOMETIMES_CONSUMES ## SystemTable gEfiAcpiTableGuid =20 -[Depex] - gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid +[FixedPcd] + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA ## CONSUMES + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB ## CONSUMES + gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD ## CONSUMES =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout ## CONSUMES gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear ## CONSUMES gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear ## CONSUMES =20 +[Depex] + gEfiVariableArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid + [UserExtensions.TianoCore."ExtraFiles"] PcRtcExtra.uni --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel