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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id g29sm1120441lfh.3.2017.11.03.10.57.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Nov 2017 10:57:27 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::241; helo=mail-lf0-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hTW7LZUOBB16HeeLGA85/9EB9DuJGp0kJkiaD5Px/jM=; b=MxtNRKnrnzQnlV2YUlpH2YFUJTWWqrjgEBIMLppcTarDvu40mZI4Zr8AGuSIRWRyZZ nGgw00Pars1IHqQ/JATkvFlskoBaUPQ0BkbXxCtJiq5mvS/Ty/Fp2m9Co9fjhBdAJq3U y7bDLQM31QYBsVrnuGpWCPZY6YCxZm1tHUryD9/gNHaJuv0RY7QQ4+3mNH5QhB5094U7 PSAoYmDr+Q3VO0+Ovtfrk17sV+mM34I7OsQDUt0m68FP2iZvDjuMNBNHnwQEOTdm5YVn qMq4EGK6WIYKn0urRimkofUzpMARkbiB/rg9M+Brk9YWwg9WYXu1MWxHLQ4Gem52U4f/ F2fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hTW7LZUOBB16HeeLGA85/9EB9DuJGp0kJkiaD5Px/jM=; b=LbbyAo22m79ztoebhG1F6WIe503/g1+sKhS0g4vhLs8CRsD37+nVHOSWT7nz6QtTVJ 5tmuA1r84hMdRYeZ1bXkc1Nk9HNuhX/Rf/tJCUYT1ry5PyblNYfeGa2DCE5UxAZizEi1 ktyQXg7TX/hrXfLiSvBYAMGKRfMacca0aloxxuKB/b3BSy0F0V/dVZqqelC/KKYE0gpK 8JFM3E/TT0oynZgAnE55ca6K3kolVXy5RjX+w53r2ZS3TkwGjpR0ypedTqgtRjECkKj4 ToMsqbZ1tA62p0L64ITrl7clBFEeVHspFxJ+dYt7oOfkCe5jMukfyOno6tZa8Ac4ci9n OiPA== X-Gm-Message-State: AMCzsaXTU9FGFBwiT4PPSfkicTddmc5JyReIJ6tUD6Zj8X/074TwFbSB C1HigKRim9RsBDiCwaQ79MTo/VfMLkM= X-Google-Smtp-Source: ABhQp+RovzO2oKUP/Ykaeabv/VgwJomGktOt36cb9OVpTHRiS6RRD/XGJephHW9g8zczaSdyQ6dIrg== X-Received: by 10.46.83.67 with SMTP id t3mr3275649ljd.135.1509731848350; Fri, 03 Nov 2017 10:57:28 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Fri, 3 Nov 2017 18:57:11 +0100 Message-Id: <1509731835-5664-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509731835-5664-1-git-send-email-mw@semihalf.com> References: <1509731835-5664-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 2/6] Marvell/Drivers: MvSpiFlash: Enable dynamic SPI Flash detection X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Hitherto mechanism of fixing SPI flash model in the PCDs, occured to be very inefficient and problematic. Enable dynamic detection by reworking MvSpiFlashReadId() command, which now uses newly added NorFlashInfoLib, that helps to obtain description of the JEDEC compliant devices. This patch updates the MvSpiFlashProtocol ReadId() protocol callback on both producer's (MvFlashDxe) and consumers' sides (FirmwareUpdate and SpiTool applications). Because all information about detected SPI NOR flash is now stored in the obtained NorFlashInfo structure fields, use them instead of the PCDs. Enable compilation of the NorFlashInfoLib and update PortingGuide documentation accordingly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c | 7 +- Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf | 4 +- Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c | 7 +- Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf | 2 +- Platform/Marvell/Armada/Armada.dsc.inc | 1 + Platform/Marvell/Armada/Armada70x0.dsc | 5 -- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 76 +++++++++---= -------- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf | 9 +-- Platform/Marvell/Drivers/Spi/MvSpiDxe.inf | 2 + Platform/Marvell/Include/Protocol/Spi.h | 4 ++ Platform/Marvell/Include/Protocol/SpiFlash.h | 5 +- Platform/Marvell/Marvell.dec | 6 -- Silicon/Marvell/Documentation/PortingGuide.txt | 18 ----- 13 files changed, 48 insertions(+), 98 deletions(-) diff --git a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c b/Platf= orm/Marvell/Applications/FirmwareUpdate/FUpdate.c index 8a2ad3f..750e52a 100644 --- a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c +++ b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.c @@ -94,14 +94,9 @@ SpiFlashProbe ( ) { EFI_STATUS Status; - UINT32 FlashIdLen; - UINT8 *FlashId; - - FlashId =3D (UINT8 *)PcdGetPtr (PcdSpiFlashId); - FlashIdLen =3D PcdGetSize (PcdSpiFlashId); =20 // Read SPI flash ID - Status =3D SpiFlashProtocol->ReadId (Slave, FlashIdLen, FlashId); + Status =3D SpiFlashProtocol->ReadId (Slave, FALSE); if (EFI_ERROR (Status)) { return SHELL_ABORTED; } diff --git a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf b/Pla= tform/Marvell/Applications/FirmwareUpdate/FUpdate.inf index 92c3333..53ea491 100644 --- a/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf +++ b/Platform/Marvell/Applications/FirmwareUpdate/FUpdate.inf @@ -44,6 +44,7 @@ FUpdate.uni =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec @@ -64,9 +65,6 @@ UefiLib UefiRuntimeServicesTableLib =20 -[Pcd] - gMarvellTokenSpaceGuid.PcdSpiFlashId - [Protocols] gMarvellSpiFlashProtocolGuid gMarvellSpiMasterProtocolGuid diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c b/Platform= /Marvell/Applications/SpiTool/SpiFlashCmd.c index 7c81bfc..68a6cf7 100644 --- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c +++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.c @@ -166,13 +166,8 @@ FlashProbe ( ) { EFI_STATUS Status; - UINT32 FlashIdLen; - UINT8 *FlashId; =20 - FlashId =3D (UINT8 *)PcdGetPtr (PcdSpiFlashId); - FlashIdLen =3D PcdGetSize (PcdSpiFlashId); - - Status =3D SpiFlashProtocol->ReadId (Slave, FlashIdLen, FlashId); + Status =3D SpiFlashProtocol->ReadId (Slave, FALSE); if (EFI_ERROR (Status)) { return SHELL_ABORTED; } diff --git a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf b/Platfo= rm/Marvell/Applications/SpiTool/SpiFlashCmd.inf index 887b9a5..a52906b 100644 --- a/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf +++ b/Platform/Marvell/Applications/SpiTool/SpiFlashCmd.inf @@ -44,6 +44,7 @@ SpiFlashCmd.uni =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec ShellPkg/ShellPkg.dec MdeModulePkg/MdeModulePkg.dec @@ -66,7 +67,6 @@ =20 [Pcd] gMarvellTokenSpaceGuid.PcdSpiFlashCs - gMarvellTokenSpaceGuid.PcdSpiFlashId gMarvellTokenSpaceGuid.PcdSpiFlashMode =20 [Protocols] diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Arma= da/Armada.dsc.inc index b9fc384..2cd96e6 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -33,6 +33,7 @@ ArmPlatformLib|Platform/Marvell/Armada/Library/Armada70x0Lib/Armada70x0L= ib.inf ComPhyLib|Platform/Marvell/Library/ComPhyLib/ComPhyLib.inf MppLib|Platform/Marvell/Library/MppLib/MppLib.inf + NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf UtmiPhyLib|Platform/Marvell/Library/UtmiPhyLib/UtmiPhyLib.inf =20 DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf diff --git a/Platform/Marvell/Armada/Armada70x0.dsc b/Platform/Marvell/Arma= da/Armada70x0.dsc index 4d5f55f..8e4cdb2 100644 --- a/Platform/Marvell/Armada/Armada70x0.dsc +++ b/Platform/Marvell/Armada/Armada70x0.dsc @@ -90,11 +90,6 @@ gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|10000000 gMarvellTokenSpaceGuid.PcdSpiClockFrequency|200000000 =20 - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd|0x70 - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|3 - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|65536 - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|256 - gMarvellTokenSpaceGuid.PcdSpiFlashId|{ 0x20, 0xBA, 0x18 } gMarvellTokenSpaceGuid.PcdSpiFlashMode|3 gMarvellTokenSpaceGuid.PcdSpiFlashCs|0 =20 diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/M= arvell/Drivers/Spi/Devices/MvSpiFlash.c index ab3ed6a..4a97ba9 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c @@ -107,10 +107,10 @@ MvSpiFlashWriteCommon ( UINT8 PollBit =3D STATUS_REG_POLL_WIP; UINT8 CheckStatus =3D 0x0; =20 - CmdStatus =3D (UINT8)PcdGet32 (PcdSpiFlashPollCmd); - if (CmdStatus =3D=3D CMD_FLAG_STATUS) { + if (Slave->Info->Flags & NOR_FLASH_WRITE_FSR) { + CmdStatus =3D CMD_FLAG_STATUS; PollBit =3D STATUS_REG_POLL_PEC; - CheckStatus =3D PollBit; + CheckStatus =3D STATUS_REG_POLL_PEC; } =20 // Send command @@ -177,12 +177,20 @@ MvSpiFlashErase ( ) { EFI_STATUS Status; - UINT32 AddrSize, EraseAddr; + UINT32 EraseAddr; UINTN EraseSize; UINT8 Cmd[5]; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); - EraseSize =3D PcdGet64 (PcdSpiFlashEraseSize); + if (Slave->Info->Flags & NOR_FLASH_ERASE_4K) { + Cmd[0] =3D CMD_ERASE_4K; + EraseSize =3D SIZE_4KB; + } else if (Slave->Info->Flags & NOR_FLASH_ERASE_32K) { + Cmd[0] =3D CMD_ERASE_32K; + EraseSize =3D SIZE_32KB; + } else { + Cmd[0] =3D CMD_ERASE_64K; + EraseSize =3D Slave->Info->SectorSize; + } =20 // Check input parameters if (Offset % EraseSize || Length % EraseSize) { @@ -191,30 +199,15 @@ MvSpiFlashErase ( return EFI_DEVICE_ERROR; } =20 - switch (EraseSize) { - case SIZE_4KB: - Cmd[0] =3D CMD_ERASE_4K; - break; - case SIZE_32KB: - Cmd[0] =3D CMD_ERASE_32K; - break; - case SIZE_64KB: - Cmd[0] =3D CMD_ERASE_64K; - break; - default: - DEBUG ((DEBUG_ERROR, "MvSpiFlash: Invalid EraseSize parameter\n")); - return EFI_INVALID_PARAMETER; - } - while (Length) { EraseAddr =3D Offset; =20 SpiFlashBank (Slave, EraseAddr); =20 - SpiFlashFormatAddress (EraseAddr, AddrSize, Cmd); + SpiFlashFormatAddress (EraseAddr, Slave->AddrSize, Cmd); =20 // Programm proper erase address - Status =3D MvSpiFlashWriteCommon (Slave, Cmd, AddrSize + 1, NULL, 0); + Status =3D MvSpiFlashWriteCommon (Slave, Cmd, Slave->AddrSize + 1, NUL= L, 0); if (EFI_ERROR (Status)) { DEBUG((DEBUG_ERROR, "SpiFlash: Error while programming target addr= ess\n")); return Status; @@ -236,11 +229,9 @@ MvSpiFlashRead ( { EFI_STATUS Status =3D EFI_SUCCESS; UINT8 Cmd[6]; - UINT32 AddrSize, ReadAddr, ReadLength, RemainLength; + UINT32 ReadAddr, ReadLength, RemainLength; UINTN BankSel =3D 0; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); - Cmd[0] =3D CMD_READ_ARRAY_FAST; =20 // Sign end of address with 0 byte @@ -257,9 +248,9 @@ MvSpiFlashRead ( } else { ReadLength =3D RemainLength; } - SpiFlashFormatAddress (ReadAddr, AddrSize, Cmd); + SpiFlashFormatAddress (ReadAddr, Slave->AddrSize, Cmd); // Program proper read address and read data - Status =3D MvSpiFlashReadCmd (Slave, Cmd, AddrSize + 2, Buf, Length); + Status =3D MvSpiFlashReadCmd (Slave, Cmd, Slave->AddrSize + 2, Buf, Le= ngth); =20 Offset +=3D ReadLength; Length -=3D ReadLength; @@ -280,10 +271,9 @@ MvSpiFlashWrite ( EFI_STATUS Status; UINTN ByteAddr, ChunkLength, ActualIndex, PageSize; UINT32 WriteAddr; - UINT8 Cmd[5], AddrSize; + UINT8 Cmd[5]; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); - PageSize =3D PcdGet32 (PcdSpiFlashPageSize); + PageSize =3D Slave->Info->PageSize; =20 Cmd[0] =3D CMD_PAGE_PROGRAM; =20 @@ -296,10 +286,10 @@ MvSpiFlashWrite ( =20 ChunkLength =3D MIN(Length - ActualIndex, (UINT64) (PageSize - ByteAdd= r)); =20 - SpiFlashFormatAddress (WriteAddr, AddrSize, Cmd); + SpiFlashFormatAddress (WriteAddr, Slave->AddrSize, Cmd); =20 // Program proper write address and write data - Status =3D MvSpiFlashWriteCommon (Slave, Cmd, AddrSize + 1, Buf + Actu= alIndex, + Status =3D MvSpiFlashWriteCommon (Slave, Cmd, Slave->AddrSize + 1, Buf= + ActualIndex, ChunkLength); if (EFI_ERROR (Status)) { DEBUG((DEBUG_ERROR, "SpiFlash: Error while programming write address= \n")); @@ -370,7 +360,7 @@ MvSpiFlashUpdate ( UINT64 SectorSize, ToUpdate, Scale =3D 1; UINT8 *TmpBuf, *End; =20 - SectorSize =3D PcdGet64 (PcdSpiFlashSectorSize); + SectorSize =3D Slave->Info->SectorSize; =20 End =3D Buf + ByteCount; =20 @@ -404,8 +394,7 @@ EFI_STATUS EFIAPI MvSpiFlashReadId ( IN SPI_DEVICE *SpiDev, - IN UINT32 DataByteCount, - IN OUT UINT8 *Buffer + IN BOOLEAN UseInRuntime ) { EFI_STATUS Status; @@ -425,9 +414,7 @@ MvSpiFlashReadId ( return Status; } =20 - if (CompareMem (Id, Buffer, DataByteCount) !=3D 0) { - Status =3D EFI_NOT_FOUND; - } + Status =3D NorFlashGetInfo (Id, &SpiDev->Info, UseInRuntime); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_ERROR, "%a: Unrecognized JEDEC Id bytes: 0x%02x%02x%02x\n", @@ -438,6 +425,8 @@ MvSpiFlashReadId ( return Status; } =20 + NorFlashPrintInfo (SpiDev->Info); + return EFI_SUCCESS; } =20 @@ -450,11 +439,14 @@ MvSpiFlashInit ( { EFI_STATUS Status; UINT8 Cmd, StatusRegister; - UINT32 AddrSize; =20 - AddrSize =3D PcdGet32 (PcdSpiFlashAddressCycles); + if (Slave->Info->Flags & NOR_FLASH_4B_ADDR) { + Slave->AddrSize =3D 4; + } else { + Slave->AddrSize =3D 3; + } =20 - if (AddrSize =3D=3D 4) { + if (Slave->AddrSize =3D=3D 4) { // Set 4 byte address mode Status =3D MvSpiFlashWriteEnableCmd (Slave); if (EFI_ERROR (Status)) { diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf b/Platform= /Marvell/Drivers/Spi/Devices/MvSpiFlash.inf index 4519b02..6587f69 100644 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf @@ -42,10 +42,12 @@ MvSpiFlash.h =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec =20 [LibraryClasses] + NorFlashInfoLib UefiBootServicesTableLib UefiDriverEntryPoint TimerLib @@ -53,13 +55,6 @@ DebugLib MemoryAllocationLib =20 -[FixedPcd] - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize - [Protocols] gMarvellSpiMasterProtocolGuid gMarvellSpiFlashProtocolGuid diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf b/Platform/Marvell/D= rivers/Spi/MvSpiDxe.inf index d38d331..08c6c04 100644 --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf @@ -42,10 +42,12 @@ MvSpiDxe.h =20 [Packages] + EmbeddedPkg/EmbeddedPkg.dec MdePkg/MdePkg.dec Platform/Marvell/Marvell.dec =20 [LibraryClasses] + NorFlashInfoLib UefiBootServicesTableLib UefiDriverEntryPoint TimerLib diff --git a/Platform/Marvell/Include/Protocol/Spi.h b/Platform/Marvell/Inc= lude/Protocol/Spi.h index ae78a31..6f26a36 100644 --- a/Platform/Marvell/Include/Protocol/Spi.h +++ b/Platform/Marvell/Include/Protocol/Spi.h @@ -34,6 +34,8 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #ifndef __MARVELL_SPI_MASTER_PROTOCOL_H__ #define __MARVELL_SPI_MASTER_PROTOCOL_H__ =20 +#include + extern EFI_GUID gMarvellSpiMasterProtocolGuid; =20 typedef struct _MARVELL_SPI_MASTER_PROTOCOL MARVELL_SPI_MASTER_PROTOCOL; @@ -49,6 +51,8 @@ typedef struct { INTN Cs; INTN MaxFreq; SPI_MODE Mode; + UINT32 AddrSize; + NOR_FLASH_INFO *Info; } SPI_DEVICE; =20 typedef diff --git a/Platform/Marvell/Include/Protocol/SpiFlash.h b/Platform/Marvel= l/Include/Protocol/SpiFlash.h index f65a12d..4a3053e 100644 --- a/Platform/Marvell/Include/Protocol/SpiFlash.h +++ b/Platform/Marvell/Include/Protocol/SpiFlash.h @@ -47,8 +47,6 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #define CMD_ERASE_64K 0xd8 #define CMD_4B_ADDR_ENABLE 0xb7 =20 -#define NOR_FLASH_MAX_ID_LEN 6 - extern EFI_GUID gMarvellSpiFlashProtocolGuid; =20 typedef struct _MARVELL_SPI_FLASH_PROTOCOL MARVELL_SPI_FLASH_PROTOCOL; @@ -64,8 +62,7 @@ typedef EFI_STATUS (EFIAPI *MV_SPI_FLASH_READ_ID) ( IN SPI_DEVICE *SpiDev, - IN UINT32 DataByteCount, - IN OUT UINT8 *Buffer + IN BOOLEAN UseInRuntime ); =20 typedef diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index 679a9d0..8255895 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -128,12 +128,6 @@ gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|0|UINT32|0x30000052 gMarvellTokenSpaceGuid.PcdSpiClockFrequency|0|UINT32|0x30000053 =20 - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd|0|UINT32|0x3000052 - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles|0|UINT32|0x3000053 - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize|0|UINT64|0x3000054 - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize|0|UINT32|0x3000055 - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize|65536|UINT64|0x3000059 - gMarvellTokenSpaceGuid.PcdSpiFlashId|{ 0x0 }|VOID*|0x3000056 gMarvellTokenSpaceGuid.PcdSpiFlashCs|0|UINT32|0x3000057 gMarvellTokenSpaceGuid.PcdSpiFlashMode|0|UINT32|0x3000058 =20 diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marve= ll/Documentation/PortingGuide.txt index cbe3bed..d5deed5 100644 --- a/Silicon/Marvell/Documentation/PortingGuide.txt +++ b/Silicon/Marvell/Documentation/PortingGuide.txt @@ -312,24 +312,6 @@ SpiFlash configuration =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Folowing PCDs for spi flash driver configuration must be set properly: =20 - - gMarvellTokenSpaceGuid.PcdSpiFlashAddressCycles - (Size of SPI flash address in bytes (3 or 4) ) - - - gMarvellTokenSpaceGuid.PcdSpiFlashEraseSize - (Size of minimal erase block in bytes) - - - gMarvellTokenSpaceGuid.PcdSpiFlashPageSize - (Size of SPI flash page) - - - gMarvellTokenSpaceGuid.PcdSpiFlashSectorSize - (Size of SPI flash sector, 65536 bytes by default) - - - gMarvellTokenSpaceGuid.PcdSpiFlashId - (Id of SPI flash) - - - gMarvellTokenSpaceGuid.PcdSpiFlashPollCmd - (Spi flash polling flag) - - gMarvellTokenSpaceGuid.PcdSpiFlashMode (Default SCLK mode (see SPI_MODE enum in file edk2-platforms/Platform/Marvell/Drivers/Spi/MvSpi.h)) --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel