From nobody Wed Dec 25 14:33:35 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1510044876681365.35925171015003; Tue, 7 Nov 2017 00:54:36 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 11DC62034D83E; Tue, 7 Nov 2017 00:50:36 -0800 (PST) Received: from NAM02-CY1-obe.outbound.protection.outlook.com (mail-cys01nam02on0049.outbound.protection.outlook.com [104.47.37.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 550562034D825 for ; Tue, 7 Nov 2017 00:50:34 -0800 (PST) Received: from BN6PR03CA0091.namprd03.prod.outlook.com (10.164.122.157) by DM5PR03MB2698.namprd03.prod.outlook.com (10.168.197.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.218.12; Tue, 7 Nov 2017 08:54:32 +0000 Received: from BL2FFO11FD012.protection.gbl (2a01:111:f400:7c09::122) by BN6PR03CA0091.outlook.office365.com (2603:10b6:405:6f::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.178.6 via Frontend Transport; Tue, 7 Nov 2017 08:54:31 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD012.mail.protection.outlook.com (10.173.161.18) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.20.178.5 via Frontend Transport; Tue, 7 Nov 2017 08:54:31 +0000 Received: from uefi-OptiPlex-790.ap.freescale.net (uefi-OptiPlex-790.ap.freescale.net [10.232.132.78]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id vA78s4Dc009319; Tue, 7 Nov 2017 01:54:28 -0700 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=104.47.37.49; helo=nam02-cy1-obe.outbound.protection.outlook.com; envelope-from=meenakshi.aggarwal@nxp.com; receiver=edk2-devel@lists.01.org Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com; Received-SPF: Fail (protection.outlook.com: domain of nxp.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; From: Meenakshi Aggarwal To: , , , Date: Tue, 7 Nov 2017 20:12:11 +0530 Message-ID: <1510065736-9394-6-git-send-email-meenakshi.aggarwal@nxp.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1510065736-9394-1-git-send-email-meenakshi.aggarwal@nxp.com> References: <1510065736-9394-1-git-send-email-meenakshi.aggarwal@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131545184717856993; (91ab9b29-cfa4-454e-5278-08d120cd25b8); () X-Forefront-Antispam-Report: CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(7966004)(336005)(346002)(39380400002)(39860400002)(376002)(2980300002)(1110001)(1109001)(339900001)(199003)(189002)(97736004)(85426001)(106466001)(105606002)(2906002)(104016004)(53936002)(8656006)(6666003)(16799955002)(86362001)(2201001)(2950100002)(4326008)(110136005)(16586007)(316002)(77096006)(15188155005)(47776003)(5660300001)(966005)(5003940100001)(8676002)(8936002)(81166006)(81156014)(305945005)(54906003)(53376002)(33646002)(498600001)(48376002)(68736007)(6306002)(189998001)(356003)(36756003)(50226002)(50466002)(76176999)(50986999)(326664003)(19627235001); DIR:OUT; SFP:1101; SCL:1; SRVR:DM5PR03MB2698; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; X-Microsoft-Exchange-Diagnostics: 1; BL2FFO11FD012; 1:86HVFxPiXnzJ1zd/8G+YQ8F93eAUQEYktmHybSxhAWVB0Quh9qMcyNbqxOazAU1/ZjfmpN/hhj9rpx24xH5OeXuo32L7+uS5+cLu5zVvv1IAcUCPqHLUHE86k2zewNJH MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e96d13e5-1d9e-44bf-ff80-08d525bd2979 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(22001)(4534020)(4628075)(201703131517081)(2017052603199); SRVR:DM5PR03MB2698; X-Microsoft-Exchange-Diagnostics: 1; DM5PR03MB2698; 3:M4BWPYU2o9N3mWYLnJWLMQya1ercc6GalOHPClXUIpVqn7fRrNlrG0vIXjvVA0OwM8HyGW64RjwfjSWMnsGOjMBxXh/zhExnzxflyef8WDxpTZPXndELCFA5FmeVfL7QwQRQ6oJWGytAdYfAxf4zS0wJuuG9npAu9Z9TBo62A6EqKhx4sTF2Lo+wFkz10PMGH6JsX9ebrzVTtA5MwGDTag3ikWzpWQl092Kjii1GbPPlbPnl0jYXsFTHVVCva1uLtlHoHaFIgB9UccAEV7KiykmfaXX1BFjHCysDpqWM1ofbZT+VrBGY1DI8wsOy+D8EvWBENR00GhXbgeJAbFnrJ02pyUtFbgs2LQ2xxqOSnpI=; 25:qpGVqKDg5H7feXPvQhvpVvp9jqu3oXyYz3+dERNjaxU6GZiDw0D7OO5nF7bIghAmIsdKGnDCs2wWsMHxMJqcyilPfkfQxIqxDwMdJLKkPdMr9Y49F5IGG1Nyw7ZGZ9zLmaK5ON5BfDHVphmCXb9i5AJPT+g3VwBcLf5ywQ5IylhBFAK/+ZZzuJijc/QXK75ZgZvRBfdadkoLiouHrsmd+QBeC2GLcssu1w9YpUp37HDA/F3RYYQlL59Jrsv1/dMLDu3vrRXWjsbi2jsepM0iH88v1vC1sIjUx6ZaBN7S6PG/mSd/Gf1k1MsTBGYjmXNrO7gL/ePje6zbgT1yIvFdwA== X-MS-TrafficTypeDiagnostic: DM5PR03MB2698: X-Microsoft-Exchange-Diagnostics: 1; DM5PR03MB2698; 31:zvxKjde1wODaGzRXPoLDvnO/kB80l5zDB3YzYU2wI0z8f/z+rr4hBt1CsIPdlUKEw8ERIhYlzEEhpJD/PILIvWtwdfeZBGVXOelpzJqnDeIEaONBMIG8Otl5MVAQHJjzgkUu6Iusz3D7YeQCcuqAmQYw4GulG+VaDA5G2dp4+Mivi58rdcSWop+C17BUOWg0A58DG1DtW1pnj5UOd8H5aA2miPUsxSOKjfkniNh8Qs0=; 4:3pzY370kJ3Ub1YcHpGiq/dic2UL9p4JPG0XPJYLce6IGkqJ1xRXjpgqCxa59FOibJBssTowTGGmqENPQx2eqcABV3rQIxZwoMXyVc3n9UQTnflTnV7Tds1BCMGOpydZv2KXoKa567KdcwKeOQUOqq6ThJogwq4n80XVXTeoNjPwRMFW087cEEiNQjlGeSsFihyJlOWHlXjGvVJB6FAUGhXFo8pxUyUb+A+LdJNGoNZo9SfGUr3qs0uOC6RtLiwhcRNW7uqlN2A3tDzI0oR7+coi249og88fnan4by21IFtUiUxbHpa0eZ0K4wprhvNy1kdfvKDdUsBYzw30NdvdQf58y1J/SoHC4O67YFRcqX7o= X-Exchange-Antispam-Report-Test: UriScan:(278428928389397)(185117386973197); X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(2401047)(5005006)(8121501046)(3002001)(10201501046)(100000703101)(100105400095)(3231021)(93006095)(93001095)(6055026)(2017110403001)(6096035)(20161123559100)(201703131430075)(201703131433075)(201703131441075)(201703131448075)(201703161259150)(20161123563025)(20161123565025)(20161123561025)(20161123556025)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:DM5PR03MB2698; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:DM5PR03MB2698; X-Forefront-PRVS: 0484063412 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; DM5PR03MB2698; 23:hUwIta9A9TF3sK32vyxpWJR5XvYRMPgcE+I4y7nIa?= =?us-ascii?Q?C23W2Ob1F285349QQuxJtBCPAtFKxOaX5+0TuSALoMCDy934G4jcfhmX67ef?= =?us-ascii?Q?irymnzM8Z+032ySunFijv9oI/UDr1oKbePKxeS5mNz9/ySlgN+UYpR41R7bF?= =?us-ascii?Q?7fxUXwSuRkbfm+heGhmwdFUfAd3RdWBo7/NCTCynLtfi/6QS4yTHV4kA+2d1?= =?us-ascii?Q?2Vkc4JueTZwvs/vONZAhd5A7wTVS4xIQ1NTzGyVBE5+hEG9XDUr1RpPkprtI?= =?us-ascii?Q?OC5Ly/h5xklLOMJenijc9qrfU0NXM2e5bRCkfY35GrSYCUUwxsYJiOtYM35S?= =?us-ascii?Q?ytCW16nrQsNPtkhVnvsSptmHE/kTILVuYTeOI92Lc2i2owveBVXfCgaqgrmf?= =?us-ascii?Q?3RIxDDNepY/ziGPqJayLHxC7it+V8hvHkWT7T66pa6XIBve6txbhLtiETJaG?= =?us-ascii?Q?ZZPHMH7hehnnm7D0zZRAMqxfW2Lxeqpqu5FkdIcKKS7b0daG6Ue2tw+8uUKX?= =?us-ascii?Q?lgoeADjJPmd8E5NAtxKJTGIDtUD0+UdSkthbwPBpnjjiTGvA/MEHUtwmDPbb?= =?us-ascii?Q?RU2HCqPQz9GKb8t8WeOu+58Zy+J8NC4D84X0iWfZBxuf0F8Agx4UFFkNr9OA?= =?us-ascii?Q?IUcUAmq5DEB7F0i7dxxnrvC5YWCW9uCZcAQeaWrhyN4cE94nYvIc3m4rKxqD?= =?us-ascii?Q?BSAkTVfUBvQpim6qTFv3LS/Rlv6I6Yiy/LGusvl9dfg5xZrhOeHKul2UI1kj?= =?us-ascii?Q?lm2ZmngDCOvKhROa3dDLNlf+EEfsQ5smnp9lbk689NaDYwnjskxLybxSuVES?= =?us-ascii?Q?fTYKa7O/8t7H08BKUKyK+QonrvGiGkydX/oXse1LzcYQkdpeVEzGl9CgiUlM?= =?us-ascii?Q?jUQxXglcLPX0ehdT71LYYKlFtGkSN5DWXALTeWPiJuXtkCxOdtsZDaSFpon/?= =?us-ascii?Q?wAE6qYv0fw48n8ld/xtDy/rRBpn5Exgz/u5zL6rxrG9YhxrRGQjkRTxCDsdx?= =?us-ascii?Q?IablKFvIMFQGc2oxbz9BXFBc2ul3YMYHK9LtaMLZhi74iFROTm5Lv3eO5zPY?= =?us-ascii?Q?bpJWynh0YIprEY4kuOxqIuTgf4RIDMjEppHh6r2HyOLWx006/7YjRwiyH+3m?= =?us-ascii?Q?7TgrDXTTnmHRDKV17wwxgZ/toc4lZFOIVGcWlsl9NovBEn5iZLCb41F79h0k?= =?us-ascii?Q?/pQbrAtVEDHRhWZAm0CtSe+cvEYOPMPfZ4TjiV6HEgy1ueatGo+gcVhJfFq1?= =?us-ascii?Q?qn+okQFB5pLgxKncmcOpJinRMXy0t0vzDRsTWnoKGyqf6dLcWdzAJaeOulsS?= =?us-ascii?Q?SPrG9Gasht/ybLLWNmvZZoL5w6uMtYG5V70g/T6D0If?= X-Microsoft-Exchange-Diagnostics: 1; DM5PR03MB2698; 6:vZX9fn2hfwHcqj1ZPDWsx9jCJCi19fajRIkJEPu9Hy6uEvf9eDAqp4R6KJxIVGdiYWY8h3xHi6o574xerlmYRXQKVHk8BdkG9jxZoTtfHprf7qDc3OrWrH8rmZQaUbRZRIcg/cGTQimt2Krvmmgw2R6OIuVvQZZkM6mtbRsjg7ylKfevy/k9PW9DHRjdf3IJ9LdInjACy08URgt5ihMpN3vK+/hu1noy8EvAi5RDP4N+iV+v80z2tAQ7IXCWW1jBw/Scl2B0CuH1EbWoj29wmSddY9UjTN8dRgwrNfTAQMoMk2E3s8qjEsSgwUkUZQbNa7hFphk8KuK2cpVV/jgD1y1ilZXBzX51q0Pmn+DOkJc=; 5:LUvmkOaneAaYAsqxVZ8U/U1BOdeXvrr7UMGlICFfxDwgwjnfXatC/82VQuRtjINmZgzQlBn0g2gDnTFGcUdSHf7W85uG9DeQBmTJ+q72DiqzcG4rLNdEPqIOlzuNARADHXeM7qqXUZ0L+4N7FAEljyfWPn+G+cf715h8Ybs6eJE=; 24:7tTZE018uKD+Pzmwe7dBjsrjqZ2h1EjkBGxxp26SZxKiAeJ2akZrcGg48eEca8oaGwseFRgxRlA7PSXTy3zQqXUXZMHnBbVhEMcxW0MuFs8=; 7:JmJBadaTsnFnCZg+tkUAnFgVuZyh2dWoITroiLmY7/RwgdOtH/DMzwVrbx/5TzsHJP/pk3RpMtZ6ytOHri9T9NZoPE/yvV5zIscRidT8GSHtaXL1H2gnaZEZ5jTBJ+PK7cHMwlr/HQq8PLfjky+BTy6Ox9USn4dh2lT1NmV5Rvrs6Gl7KzHOpC8JIUuK2tU8+Vz0j7h6CFIoNbK7T5ouvGf/irAumAI6szpg7NAIfY4x9hoQ30T8AxlJuzaDpT+H SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Nov 2017 08:54:31.6140 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e96d13e5-1d9e-44bf-ff80-08d525bd2979 X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR03MB2698 Subject: [edk2] [PATCH 05/10] Platform/NXP : Add support for DUART library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal --- Platform/NXP/Library/DUartPortLib/DUart.h | 128 ++++++++ Platform/NXP/Library/DUartPortLib/DUartPortLib.c | 334 +++++++++++++++++= ++++ Platform/NXP/Library/DUartPortLib/DUartPortLib.inf | 39 +++ 3 files changed, 501 insertions(+) create mode 100644 Platform/NXP/Library/DUartPortLib/DUart.h create mode 100644 Platform/NXP/Library/DUartPortLib/DUartPortLib.c create mode 100644 Platform/NXP/Library/DUartPortLib/DUartPortLib.inf diff --git a/Platform/NXP/Library/DUartPortLib/DUart.h b/Platform/NXP/Libra= ry/DUartPortLib/DUart.h new file mode 100644 index 0000000..907790b --- /dev/null +++ b/Platform/NXP/Library/DUartPortLib/DUart.h @@ -0,0 +1,128 @@ +/** DUart.h +* Header defining the DUART constants (Base addresses, sizes, flags) +* +* Based on Serial I/O Port library headers available in PL011Uart.h +* +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. +* Copyright (c) 2016, Freescale Semiconductor, Inc. All rights reserved. +* Copyright 2017 NXP +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the B= SD License +* which accompanies this distribution. The full text of the license may = be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +* +**/ + +#ifndef __DUART_H__ +#define __DUART_H__ + +// FIFO Control Register +#define DUART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define DUART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define DUART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define DUART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define DUART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range= */ +#define DUART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define DUART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define DUART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define DUART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ +#define DUART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define DUART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +// Modem Control Register +#define DUART_MCR_DTR 0x01 /* Reserved */ +#define DUART_MCR_RTS 0x02 /* RTS */ +#define DUART_MCR_OUT1 0x04 /* Reserved */ +#define DUART_MCR_OUT2 0x08 /* Reserved */ +#define DUART_MCR_LOOP 0x10 /* Enable loopback test mode */ +#define DUART_MCR_AFE 0x20 /* AFE (Auto Flow Control) */ +#define DUART_MCR_DMA_EN 0x04 +#define DUART_MCR_TX_DFR 0x08 + +// Line Control Register +/* +* Note: if the word length is 5 bits (DUART_LCR_WLEN5), then setting +* DUART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. +*/ +#define DUART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define DUART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define DUART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define DUART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define DUART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define DUART_LCR_STB 0x04 /* # stop Bits, off=3D1, on=3D1.5 = or 2) */ +#define DUART_LCR_PEN 0x08 /* Parity eneble */ +#define DUART_LCR_EPS 0x10 /* Even Parity Select */ +#define DUART_LCR_STKP 0x20 /* Stick Parity */ +#define DUART_LCR_SBRK 0x40 /* Set Break */ +#define DUART_LCR_BKSE 0x80 /* Bank select enable */ +#define DUART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +// Line Status Register +#define DUART_LSR_DR 0x01 /* Data ready */ +#define DUART_LSR_OE 0x02 /* Overrun */ +#define DUART_LSR_PE 0x04 /* Parity error */ +#define DUART_LSR_FE 0x08 /* Framing error */ +#define DUART_LSR_BI 0x10 /* Break */ +#define DUART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define DUART_LSR_TEMT 0x40 /* Xmitter empty */ +#define DUART_LSR_ERR 0x80 /* Error */ + +// Modem Status Register +#define DUART_MSR_DCTS 0x01 /* Delta CTS */ +#define DUART_MSR_DDSR 0x02 /* Reserved */ +#define DUART_MSR_TERI 0x04 /* Reserved */ +#define DUART_MSR_DDCD 0x08 /* Reserved */ +#define DUART_MSR_CTS 0x10 /* Clear to Send */ +#define DUART_MSR_DSR 0x20 /* Reserved */ +#define DUART_MSR_RI 0x40 /* Reserved */ +#define DUART_MSR_DCD 0x80 /* Reserved */ + +// Interrupt Identification Register +#define DUART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define DUART_IIR_ID 0x06 /* Mask for the interrupt ID */ +#define DUART_IIR_MSI 0x00 /* Modem status interrupt */ +#define DUART_IIR_THRI 0x02 /* Transmitter holding register em= pty */ +#define DUART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define DUART_IIR_RLSI 0x06 /* Receiver line status interrupt = */ + +// Interrupt Enable Register +#define DUART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define DUART_IER_RLSI 0x04 /* Enable receiver line status int= errupt */ +#define DUART_IER_THRI 0x02 /* Enable Transmitter holding regi= ster int. */ +#define DUART_IER_RDI 0x01 /* Enable receiver data interrupt = */ + +// LCR defaults +#define DUART_LCR_8N1 0x03 +#define DUART_LCRVAL DUART_LCR_8N1 /* 8 data, 1 sto= p, no parity */ +#define DUART_MCRVAL (DUART_MCR_DTR | \ + DUART_MCR_RTS) /* RTS/DTR */ +#define DUART_FCRVAL (DUART_FCR_FIFO_EN | \ + DUART_FCR_RXSR | \ + DUART_FCR_TXSR) /* Clear & enabl= e FIFOs */ + +#define URBR 0x0 +#define UTHR 0x0 +#define UDLB 0x0 +#define UDMB 0x1 +#define UIER 0x1 +#define UIIR 0x2 +#define UFCR 0x2 +#define UAFR 0x2 +#define ULCR 0x3 +#define UMCR 0x4 +#define ULSR 0x5 +#define UMSR 0x6 +#define USCR 0x7 +#define UDSR 0x10 + +extern +UINT32 +CalculateBaudDivisor ( + IN UINT64 BaudRate + ); + +#endif /* __DUART_H__ */ diff --git a/Platform/NXP/Library/DUartPortLib/DUartPortLib.c b/Platform/NX= P/Library/DUartPortLib/DUartPortLib.c new file mode 100644 index 0000000..99766d1 --- /dev/null +++ b/Platform/NXP/Library/DUartPortLib/DUartPortLib.c @@ -0,0 +1,334 @@ +/** DuartPortLib.c + DUART (NS16550) library functions + + Based on Serial I/O Port library functions available in PL011SerialPortL= ib.c + + Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+ Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.
+ Copyright (c) 2016, Freescale Semiconductor, Inc. All rights reserved. + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include +#include + +#include "DUart.h" + +STATIC CONST UINT32 mInvalidControlBits =3D (EFI_SERIAL_SOFTWARE_LOOPBACK_= ENABLE | \ + EFI_SERIAL_DATA_TERMINAL_READY); + +/** + Assert or deassert the control signals on a serial port. + The following control signals are set according their bit settings : + . Request to Send + . Data Terminal Ready + + @param[in] Control The following bits are taken into account : + . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the + "Request To Send" control signal if this bit is + equal to one/zero. + . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert + the "Data Terminal Ready" control signal if this + bit is equal to one/zero. + . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/dis= able + the hardware loopback if this bit is equal to + one/zero. + . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not suppor= ted. + . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/ + disable the hardware flow control based on CTS (= Clear + To Send) and RTS (Ready To Send) control signals. + + @retval EFI_SUCCESS The new control bits were set on the device. + @retval EFI_UNSUPPORTED The device does not support this operation. + +**/ +EFI_STATUS +EFIAPI +SerialPortSetControl ( + IN UINT32 Control + ) +{ + UINT32 McrBits; + UINTN UartBase; + + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + + if (Control & (mInvalidControlBits)) { + return EFI_UNSUPPORTED; + } + + McrBits =3D MmioRead8 (UartBase + UMCR); + + if (Control & EFI_SERIAL_REQUEST_TO_SEND) { + McrBits |=3D DUART_MCR_RTS; + } else { + McrBits &=3D ~DUART_MCR_RTS; + } + + if (Control & EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE) { + McrBits |=3D DUART_MCR_LOOP; + } else { + McrBits &=3D ~DUART_MCR_LOOP; + } + + if (Control & EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE) { + McrBits |=3D DUART_MCR_AFE; + } else { + McrBits &=3D ~DUART_MCR_AFE; + } + + MmioWrite32 (UartBase + UMCR, McrBits); + + return EFI_SUCCESS; +} + +/** + Retrieve the status of the control bits on a serial device. + + @param[out] Control Status of the control bits on a serial device : + + . EFI_SERIAL_DATA_CLEAR_TO_SEND, + EFI_SERIAL_DATA_SET_READY, + EFI_SERIAL_RING_INDICATE, + EFI_SERIAL_CARRIER_DETECT, + EFI_SERIAL_REQUEST_TO_SEND, + EFI_SERIAL_DATA_TERMINAL_READY + are all related to the DTE (Data Terminal Equip= ment) + and DCE (Data Communication Equipment) modes of + operation of the serial device. + . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if= the + receive buffer is empty, 0 otherwise. + . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one i= f the + transmit buffer is empty, 0 otherwise. + . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to = one if + the hardware loopback is enabled (the ouput fee= ds the + receive buffer), 0 otherwise. + . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to = one if + a loopback is accomplished by software, 0 other= wise. + . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal= to + one if the hardware flow control based on CTS (= Clear + To Send) and RTS (Ready To Send) control signal= s is + enabled, 0 otherwise. + + @retval EFI_SUCCESS The control bits were read from the serial devi= ce. + +**/ + +EFI_STATUS +EFIAPI +SerialPortGetControl ( + OUT UINT32 *Control + ) +{ + UINT32 MsrRegister; + UINT32 McrRegister; + UINT32 LsrRegister; + UINTN UartBase; + + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + + MsrRegister =3D MmioRead8 (UartBase + UMSR); + McrRegister =3D MmioRead8 (UartBase + UMCR); + LsrRegister =3D MmioRead8 (UartBase + ULSR); + + *Control =3D 0; + + if ((MsrRegister & DUART_MSR_CTS) =3D=3D DUART_MSR_CTS) { + *Control |=3D EFI_SERIAL_CLEAR_TO_SEND; + } + + if ((McrRegister & DUART_MCR_RTS) =3D=3D DUART_MCR_RTS) { + *Control |=3D EFI_SERIAL_REQUEST_TO_SEND; + } + + if ((LsrRegister & DUART_LSR_TEMT) =3D=3D DUART_LSR_TEMT) { + *Control |=3D EFI_SERIAL_OUTPUT_BUFFER_EMPTY; + } + + if ((McrRegister & DUART_MCR_AFE) =3D=3D DUART_MCR_AFE) { + *Control |=3D EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE; + } + + if ((McrRegister & DUART_MCR_LOOP) =3D=3D DUART_MCR_LOOP) { + *Control |=3D EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE; + } + + return EFI_SUCCESS; +} + +/** + Programmed hardware of Serial port. + + @return Always return EFI_SUCCESS. + +**/ + +EFI_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ + UINT64 BaudRate; + UINT32 BaudDivisor; + UINTN UartBase; + + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + BaudRate =3D (UINTN)PcdGet64 (PcdUartDefaultBaudRate); + + BaudDivisor =3D CalculateBaudDivisor(BaudRate); + + while (!(MmioRead8(UartBase + ULSR) & DUART_LSR_TEMT)); + + // + // Enable received data available interrupt, setup data format, + // setup baud divisor + // + MmioWrite8(UartBase + UIER, 0x1); + MmioWrite8(UartBase + ULCR, DUART_LCR_BKSE | DUART_LCRVAL); + MmioWrite8(UartBase + UDLB, 0); + MmioWrite8(UartBase + UDMB, 0); + MmioWrite8(UartBase + ULCR, DUART_LCRVAL); + MmioWrite8(UartBase + UMCR, DUART_MCRVAL); + MmioWrite8(UartBase + UFCR, DUART_FCRVAL); + MmioWrite8(UartBase + ULCR, DUART_LCR_BKSE | DUART_LCRVAL); + MmioWrite8(UartBase + UDLB, BaudDivisor & 0xff); + MmioWrite8(UartBase + UDMB, (BaudDivisor >> 8) & 0xff); + MmioWrite8(UartBase + ULCR, DUART_LCRVAL); + + return EFI_SUCCESS; +} + +/** + Write data to serial device. + + @param Buffer Point of data buffer which need to be written. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + + @retval 0 Write data failed. + @retval !0 Actual number of bytes written to serial device. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINT8 *Final; + UINTN UartBase; + + Final =3D &Buffer[NumberOfBytes]; + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + + while (Buffer < Final) { + while ((MmioRead8(UartBase + ULSR) & DUART_LSR_THRE) =3D=3D 0); + MmioWrite8(UartBase + UTHR, *Buffer++); + } + + return NumberOfBytes; +} + +/** + Read data from serial device and save the data in buffer. + + @param Buffer Point of data buffer which need to be written. + @param NumberOfBytes Number of output bytes which are cached in Buff= er. + + @retval 0 Read data failed. + @retval !0 Actual number of bytes read from serial device. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINTN Count; + UINTN UartBase; + + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + + for (Count =3D 0; Count < NumberOfBytes; Count++, Buffer++) { + /* + * Loop while waiting for a new char(s) to arrive in the + * RxFIFO + */ + while ((MmioRead8(UartBase + ULSR) & DUART_LSR_DR) =3D=3D 0); + + *Buffer =3D MmioRead8(UartBase + URBR); + } + + return NumberOfBytes; +} + +/** + Check to see if any data is available to be read from the debug device. + + @retval EFI_SUCCESS At least one byte of data is available to be r= ead + @retval EFI_NOT_READY No data is available to be read + @retval EFI_DEVICE_ERROR The serial device is not functioning properly + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + UINTN UartBase; + + UartBase =3D (UINTN)PcdGet64 (PcdSerialRegisterBase); + + return ((MmioRead8 (UartBase + ULSR) & DUART_LSR_DR) !=3D 0); +} + +/** + Set new attributes to LS1043a. + + @param BaudRate The baud rate of the serial device. If t= he baud rate is not supported, + the speed will be reduced down to the ne= arest supported one and the + variable's value will be updated accordi= ngly. + @param ReceiveFifoDepth The number of characters the device will= buffer on input. If the specified + value is not supported, the variable's v= alue will be reduced down to the + nearest supported one. + @param Timeout If applicable, the number of microsecond= s the device will wait + before timing out a Read or a Write oper= ation. + @param Parity If applicable, this is the EFI_PARITY_TY= PE that is computed or checked + as each character is transmitted or rece= ived. If the device does not + support parity, the value is the default= parity value. + @param DataBits The number of data bits in each character + @param StopBits If applicable, the EFI_STOP_BITS_TYPE nu= mber of stop bits per character. + If the device does not support stop bits= , the value is the default stop + bit value. + + @retval EFI_SUCCESS All attributes were set correctly on the= serial device. + +**/ +EFI_STATUS +EFIAPI +SerialPortSetAttributes ( + IN OUT UINT64 *BaudRate, + IN OUT UINT32 *ReceiveFifoDepth, + IN OUT UINT32 *Timeout, + IN OUT EFI_PARITY_TYPE *Parity, + IN OUT UINT8 *DataBits, + IN OUT EFI_STOP_BITS_TYPE *StopBits + ) +{ + return SerialPortInitialize (); +} diff --git a/Platform/NXP/Library/DUartPortLib/DUartPortLib.inf b/Platform/= NXP/Library/DUartPortLib/DUartPortLib.inf new file mode 100644 index 0000000..ead8b40 --- /dev/null +++ b/Platform/NXP/Library/DUartPortLib/DUartPortLib.inf @@ -0,0 +1,39 @@ +# DUartPortLib.inf +# +# Component description file for DUartPortLib module +# +# Copyright (c) 2013, Freescale Ltd. All rights reserved. +# Copyright 2017 NXP +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +# + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D DUartPortLib + FILE_GUID =3D 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D SerialPortLib + +[Sources.common] + DUartPortLib.c + +[LibraryClasses] + PcdLib + SocLib + +[Packages] + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel