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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN3PR03MB2353 Subject: [edk2] [PATCH 06/10] Platform/NXP: Add support for I2c operations library X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" I2C bus initialization and I2c read/write APIs added. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal --- Platform/NXP/Include/Library/I2c.h | 125 ++++++++ Platform/NXP/Library/I2cLib/I2cLib.c | 549 +++++++++++++++++++++++++++++= ++++ Platform/NXP/Library/I2cLib/I2cLib.h | 109 +++++++ Platform/NXP/Library/I2cLib/I2cLib.inf | 43 +++ 4 files changed, 826 insertions(+) create mode 100644 Platform/NXP/Include/Library/I2c.h create mode 100644 Platform/NXP/Library/I2cLib/I2cLib.c create mode 100644 Platform/NXP/Library/I2cLib/I2cLib.h create mode 100644 Platform/NXP/Library/I2cLib/I2cLib.inf diff --git a/Platform/NXP/Include/Library/I2c.h b/Platform/NXP/Include/Libr= ary/I2c.h new file mode 100644 index 0000000..c7195ab --- /dev/null +++ b/Platform/NXP/Include/Library/I2c.h @@ -0,0 +1,125 @@ +/** I2c.h + Header defining the constant, base address amd function for I2C controll= er + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#ifndef __I2C_H___ +#define __I2C_H__ + +#include + +#define I2C1 0 +#define I2C2 1 +#define I2C3 2 +#define I2C4 3 + +/// +/// Define the I2C flags +/// +#define I2C_READ_FLAG 0x1 +#define I2C_WRITE_FLAG 0x2 + +/** + Function to initialize i2c bus + + @param I2cBus I2c Controller number + @param Speed Value to be set + + @retval EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +I2cBusInit ( + IN UINT32 I2cBus, + IN UINT32 Speed + ); + +/** + Function to read data usin i2c + + @param I2cBus I2c Controller number + @param Chip Address of slave device from where data to be read + @param Offset Offset of slave memory + @param Alen Address length of slave + @param Buffer A pointer to the destination buffer for the data + @param Len Length of data to be read + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefin= ed time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +EFI_STATUS +I2cDataRead ( + IN UINT32 I2cBus, + IN UINT8 Chip, + IN UINT32 Offset, + IN UINT32 Alen, + OUT UINT8 *Buffer, + IN UINT32 Len + ); + +/** + Function to write data using i2c bus + + @param I2cBus I2c Controller number + @param Chip Address of slave device where data to b= e written + @param Offset Offset of slave memory + @param Alen Address length of slave + @param Buffer A pointer to the source buffer for the = data + @param Len Length of data to be write + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in p= redefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +EFI_STATUS +I2cDataWrite ( + IN UINT32 I2cBus, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen, + OUT UINT8 *Buffer, + IN INT32 Len + ); + +/** + Function to reset I2c + @param I2cBus I2c Controller number + + @return VOID +**/ +VOID +I2cReset ( + UINT32 I2cBus + ); + +/** + Function to Probe I2c slave device + @param I2cBus I2c Controller number + + @retval EFI_INVALID_PARAMETER Invalid I2c Controller number + @retval EFI_SUCCESS I2c device probed successfully + +**/ +EFI_STATUS +EFIAPI +I2cProbeDevices ( + IN INT16 I2cBus, + IN UINT8 Chip + ); + +#endif diff --git a/Platform/NXP/Library/I2cLib/I2cLib.c b/Platform/NXP/Library/I2= cLib/I2cLib.c new file mode 100644 index 0000000..574b899 --- /dev/null +++ b/Platform/NXP/Library/I2cLib/I2cLib.c @@ -0,0 +1,549 @@ +/** I2cLib.c + I2c Library containing functions for read, write, initialize, set speed = etc + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ +#include +#include +#include +#include +#include + +#include "I2cLib.h" + +EFI_PHYSICAL_ADDRESS I2cAddrArr[FixedPcdGet32(PcdNumI2cController)] =3D { + FixedPcdGet64(PcdI2c0BaseAddr), + FixedPcdGet64(PcdI2c1BaseAddr), + FixedPcdGet64(PcdI2c2BaseAddr), + FixedPcdGet64(PcdI2c3BaseAddr) +}; + +UINT16 ClkDiv[60][2] =3D { + { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, + { 28, 0x04 }, { 30, 0x05 }, { 32, 0x09 }, { 34, 0x06 }, + { 36, 0x0A }, { 40, 0x07 }, { 44, 0x0C }, { 48, 0x0D }, + { 52, 0x43 }, { 56, 0x0E }, { 60, 0x45 }, { 64, 0x12 }, + { 68, 0x0F }, { 72, 0x13 }, { 80, 0x14 }, { 88, 0x15 }, + { 96, 0x19 }, { 104, 0x16 }, { 112, 0x1A }, { 128, 0x17 }, + { 136, 0x4F }, { 144, 0x1C }, { 160, 0x1D }, { 176, 0x55 }, + { 192, 0x1E }, { 208, 0x56 }, { 224, 0x22 }, { 228, 0x24 }, + { 240, 0x1F }, { 256, 0x23 }, { 288, 0x5C }, { 320, 0x25 }, + { 384, 0x26 }, { 448, 0x2A }, { 480, 0x27 }, { 512, 0x2B }, + { 576, 0x2C }, { 640, 0x2D }, { 768, 0x31 }, { 896, 0x32 }, + { 960, 0x2F }, { 1024, 0x33 }, { 1152, 0x34 },{ 1280, 0x35 }, + { 1536, 0x36 }, { 1792, 0x3A }, { 1920, 0x37 }, { 2048, 0x3B }, + { 2304, 0x3C }, { 2560, 0x3D }, { 3072, 0x3E }, { 3584, 0x7A }, + { 3840, 0x3F }, { 4096, 0x7B }, { 5120, 0x7D }, { 6144, 0x7E }, +}; + +/** + Calculate and set proper clock divider + + @param Rate : clock rate + + @retval ClkDiv : Value used to get frequency divider value + +**/ +UINT8 +GetClk( + IN UINT32 Rate + ) +{ + UINTN ClkRate; + UINT32 Div; + UINT8 ClkDivx; + + ClkRate =3D CalculateI2cClockRate(); + + Div =3D (ClkRate + Rate - 1) / Rate; + + if (Div < ClkDiv[0][0]) { + ClkDivx =3D 0; + } else if (Div > ClkDiv[ARRAY_SIZE(ClkDiv) - 1][0]){ + ClkDivx =3D ARRAY_SIZE(ClkDiv) - 1; + } else { + for (ClkDivx =3D 0; ClkDiv[ClkDivx][0] < Div; ClkDivx++); + } + + return ClkDivx; +} + +/** + Function to reset I2c + @param I2cBus : I2c Controller number + + @return VOID +**/ + +VOID +I2cReset ( + IN UINT32 I2cBus + ) +{ + I2C_REGS *I2cRegs; + + I2cRegs =3D (I2C_REGS *)I2cAddrArr[I2cBus]; + + /** Reset module */ + MmioWrite8((UINTN)&I2cRegs->I2cCr, I2C_CR_IDIS); + MmioWrite8((UINTN)&I2cRegs->I2cSr, 0); +} + +/** + Function to set I2c bus speed + + @param I2cBus : I2c Controller number + @param Speed : Value to be set + + @retval EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +I2cSetBusSpeed ( + IN UINT32 I2cBus, + IN UINT32 Speed + ) +{ + I2C_REGS *I2cRegs; + UINT8 ClkId; + UINT8 SpeedId; + + I2cRegs =3D (I2C_REGS *)I2cAddrArr[I2cBus]; + + ASSERT(I2cRegs); + + ClkId =3D GetClk(Speed); + SpeedId =3D ClkDiv[ClkId][1]; + + /** Store divider value */ + MmioWrite8((UINTN)&I2cRegs->I2cFdr, SpeedId); + I2cReset(I2cBus); + + return EFI_SUCCESS; +} + +/** + Function used to check if i2c is in mentioned state or not + + @param I2cRegs : Pointer to I2C registers + @param State : i2c state need to be checked + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval CurrState Value of state register + +**/ +EFI_STATUS +WaitForI2cState ( + IN I2C_REGS *I2cRegs, + IN UINT32 State + ) +{ + UINT8 CurrState; + UINT64 Cnt; + + for (Cnt =3D 0; Cnt < 50; Cnt++) { + CurrState =3D MmioRead8((UINTN)&I2cRegs->I2cSr); + if (CurrState & I2C_SR_IAL) { + MmioWrite8((UINTN)&I2cRegs->I2cSr, CurrState | I2C_SR_IAL); + return EFI_NOT_READY; + } + + if ((CurrState & (State >> 8)) =3D=3D (UINT8)State) { + return CurrState; + } + + MicroSecondDelay(300); + } + + return EFI_TIMEOUT; +} + +/** + Function to transfer byte on i2c + + @param I2cRegs : Pointer to i2c registers + @param Byte : Byte to be transferred on i2c bus + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Data transfer was succesful + +**/ +EFI_STATUS +TransferByte ( + IN I2C_REGS *I2cRegs, + IN UINT8 Byte + ) +{ + EFI_STATUS Ret; + + MmioWrite8((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + MmioWrite8((UINTN)&I2cRegs->I2cDr, Byte); + + Ret =3D WaitForI2cState(I2cRegs, IIF); + if ((Ret =3D=3D EFI_TIMEOUT) || (Ret =3D=3D EFI_NOT_READY)) { + return Ret; + } + + if (Ret & I2C_SR_RX_NO_AK) { + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +/** + Function to stop transaction on i2c bus + + @param I2cRegs : Pointer to i2c registers + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval EFI_SUCCESS Stop operation was successful + +**/ +EFI_STATUS +I2cStop ( + IN I2C_REGS *I2cRegs + ) +{ + INT32 Ret; + UINT32 Temp; + + Temp =3D MmioRead8((UINTN)&I2cRegs->I2cCr); + + Temp &=3D ~(I2C_CR_MSTA | I2C_CR_MTX); + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + + Ret =3D WaitForI2cState(I2cRegs, BUS_IDLE); + + if (Ret < 0) { + return Ret; + } else { + return EFI_SUCCESS; + } +} + +/** + Function to send start signal, Chip Address and + memory offset + + @param I2cRegs : Pointer to i2c base registers + @param Chip : Chip Address + @param Offset : Slave memory's offset + @param Alen : length of chip address + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in predefine= d time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +EFI_STATUS +InitTransfer ( + IN I2C_REGS *I2cRegs, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen + ) +{ + UINT32 Temp; + EFI_STATUS Ret; + + /** Enable I2C controller */ + if (MmioRead8((UINTN)&I2cRegs->I2cCr) & I2C_CR_IDIS) { + MmioWrite8((UINTN)&I2cRegs->I2cCr, I2C_CR_IEN); + } + + if (MmioRead8((UINTN)&I2cRegs->I2cAdr) =3D=3D (Chip << 1)) { + MmioWrite8((UINTN)&I2cRegs->I2cAdr, (Chip << 1) ^ 2); + } + + MmioWrite8((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + Ret =3D WaitForI2cState(I2cRegs, BUS_IDLE); + if ((Ret =3D=3D EFI_TIMEOUT) || (Ret =3D=3D EFI_NOT_READY)) { + return Ret; + } + + /** Start I2C transaction */ + Temp =3D MmioRead8((UINTN)&I2cRegs->I2cCr); + /** set to master mode */ + Temp |=3D I2C_CR_MSTA; + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + + Ret =3D WaitForI2cState(I2cRegs, BUS_BUSY); + if ((Ret =3D=3D EFI_TIMEOUT) || (Ret =3D=3D EFI_NOT_READY)) { + return Ret; + } + + Temp |=3D I2C_CR_MTX | I2C_CR_TX_NO_AK; + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + + /** write slave Address */ + Ret =3D TransferByte(I2cRegs, Chip << 1); + if (Ret !=3D EFI_SUCCESS) { + return Ret; + } + + if (Alen >=3D 0) { + while (Alen--) { + Ret =3D TransferByte(I2cRegs, (Offset >> (Alen * 8)) & 0xff); + if (Ret !=3D EFI_SUCCESS) + return Ret; + } + } + return EFI_SUCCESS; +} + +/** + Function to check if i2c bud is idle + + @param Base : Pointer to base address of I2c controller + + @retval EFI_SUCCESS + +**/ +INT32 +I2cBusIdle ( + IN VOID *Base + ) +{ + return EFI_SUCCESS; +} + +/** + Function to initiate data transfer on i2c bus + + @param I2cRegs : Pointer to i2c base registers + @param Chip : Chip Address + @param Offset : Slave memory's offset + @param Alen : length of chip address + + @retval EFI_NOT_READY : Arbitration lost + @retval EFI_TIMEOUT : Failed to initialize data transfer in predefine= d time + @retval EFI_NOT_FOUND : ACK was not recieved + @retval EFI_SUCCESS : Read was successful + +**/ +EFI_STATUS +InitDataTransfer ( + IN I2C_REGS *I2cRegs, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen + ) +{ + EFI_STATUS Ret; + INT32 Retry; + + for (Retry =3D 0; Retry < 3; Retry++) { + Ret =3D InitTransfer(I2cRegs, Chip, Offset, Alen); + if (Ret =3D=3D EFI_SUCCESS) { + return EFI_SUCCESS; + } + + I2cStop(I2cRegs); + + if (EFI_NOT_FOUND =3D=3D Ret) { + return Ret; + } + + /** Disable controller */ + if (Ret !=3D EFI_NOT_READY) { + MmioWrite8((UINTN)&I2cRegs->I2cCr, I2C_CR_IDIS); + } + + if (I2cBusIdle(I2cRegs) < 0) { + break; + } + } + return Ret; +} + +/** + Function to read data using i2c bus + + @param I2cBus : I2c Controller number + @param Chip : Address of slave device from where data to = be read + @param Offset : Offset of slave memory + @param Alen : Address length of slave + @param Buffer : A pointer to the destination buffer for the= data + @param Len : Length of data to be read + + @retval EFI_NOT_READY : Arbitration lost + @retval EFI_TIMEOUT : Failed to initialize data transfer in prede= fined time + @retval EFI_NOT_FOUND : ACK was not recieved + @retval EFI_SUCCESS : Read was successful + +**/ +EFI_STATUS +I2cDataRead ( + IN UINT32 I2cBus, + IN UINT8 Chip, + IN UINT32 Offset, + IN UINT32 Alen, + IN UINT8 *Buffer, + IN UINT32 Len + ) +{ + EFI_STATUS Ret; + UINT32 Temp; + INT32 I; + I2C_REGS *I2cRegs; + + I2cRegs =3D (I2C_REGS *)I2cAddrArr[I2cBus]; + + Ret =3D InitDataTransfer(I2cRegs, Chip, Offset, Alen); + if (Ret !=3D EFI_SUCCESS) { + return Ret; + } + + Temp =3D MmioRead8((UINTN)&I2cRegs->I2cCr); + Temp |=3D I2C_CR_RSTA; + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + + Ret =3D TransferByte(I2cRegs, (Chip << 1) | 1); + if (Ret !=3D EFI_SUCCESS) { + I2cStop(I2cRegs); + return Ret; + } + + /** setup bus to read data */ + Temp =3D MmioRead8((UINTN)&I2cRegs->I2cCr); + Temp &=3D ~(I2C_CR_MTX | I2C_CR_TX_NO_AK); + if (Len =3D=3D 1) { + Temp |=3D I2C_CR_TX_NO_AK; + } + + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + MmioWrite8((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + + /** read data */ + /** Dummy Read to initiate recieve operation */ + MmioRead8((UINTN)&I2cRegs->I2cDr); + + for (I =3D 0; I < Len; I++) { + Ret =3D WaitForI2cState(I2cRegs, IIF); + if ((Ret =3D=3D EFI_TIMEOUT) || (Ret =3D=3D EFI_NOT_READY)) { + I2cStop(I2cRegs); + return Ret; + } + /** + It must generate STOP before read I2DR to prevent + controller from generating another clock cycle + **/ + if (I =3D=3D (Len - 1)) { + I2cStop(I2cRegs); + } else if (I =3D=3D (Len - 2)) { + Temp =3D MmioRead8((UINTN)&I2cRegs->I2cCr); + Temp |=3D I2C_CR_TX_NO_AK; + MmioWrite8((UINTN)&I2cRegs->I2cCr, Temp); + } + MmioWrite8((UINTN)&I2cRegs->I2cSr, I2C_SR_IIF_CLEAR); + Buffer[I] =3D MmioRead8((UINTN)&I2cRegs->I2cDr); + } + + I2cStop(I2cRegs); + + return EFI_SUCCESS; +} + +/** + Function to write data using i2c bus + + @param I2cBus : I2c Controller number + @param Chip : Address of slave device where data to be = written + @param Offset : Offset of slave memory + @param Alen : Address length of slave + @param Buffer : A pointer to the source buffer for the da= ta + @param Len : Length of data to be write + + @retval EFI_NOT_READY : Arbitration lost + @retval EFI_TIMEOUT : Failed to initialize data transfer in pre= defined time + @retval EFI_NOT_FOUND : ACK was not recieved + @retval EFI_SUCCESS : Read was successful + +**/ +EFI_STATUS +I2cDataWrite ( + IN UINT32 I2cBus, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen, + OUT UINT8 *Buffer, + IN INT32 Len + ) +{ + EFI_STATUS Ret; + I2C_REGS *I2cRegs; + INT32 I; + + I2cRegs =3D (I2C_REGS *)I2cAddrArr[I2cBus]; + + Ret =3D InitDataTransfer(I2cRegs, Chip, Offset, Alen); + if (Ret !=3D EFI_SUCCESS) { + return Ret; + } + + /** write data */ + /** Dummy write to initiate write operation */ + for (I =3D 0; I < Len; I++) { + Ret =3D TransferByte(I2cRegs, Buffer[I]); + if (Ret !=3D EFI_SUCCESS) { + break; + } + } + + I2cStop(I2cRegs); + return Ret; +} + +/** + Function to Probe i2c bus + + @param I2c : I2c Controller number + + @retval EFI_INVALID_PARAMETER : Input parametr I2c was invalid + @retval EFI_SUCCESS : I2c was initialized successfully + +**/ +EFI_STATUS +EFIAPI +I2cProbeDevices ( + IN INT16 I2c, + IN UINT8 ChipAdd + ) +{ + if(I2c >=3D PcdGet32(PcdNumI2cController) || I2cAddrArr[I2c] =3D=3D 0x0)= { + return EFI_INVALID_PARAMETER; + } + + return I2cDataWrite(I2c, ChipAdd, 0, 0, NULL, 0); +} + +/** + Function to initialize i2c bus + + @param I2cBus : I2c Controller number + @param Speed : value to be set +**/ +EFI_STATUS +EFIAPI +I2cBusInit ( + IN UINT32 I2cBus, + IN UINT32 Speed + ) +{ + return I2cSetBusSpeed(I2cBus, Speed); +} diff --git a/Platform/NXP/Library/I2cLib/I2cLib.h b/Platform/NXP/Library/I2= cLib/I2cLib.h new file mode 100644 index 0000000..61076f5 --- /dev/null +++ b/Platform/NXP/Library/I2cLib/I2cLib.h @@ -0,0 +1,109 @@ +/** I2cLib.h + Header defining the constant, base address amd function for I2C controll= er + + Copyright 2017 NXP + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#ifndef __I2C_H___ +#define __I2C_H__ + +#include + +#define I2C_CR_IIEN (1 << 6) +#define I2C_CR_MSTA (1 << 5) +#define I2C_CR_MTX (1 << 4) +#define I2C_CR_TX_NO_AK (1 << 3) +#define I2C_CR_RSTA (1 << 2) + +#define I2C_SR_ICF (1 << 7) +#define I2C_SR_IBB (1 << 5) +#define I2C_SR_IAL (1 << 4) +#define I2C_SR_IIF (1 << 1) +#define I2C_SR_RX_NO_AK (1 << 0) + +#define I2C_CR_IEN (0 << 7) +#define I2C_CR_IDIS (1 << 7) +#define I2C_SR_IIF_CLEAR (1 << 1) + +#define BUS_IDLE (0 | (I2C_SR_IBB << 8)) +#define BUS_BUSY (I2C_SR_IBB | (I2C_SR_IBB << 8)) +#define IIF (I2C_SR_IIF | (I2C_SR_IIF << 8)) + +/** + Record defining i2c registers +**/ +typedef struct { + UINT8 I2cAdr; + UINT8 I2cFdr; + UINT8 I2cCr; + UINT8 I2cSr; + UINT8 I2cDr; +} I2C_REGS ; + +/** + Function to set I2c bus speed + + @param I2cBus I2c Controller number + @param Speed Value to be set + + @retval EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +I2cSetBusSpeed ( + IN UINT32 I2cBus, + IN UINT32 Speed + ); + +/** + Function to stop transaction on i2c bus + + @param I2cRegs Pointer to i2c registers + + @retval EFI_NOT_READY Arbitration was lost + @retval EFI_TIMEOUT Timeout occured + @retval EFI_SUCCESS Stop operation was successful + +**/ +EFI_STATUS +I2cStop ( + IN I2C_REGS *I2cRegs + ); + +/** + Function to initiate data transfer on i2c bus + + @param I2cRegs Pointer to i2c base registers + @param Chip Chip Address + @param Offset Slave memory's offset + @param Alen length of chip address + + @retval EFI_NOT_READY Arbitration lost + @retval EFI_TIMEOUT Failed to initialize data transfer in p= redefined time + @retval EFI_NOT_FOUND ACK was not recieved + @retval EFI_SUCCESS Read was successful + +**/ +EFI_STATUS +I2cBusInitTransfer ( + IN I2C_REGS *I2cRegs, + IN UINT8 Chip, + IN UINT32 Offset, + IN INT32 Alen + ); + +UINT32 +CalculateI2cClockRate ( + VOID + ); + +#endif diff --git a/Platform/NXP/Library/I2cLib/I2cLib.inf b/Platform/NXP/Library/= I2cLib/I2cLib.inf new file mode 100644 index 0000000..427c3b8 --- /dev/null +++ b/Platform/NXP/Library/I2cLib/I2cLib.inf @@ -0,0 +1,43 @@ +# I2cLib.inf +# +# Component description file for I2cLib module +# +# Copyright 2017 NXP +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may b= e found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +# + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D I2cLib + FILE_GUID =3D 8ecefc8f-a2c4-4091-b81f-20f7aeb0567f + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D I2cLib + +[Sources.common] + I2cLib.c + +[LibraryClasses] + BaseLib + IoLib + SocLib + TimerLib + +[Packages] + MdePkg/MdePkg.dec + edk2-platforms/Platform/NXP/NxpQoriqLs.dec + +[Pcd] + gNxpQoriqLsTokenSpaceGuid.PcdI2c0BaseAddr + gNxpQoriqLsTokenSpaceGuid.PcdI2c1BaseAddr + gNxpQoriqLsTokenSpaceGuid.PcdI2c2BaseAddr + gNxpQoriqLsTokenSpaceGuid.PcdI2c3BaseAddr + gNxpQoriqLsTokenSpaceGuid.PcdNumI2cController --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel