From nobody Tue Dec 24 16:10:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511857175755835.2994745724067; Tue, 28 Nov 2017 00:19:35 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id F41A1220D4C15; Tue, 28 Nov 2017 00:15:11 -0800 (PST) Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E6B67220D4BF6 for ; Tue, 28 Nov 2017 00:15:09 -0800 (PST) Received: by mail-lf0-x244.google.com with SMTP id i14so35946128lfc.1 for ; Tue, 28 Nov 2017 00:19:32 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id j85sm79732lfh.53.2017.11.28.00.19.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Nov 2017 00:19:29 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TF8HYwzrUTKKlZzK4L6UeMS6DE1ToYhF7BApG+YHGeA=; b=cDfoZzsjnk5Gtb9TWl9f5vzJt3w+VAS0Per7qnBdJi9+5z02kTT7T16/jm+S8PI0yz hK498VGdRvq7MHSdww9eXAgiSyjaCwBCegdhqPsMFeJ2KXCvJXItkaQ3HGSV8tOSOWVa ipdzLGN5oKC5CxI2abAmu25rr6xdQK/WGvEjaPY9XqhXFbhtLLrp4xLBvmnFqHzpZFFp eHCX4g0xhmiPUQHGWiK5W00mxKgtrqFI5BDsf2GnTFFIJGfuh6C5/yoIr5Kz5AS8DuwE FE2ibbEizHsKSi6qk0eqZZrbwOq1bqZ+ka+LI2ZtwXcSiCMRYnLCGvcWwt65bYObfXgg KxBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TF8HYwzrUTKKlZzK4L6UeMS6DE1ToYhF7BApG+YHGeA=; b=YcwlexlvFMK+8uGAudxei4xrOgF5g5PurEOrPKfADnKD2ZVCDAldCOi5Z5uhRtQ6LC x1h23nqQxnWc+grvzqf8jfvIMQ5vATHFwQb2Jtq2QMhCTcQNNV7SU8+41R5iwRk0BfYc lezxL9xNyHNhukPt+xxyUpXKF8MOfyBcePI+tqrpFFRNDywp7gm+huc5TjJSatxZVE5U psBQlW3LgpEw88zPCi66fYw6G4ejjfuiD1wEkvpyOkqYF/dQ3aEifH4QfbySGG6wN4Ov /2YdTKJxbNhVQcWRuyQ/AFEWyVPJFkk2hDHUDs5RDXLJI7tvRHjq2jBO7ADKudPrHE49 /7rA== X-Gm-Message-State: AJaThX6HA5jp2DE1yfBb6lsv47OTZLD+lFrXvHkgvqX9ukSInza5JHn9 nYmfKBjqs/rBVhdjR8lkbmLLeUBwn84= X-Google-Smtp-Source: AGs4zMa3eC1N0u//9QXtTeyZwdXOhMEck/I4rB8CTILMkhnvZWXvvSx0QecFYNMKz7PT3NNw2IpfCg== X-Received: by 10.25.145.9 with SMTP id t9mr6304772lfd.145.1511857169922; Tue, 28 Nov 2017 00:19:29 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Tue, 28 Nov 2017 09:19:10 +0100 Message-Id: <1511857153-9266-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511857153-9266-1-git-send-email-mw@semihalf.com> References: <1511857153-9266-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v3 1/4] Platform/Marvell: Introduce MvFvbDxe variable support driver X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" MvFvbDxe driver introduces non-volatile EFI variable support for Armada platforms. It relies on memory-mapped SPI read access. Implementation of EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL is done with using existing Marvell SPI infrastructure (SpiMasterProtocol and SpiFlashProtocol), thanks to which this driver will be able to support various combinations of flash devices and host controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.c | 1138 +++++++++++++++= +++++ Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.h | 128 +++ Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf | 91 ++ Platform/Marvell/Marvell.dec | 1 + 4 files changed, 1358 insertions(+) diff --git a/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.c b/Platform/M= arvell/Drivers/Spi/Variables/MvFvbDxe.c new file mode 100644 index 0000000..252ef67 --- /dev/null +++ b/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.c @@ -0,0 +1,1138 @@ +/*++ @file MvFvbDxe.c + + Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2017 Marvell International Ltd.
+ + This program and the accompanying materials are licensed and made availab= le + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPL= IED. + + --*/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "MvFvbDxe.h" + +STATIC EFI_EVENT mFvbVirtualAddrChangeEvent; +STATIC FVB_DEVICE *mFvbDevice; + +STATIC CONST FVB_DEVICE mMvFvbFlashInstanceTemplate =3D { + { + 0, // SpiFlash Chip Select ... NEED TO BE FILLED + 0, // SpiFlash Maximum Frequency ... NEED TO BE FILLED + 0, // SpiFlash Transfer Mode ... NEED TO BE FILLED + 0, // SpiFlash Address Size ... NEED TO BE FILLED + NULL, // SpiFlash detailed information ... NEED TO BE FILLED + 0, // HostRegisterBaseAddress ... NEED TO BE FILLED + 0, // CoreClock ... NEED TO BE FILLED + }, // SpiDevice + + NULL, // SpiFlashProtocol ... NEED TO BE FILLED + NULL, // SpiMasterProtocol ... NEED TO BE FILLED + NULL, // Handle ... NEED TO BE FILLED + + FVB_FLASH_SIGNATURE, // Signature + + 0, // DeviceBaseAddress ... NEED TO BE FILLED + 0, // RegionBaseAddress ... NEED TO BE FILLED + SIZE_256KB, // Size + 0, // FvbOffset ... NEED TO BE FILLED + 0, // FvbSize ... NEED TO BE FILLED + 0, // StartLba + + { + 0, // MediaId ... NEED TO BE FILLED + FALSE, // RemovableMedia + TRUE, // MediaPresent + FALSE, // LogicalPartition + FALSE, // ReadOnly + FALSE, // WriteCaching; + 0, // BlockSize ... NEED TO BE FILLED + 4, // IoAlign + 0, // LastBlock ... NEED TO BE FILLED + 0, // LowestAlignedLba + 1, // LogicalBlocksPerPhysicalBlock + }, //Media; + + { + MvFvbGetAttributes, // GetAttributes + MvFvbSetAttributes, // SetAttributes + MvFvbGetPhysicalAddress, // GetPhysicalAddress + MvFvbGetBlockSize, // GetBlockSize + MvFvbRead, // Read + MvFvbWrite, // Write + MvFvbEraseBlocks, // EraseBlocks + NULL, // ParentHandle + }, // FvbProtocol; + + { + { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + { + (UINT8)sizeof (VENDOR_DEVICE_PATH), + (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8) + } + }, + { 0xfc0cb972, 0x21df, 0x44d2, { 0x92, 0xa5, 0x78, 0x98, 0x99, 0xcb, = 0xf6, 0x61 } } + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } + } + } // DevicePath +}; + +// +// The Firmware Volume Block Protocol is the low-level interface +// to a firmware volume. File-level access to a firmware volume +// should not be done using the Firmware Volume Block Protocol. +// Normal access to a firmware volume must use the Firmware +// Volume Protocol. Typically, only the file system driver that +// produces the Firmware Volume Protocol will bind to the +// Firmware Volume Block Protocol. +// + +/** + Initialises the FV Header and Variable Store Header + to support variable operations. + + @param[in] Ptr - Location to initialise the headers + +**/ +STATIC +EFI_STATUS +MvFvbInitFvAndVariableStoreHeaders ( + IN FVB_DEVICE *FlashInstance + ) +{ + EFI_FIRMWARE_VOLUME_HEADER *FirmwareVolumeHeader; + VARIABLE_STORE_HEADER *VariableStoreHeader; + EFI_STATUS Status; + VOID* Headers; + UINTN HeadersLength; + UINTN BlockSize; + + HeadersLength =3D sizeof (EFI_FIRMWARE_VOLUME_HEADER) + + sizeof (EFI_FV_BLOCK_MAP_ENTRY) + + sizeof (VARIABLE_STORE_HEADER); + Headers =3D AllocateZeroPool (HeadersLength); + + BlockSize =3D FlashInstance->Media.BlockSize; + + // + // FirmwareVolumeHeader->FvLength is declared to have the Variable area + // AND the FTW working area AND the FTW Spare contiguous. + // + ASSERT (PcdGet32 (PcdFlashNvStorageVariableBase) + + PcdGet32 (PcdFlashNvStorageVariableSize) =3D=3D + PcdGet32 (PcdFlashNvStorageFtwWorkingBase)); + ASSERT (PcdGet32 (PcdFlashNvStorageFtwWorkingBase) + + PcdGet32 (PcdFlashNvStorageFtwWorkingSize) =3D=3D + PcdGet32 (PcdFlashNvStorageFtwSpareBase)); + + // Check if the size of the area is at least one block size + ASSERT ((PcdGet32 (PcdFlashNvStorageVariableSize) > 0) && + (PcdGet32 (PcdFlashNvStorageVariableSize) / BlockSize > 0)); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingSize) > 0) && + (PcdGet32 (PcdFlashNvStorageFtwWorkingSize) / BlockSize > 0)); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareSize) > 0) && + (PcdGet32 (PcdFlashNvStorageFtwSpareSize) / BlockSize > 0)); + + // Ensure the Variable areas are aligned on block size boundaries + ASSERT ((PcdGet32 (PcdFlashNvStorageVariableBase) % BlockSize) =3D=3D 0); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwWorkingBase) % BlockSize) =3D=3D = 0); + ASSERT ((PcdGet32 (PcdFlashNvStorageFtwSpareBase) % BlockSize) =3D=3D 0); + + // + // EFI_FIRMWARE_VOLUME_HEADER + // + FirmwareVolumeHeader =3D (EFI_FIRMWARE_VOLUME_HEADER*)Headers; + CopyGuid (&FirmwareVolumeHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid= ); + FirmwareVolumeHeader->FvLength =3D FlashInstance->FvbSize; + FirmwareVolumeHeader->Signature =3D EFI_FVH_SIGNATURE; + FirmwareVolumeHeader->Attributes =3D EFI_FVB2_READ_ENABLED_CAP | + EFI_FVB2_READ_STATUS | + EFI_FVB2_STICKY_WRITE | + EFI_FVB2_MEMORY_MAPPED | + EFI_FVB2_ERASE_POLARITY | + EFI_FVB2_WRITE_STATUS | + EFI_FVB2_WRITE_ENABLED_CAP; + + FirmwareVolumeHeader->HeaderLength =3D sizeof (EFI_FIRMWARE_VOLUME_HEADE= R) + + sizeof (EFI_FV_BLOCK_MAP_ENTRY); + FirmwareVolumeHeader->Revision =3D EFI_FVH_REVISION; + FirmwareVolumeHeader->BlockMap[0].NumBlocks =3D FlashInstance->Media.Las= tBlock + 1; + FirmwareVolumeHeader->BlockMap[0].Length =3D FlashInstance->Media.BlockS= ize; + FirmwareVolumeHeader->BlockMap[1].NumBlocks =3D 0; + FirmwareVolumeHeader->BlockMap[1].Length =3D 0; + FirmwareVolumeHeader->Checksum =3D CalculateCheckSum16 ( + (UINT16 *)FirmwareVolumeHeader, + FirmwareVolumeHeader->HeaderLength); + + // + // VARIABLE_STORE_HEADER + // + VariableStoreHeader =3D (VOID *)((UINTN)Headers + + FirmwareVolumeHeader->HeaderLength); + CopyGuid (&VariableStoreHeader->Signature, &gEfiAuthenticatedVariableGui= d); + VariableStoreHeader->Size =3D PcdGet32(PcdFlashNvStorageVariableSize) - + FirmwareVolumeHeader->HeaderLength; + VariableStoreHeader->Format =3D VARIABLE_STORE_FORMATTED; + VariableStoreHeader->State =3D VARIABLE_STORE_HEALTHY; + + // Install the combined super-header in the flash device + Status =3D MvFvbWrite (&FlashInstance->FvbProtocol, 0, 0, &HeadersLength= , Headers); + + FreePool (Headers); + + return Status; +} + +/** + Check the integrity of firmware volume header. + + @param[in] FwVolHeader - A pointer to a firmware volume header + + @retval EFI_SUCCESS - The firmware volume is consistent + @retval EFI_NOT_FOUND - The firmware volume has been corrupted. + +**/ +STATIC +EFI_STATUS +MvFvbValidateFvHeader ( + IN FVB_DEVICE *FlashInstance + ) +{ + UINT16 Checksum; + EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader; + VARIABLE_STORE_HEADER *VariableStoreHeader; + UINTN VariableStoreLength; + + FwVolHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)FlashInstance->RegionBaseA= ddress; + + // Verify the header revision, header signature, length + if ((FwVolHeader->Revision !=3D EFI_FVH_REVISION) || + (FwVolHeader->Signature !=3D EFI_FVH_SIGNATURE) || + (FwVolHeader->FvLength !=3D FlashInstance->FvbSize)) { + DEBUG ((DEBUG_ERROR, + "%a: No Firmware Volume header present\n", + __FUNCTION__)); + return EFI_NOT_FOUND; + } + + // Check the Firmware Volume Guid + if (!CompareGuid (&FwVolHeader->FileSystemGuid, &gEfiSystemNvDataFvGuid)= ) { + DEBUG ((DEBUG_ERROR, + "%a: Firmware Volume Guid non-compatible\n", + __FUNCTION__)); + return EFI_NOT_FOUND; + } + + // Verify the header checksum + Checksum =3D CalculateSum16 ((UINT16 *)FwVolHeader, FwVolHeader->HeaderL= ength); + if (Checksum !=3D 0) { + DEBUG ((DEBUG_ERROR, + "%a: FV checksum is invalid (Checksum:0x%x)\n", + __FUNCTION__, + Checksum)); + return EFI_NOT_FOUND; + } + + VariableStoreHeader =3D (VOID *)((UINTN)FwVolHeader + FwVolHeader->Heade= rLength); + + // Check the Variable Store Guid + if (!CompareGuid (&VariableStoreHeader->Signature, &gEfiVariableGuid) && + !CompareGuid (&VariableStoreHeader->Signature, + &gEfiAuthenticatedVariableGuid)) { + DEBUG ((DEBUG_ERROR, + "%a: Variable Store Guid non-compatible\n", + __FUNCTION__)); + return EFI_NOT_FOUND; + } + + VariableStoreLength =3D PcdGet32 (PcdFlashNvStorageVariableSize) - + FwVolHeader->HeaderLength; + if (VariableStoreHeader->Size !=3D VariableStoreLength) { + DEBUG ((DEBUG_ERROR, + "%a: Variable Store Length does not match\n", + __FUNCTION__)); + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +/** + The GetAttributes() function retrieves the attributes and + current settings of the block. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL ins= tance. + + @param Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the attribut= es and + current settings are returned. + Type EFI_FVB_ATTRIBUTES_2 is defined in + EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were returned. + + **/ +EFI_STATUS +EFIAPI +MvFvbGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader; + EFI_FVB_ATTRIBUTES_2 *FlashFvbAttributes; + FVB_DEVICE *FlashInstance; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + FwVolHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *)FlashInstance->RegionBaseA= ddress; + FlashFvbAttributes =3D (EFI_FVB_ATTRIBUTES_2 *)&(FwVolHeader->Attributes= ); + + *Attributes =3D *FlashFvbAttributes; + + return EFI_SUCCESS; +} + +/** + The SetAttributes() function sets configurable firmware volume attributes + and returns the new settings of the firmware volume. + + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL insta= nce. + + @param Attributes On input, Attributes is a pointer to + EFI_FVB_ATTRIBUTES_2 that contains the de= sired + firmware volume settings. + On successful return, it contains the new + settings of the firmware volume. + + @retval EFI_SUCCESS The firmware volume attributes were retur= ned. + + @retval EFI_INVALID_PARAMETER The attributes requested are in conflict = with + the capabilities as declared in the firmw= are + volume header. + + **/ +EFI_STATUS +EFIAPI +MvFvbSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + EFI_FVB_ATTRIBUTES_2 OldAttributes; + EFI_FVB_ATTRIBUTES_2 FlashFvbAttributes; + EFI_FVB_ATTRIBUTES_2 UnchangedAttributes; + UINT32 Capabilities; + UINT32 OldStatus; + UINT32 NewStatus; + + // + // Obtain attributes from FVB header + // + MvFvbGetAttributes (This, &FlashFvbAttributes); + + OldAttributes =3D FlashFvbAttributes; + Capabilities =3D OldAttributes & EFI_FVB2_CAPABILITIES; + OldStatus =3D OldAttributes & EFI_FVB2_STATUS; + NewStatus =3D *Attributes & EFI_FVB2_STATUS; + + UnchangedAttributes =3D EFI_FVB2_READ_DISABLED_CAP | \ + EFI_FVB2_READ_ENABLED_CAP | \ + EFI_FVB2_WRITE_DISABLED_CAP | \ + EFI_FVB2_WRITE_ENABLED_CAP | \ + EFI_FVB2_LOCK_CAP | \ + EFI_FVB2_STICKY_WRITE | \ + EFI_FVB2_MEMORY_MAPPED | \ + EFI_FVB2_ERASE_POLARITY | \ + EFI_FVB2_READ_LOCK_CAP | \ + EFI_FVB2_WRITE_LOCK_CAP | \ + EFI_FVB2_ALIGNMENT; + + // + // Some attributes of FV is read only can *not* be set + // + if ((OldAttributes & UnchangedAttributes) ^ + (*Attributes & UnchangedAttributes)) { + return EFI_INVALID_PARAMETER; + } + // + // If firmware volume is locked, no status bit can be updated + // + if (OldAttributes & EFI_FVB2_LOCK_STATUS) { + if (OldStatus ^ NewStatus) { + return EFI_ACCESS_DENIED; + } + } + // + // Test read disable + // + if ((Capabilities & EFI_FVB2_READ_DISABLED_CAP) =3D=3D 0) { + if ((NewStatus & EFI_FVB2_READ_STATUS) =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + } + // + // Test read enable + // + if ((Capabilities & EFI_FVB2_READ_ENABLED_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_READ_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + // + // Test write disable + // + if ((Capabilities & EFI_FVB2_WRITE_DISABLED_CAP) =3D=3D 0) { + if ((NewStatus & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { + return EFI_INVALID_PARAMETER; + } + } + // + // Test write enable + // + if ((Capabilities & EFI_FVB2_WRITE_ENABLED_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_WRITE_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + // + // Test lock + // + if ((Capabilities & EFI_FVB2_LOCK_CAP) =3D=3D 0) { + if (NewStatus & EFI_FVB2_LOCK_STATUS) { + return EFI_INVALID_PARAMETER; + } + } + + FlashFvbAttributes =3D FlashFvbAttributes & (0xFFFFFFFF & (~EFI_FVB2_STA= TUS)); + FlashFvbAttributes =3D FlashFvbAttributes | NewStatus; + *Attributes =3D FlashFvbAttributes; + + return EFI_SUCCESS; +} + +/** + The GetPhysicalAddress() function retrieves the base address of + a memory-mapped firmware volume. This function should be called + only for memory-mapped firmware volumes. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Address Pointer to a caller-allocated + EFI_PHYSICAL_ADDRESS that, on successful + return from GetPhysicalAddress(), contains the + base address of the firmware volume. + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped. + + **/ +EFI_STATUS +EFIAPI +MvFvbGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ) +{ + FVB_DEVICE *FlashInstance; + + ASSERT (Address !=3D NULL); + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + *Address =3D FlashInstance->RegionBaseAddress; + + return EFI_SUCCESS; +} + +/** + The GetBlockSize() function retrieves the size of the requested + block. It also returns the number of additional blocks with + the identical size. The GetBlockSize() function is used to + retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER). + + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL insta= nce. + + @param Lba Indicates the block whose size to return + + @param BlockSize Pointer to a caller-allocated UINTN in wh= ich + the size of the block is returned. + + @param NumberOfBlocks Pointer to a caller-allocated UINTN in + which the number of consecutive blocks, + starting with Lba, is returned. All + blocks in this range have a size of + BlockSize. + + + @retval EFI_SUCCESS The firmware volume base address was retu= rned. + + @retval EFI_INVALID_PARAMETER The requested LBA is out of range. + + **/ +EFI_STATUS +EFIAPI +MvFvbGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumberOfBlocks + ) +{ + FVB_DEVICE *FlashInstance; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + if (Lba > FlashInstance->Media.LastBlock) { + DEBUG ((DEBUG_ERROR, + "%a: Error: Requested LBA %ld is beyond the last available LBA (%ld)= .\n", + __FUNCTION__, + Lba, + FlashInstance->Media.LastBlock)); + return EFI_INVALID_PARAMETER; + } else { + // Assume equal sized blocks in all flash devices + *BlockSize =3D (UINTN)FlashInstance->Media.BlockSize; + *NumberOfBlocks =3D (UINTN)(FlashInstance->Media.LastBlock - Lba + 1); + + return EFI_SUCCESS; + } +} + +/** + Reads the specified number of bytes into a buffer from the specified bloc= k. + + The Read() function reads the requested number of bytes from the + requested block and stores them in the provided buffer. + Implementations should be mindful that the firmware volume + might be in the ReadDisabled state. If it is in this state, + the Read() function must return the status code + EFI_ACCESS_DENIED without modifying the contents of the + buffer. The Read() function must also prevent spanning block + boundaries. If a read is requested that would span a block + boundary, the read must read up to the boundary but not + beyond. The output parameter NumBytes must be set to correctly + indicate the number of bytes actually read. The caller must be + aware that a read may be partially completed. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index from which t= o read + + @param Offset Offset into the block at which to begin readi= ng. + + @param NumBytes Pointer to a UINTN. + At entry, *NumBytes contains the total size o= f the + buffer. + At exit, *NumBytes contains the total number = of + bytes read. + + @param Buffer Pointer to a caller-allocated buffer that wil= l be + used to hold the data that is read. + + @retval EFI_SUCCESS The firmware volume was read successfully, and + contents are in Buffer. + + @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA boundary. + On output, NumBytes contains the total number= of + bytes returned in Buffer. + + @retval EFI_ACCESS_DENIED The firmware volume is in the ReadDisabled st= ate. + + @retval EFI_DEVICE_ERROR The block device is not functioning correctly= and + could not be read. + + **/ +EFI_STATUS +EFIAPI +MvFvbRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN OUT UINT8 *Buffer + ) +{ + FVB_DEVICE *FlashInstance; + UINTN BlockSize; + UINTN DataOffset; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + + // Cache the block size to avoid de-referencing pointers all the time + BlockSize =3D FlashInstance->Media.BlockSize; + + // + // The read must not span block boundaries. + // We need to check each variable individually because adding two large + // values together overflows. + // + if (Offset >=3D BlockSize || + *NumBytes > BlockSize || + (Offset + *NumBytes) > BlockSize) { + DEBUG ((DEBUG_ERROR, + "%a: Wrong buffer size: (Offset=3D0x%x + NumBytes=3D0x%x) > BlockSiz= e=3D0x%x\n", + __FUNCTION__, + Offset, + *NumBytes, + BlockSize)); + return EFI_BAD_BUFFER_SIZE; + } + + // No bytes to read + if (*NumBytes =3D=3D 0) { + return EFI_SUCCESS; + } + + DataOffset =3D GET_DATA_OFFSET (FlashInstance->RegionBaseAddress + Offse= t, + FlashInstance->StartLba + Lba, + FlashInstance->Media.BlockSize); + + // Read the memory-mapped data + CopyMem (Buffer, (UINTN *)DataOffset, *NumBytes); + + return EFI_SUCCESS; +} + +/** + Writes the specified number of bytes from the input buffer to the block. + + The Write() function writes the specified number of bytes from + the provided buffer to the specified block and offset. If the + firmware volume is sticky write, the caller must ensure that + all the bits of the specified range to write are in the + EFI_FVB_ERASE_POLARITY state before calling the Write() + function, or else the result will be unpredictable. This + unpredictability arises because, for a sticky-write firmware + volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY + state but cannot flip it back again. Before calling the + Write() function, it is recommended for the caller to first call + the EraseBlocks() function to erase the specified block to + write. A block erase cycle will transition bits from the + (NOT)EFI_FVB_ERASE_POLARITY state back to the + EFI_FVB_ERASE_POLARITY state. Implementations should be + mindful that the firmware volume might be in the WriteDisabled + state. If it is in this state, the Write() function must + return the status code EFI_ACCESS_DENIED without modifying the + contents of the firmware volume. The Write() function must + also prevent spanning block boundaries. If a write is + requested that spans a block boundary, the write must store up + to the boundary but not beyond. The output parameter NumBytes + must be set to correctly indicate the number of bytes actually + written. The caller must be aware that a write may be + partially completed. All writes, partial or otherwise, must be + fully flushed to the hardware before the Write() service + returns. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index to write to. + + @param Offset Offset into the block at which to begin writi= ng. + + @param NumBytes The pointer to a UINTN. + At entry, *NumBytes contains the total size o= f the + buffer. + At exit, *NumBytes contains the total number = of + bytes actually written. + + @param Buffer The pointer to a caller-allocated buffer that + contains the source for the write. + + @retval EFI_SUCCESS The firmware volume was written successfully. + + @retval EFI_BAD_BUFFER_SIZE The write was attempted across an LBA boundar= y. + On output, NumBytes contains the total number= of + bytes actually written. + + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabled s= tate. + + @retval EFI_DEVICE_ERROR The block device is malfunctioning and could = not be + written. + + + **/ +EFI_STATUS +EFIAPI +MvFvbWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + FVB_DEVICE *FlashInstance; + UINTN DataOffset; + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + DataOffset =3D GET_DATA_OFFSET (FlashInstance->FvbOffset + Offset, + FlashInstance->StartLba + Lba, + FlashInstance->Media.BlockSize); + + return FlashInstance->SpiFlashProtocol->Write (&FlashInstance->SpiDevice, + DataOffset, + *NumBytes, + Buffer); +} + +/** + Erases and initialises a firmware volume block. + + The EraseBlocks() function erases one or more blocks as denoted + by the variable argument list. The entire parameter list of + blocks must be verified before erasing any blocks. If a block is + requested that does not exist within the associated firmware + volume (it has a larger index than the last block of the + firmware volume), the EraseBlocks() function must return the + status code EFI_INVALID_PARAMETER without modifying the contents + of the firmware volume. Implementations should be mindful that + the firmware volume might be in the WriteDisabled state. If it + is in this state, the EraseBlocks() function must return the + status code EFI_ACCESS_DENIED without modifying the contents of + the firmware volume. All calls to EraseBlocks() must be fully + flushed to the hardware before the EraseBlocks() service + returns. + + @param This EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL + instance. + + @param ... The variable argument list is a list of t= uples. + Each tuple describes a range of LBAs to e= rase + and consists of the following: + - An EFI_LBA that indicates the starting = LBA + - A UINTN that indicates the number of bl= ocks + to erase. + + The list is terminated with an + EFI_LBA_LIST_TERMINATOR. + + @retval EFI_SUCCESS The erase request successfully completed. + + @retval EFI_ACCESS_DENIED The firmware volume is in the WriteDisabl= ed + state. + + @retval EFI_DEVICE_ERROR The block device is not functioning corre= ctly + and could not be written. + The firmware device may have been partial= ly + erased. + + @retval EFI_INVALID_PARAMETER One or more of the LBAs listed in the var= iable + argument list do not exist in the firmware + volume. + + **/ +EFI_STATUS +EFIAPI +MvFvbEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + ... + ) +{ + EFI_FVB_ATTRIBUTES_2 FlashFvbAttributes; + FVB_DEVICE *FlashInstance; + EFI_STATUS Status; + VA_LIST Args; + UINTN BlockAddress; // Physical address of Lba to erase + EFI_LBA StartingLba; // Lba from which we start erasing + UINTN NumOfLba; // Number of Lba blocks to erase + + FlashInstance =3D INSTANCE_FROM_FVB_THIS (This); + + Status =3D EFI_SUCCESS; + + // Detect WriteDisabled state + MvFvbGetAttributes (This, &FlashFvbAttributes); + if ((FlashFvbAttributes & EFI_FVB2_WRITE_STATUS) =3D=3D 0) { + DEBUG ((DEBUG_ERROR, + "%a: Device is in WriteDisabled state.\n", + __FUNCTION__)); + return EFI_ACCESS_DENIED; + } + + // + // Before erasing, check the entire list of parameters to ensure + // all specified blocks are valid. + // + VA_START (Args, This); + do { + // Get the Lba from which we start erasing + StartingLba =3D VA_ARG (Args, EFI_LBA); + + // Have we reached the end of the list? + if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { + //Exit the while loop + break; + } + + // How many Lba blocks are we requested to erase? + NumOfLba =3D VA_ARG (Args, UINT32); + + // All blocks must be within range + if (NumOfLba =3D=3D 0 || + (FlashInstance->StartLba + StartingLba + NumOfLba - 1) > + FlashInstance->Media.LastBlock) { + + DEBUG ((DEBUG_ERROR, + "%a: Error: Requested LBA are beyond the last available LBA (%ld).= \n", + __FUNCTION__, + FlashInstance->Media.LastBlock)); + + VA_END (Args); + + return EFI_INVALID_PARAMETER; + } + } while (TRUE); + VA_END (Args); + + // + // Start erasing + // + VA_START (Args, This); + do { + // Get the Lba from which we start erasing + StartingLba =3D VA_ARG (Args, EFI_LBA); + + // Have we reached the end of the list? + if (StartingLba =3D=3D EFI_LBA_LIST_TERMINATOR) { + // Exit the while loop + break; + } + + // How many Lba blocks are we requested to erase? + NumOfLba =3D VA_ARG (Args, UINT32); + + // Go through each one and erase it + while (NumOfLba > 0) { + + // Get the physical address of Lba to erase + BlockAddress =3D GET_DATA_OFFSET (FlashInstance->FvbOffset, + FlashInstance->StartLba + StartingLba, + FlashInstance->Media.BlockSize); + + // Erase single block + Status =3D FlashInstance->SpiFlashProtocol->Erase (&FlashInstance->S= piDevice, + BlockAddress, + FlashInstance->Media.Blo= ckSize); + if (EFI_ERROR (Status)) { + VA_END (Args); + return EFI_DEVICE_ERROR; + } + + // Move to the next Lba + StartingLba++; + NumOfLba--; + } + } while (TRUE); + VA_END (Args); + + return EFI_SUCCESS; +} + +/** + Fixup internal data so that EFI can be call in virtual mode. + Call the passed in Child Notify event and convert any pointers in + lib to virtual mode. + + @param[in] Event The Event that is being processed + @param[in] Context Event Context +**/ +STATIC +VOID +EFIAPI +MvFvbVirtualNotifyEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + // Convert SPI memory mapped region + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->RegionBaseAddress); + + // Convert SPI device description + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiDevice.Info); + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiDevice.HostRegisterBaseA= ddress); + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiDevice); + + // Convert SpiFlashProtocol + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiFlashProtocol->Erase); + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiFlashProtocol->Write); + EfiConvertPointer (0x0, (VOID**)&mFvbDevice->SpiFlashProtocol); + + return; +} + +STATIC +EFI_STATUS +MvFvbFlashProbe ( + IN FVB_DEVICE *FlashInstance + ) +{ + MARVELL_SPI_FLASH_PROTOCOL *SpiFlashProtocol; + EFI_STATUS Status; + + SpiFlashProtocol =3D FlashInstance->SpiFlashProtocol; + + // Read SPI flash ID + Status =3D SpiFlashProtocol->ReadId (&FlashInstance->SpiDevice, TRUE); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + + Status =3D SpiFlashProtocol->Init (SpiFlashProtocol, &FlashInstance->Spi= Device); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __FUNCTIO= N__)); + return EFI_DEVICE_ERROR; + } + + // + // SPI flash may require 20ms interval between enabling it and + // accessing in Direct Mode to its memory mapped content. + // + gBS->Stall (20000); + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +MvFvbPrepareFvHeader ( + IN FVB_DEVICE *FlashInstance + ) +{ + EFI_BOOT_MODE BootMode; + EFI_STATUS Status; + + // Check if it is required to use default environment + BootMode =3D GetBootModeHob (); + if (BootMode =3D=3D BOOT_WITH_DEFAULT_SETTINGS) { + Status =3D EFI_INVALID_PARAMETER; + } else { + // Validate header at the beginning of FV region + Status =3D MvFvbValidateFvHeader (FlashInstance); + } + + // Install the default FVB header if required + if (EFI_ERROR (Status)) { + // There is no valid header, so time to install one. + DEBUG ((DEBUG_ERROR, "%a: The FVB Header is not valid.\n", __FUNCTION_= _)); + DEBUG ((DEBUG_ERROR, + "%a: Installing a correct one for this volume.\n", + __FUNCTION__)); + + // Erase entire region that is reserved for variable storage + Status =3D FlashInstance->SpiFlashProtocol->Erase (&FlashInstance->Spi= Device, + FlashInstance->FvbOffset, + FlashInstance->FvbSize); + if (EFI_ERROR (Status)) { + return Status; + } + + // Install all appropriate headers + Status =3D MvFvbInitFvAndVariableStoreHeaders (FlashInstance); + if (EFI_ERROR (Status)) { + return Status; + } + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +MvFvbConfigureFlashInstance ( + IN OUT FVB_DEVICE *FlashInstance + ) +{ + EFI_STATUS Status; + + + // Locate SPI protocols + Status =3D gBS->LocateProtocol (&gMarvellSpiFlashProtocolGuid, + NULL, + (VOID **)&FlashInstance->SpiFlashProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiFlash protocol\n", __FUNCTI= ON__)); + return Status; + } + + Status =3D gBS->LocateProtocol (&gMarvellSpiMasterProtocolGuid, + NULL, + (VOID **)&FlashInstance->SpiMasterProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cannot locate SpiMaster protocol\n", __FUNCT= ION__)); + return Status; + } + + // Setup and probe SPI flash + FlashInstance->SpiMasterProtocol->SetupDevice (FlashInstance->SpiMasterP= rotocol, + &FlashInstance->SpiDevice, + 0, + 0); + + Status =3D MvFvbFlashProbe (FlashInstance); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: Error while performing SPI flash probe\n", + __FUNCTION__)); + return Status; + } + + // Fill remaining flash description + FlashInstance->DeviceBaseAddress =3D PcdGet32 (PcdSpiMemoryBase); + FlashInstance->RegionBaseAddress =3D FixedPcdGet32 (PcdFlashNvStorageVar= iableBase); + FlashInstance->FvbOffset =3D FlashInstance->RegionBaseAddress - + FlashInstance->DeviceBaseAddress; + FlashInstance->FvbSize =3D PcdGet32(PcdFlashNvStorageVariableSize) + + PcdGet32(PcdFlashNvStorageFtwWorkingSize) + + PcdGet32(PcdFlashNvStorageFtwSpareSize); + + FlashInstance->Media.MediaId =3D 0; + FlashInstance->Media.BlockSize =3D FlashInstance->SpiDevice.Info->Sector= Size; + FlashInstance->Media.LastBlock =3D FlashInstance->Size / + FlashInstance->Media.BlockSize - 1; + + Status =3D gBS->InstallMultipleProtocolInterfaces (&FlashInstance->Handl= e, + &gEfiDevicePathProtocolGuid, &FlashInstance->DevicePath, + &gEfiFirmwareVolumeBlockProtocolGuid, &FlashInstance->Fv= bProtocol, + NULL); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D MvFvbPrepareFvHeader (FlashInstance); + if (EFI_ERROR (Status)) { + goto ErrorPrepareFvbHeader; + } + + return EFI_SUCCESS; + +ErrorPrepareFvbHeader: + gBS->UninstallMultipleProtocolInterfaces (&FlashInstance->Handle, + &gEfiDevicePathProtocolGuid, + &gEfiFirmwareVolumeBlockProtocolGuid, + NULL); + + return Status; +} + +EFI_STATUS +EFIAPI +MvFvbEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + UINTN RuntimeMmioRegionSize; + UINTN RegionBaseAddress; + + // + // Create FVB flash device + // + mFvbDevice =3D AllocateRuntimeCopyPool (sizeof (mMvFvbFlashInstanceTempl= ate), + &mMvFvbFlashInstanceTemplate); + if (mFvbDevice =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + // + // Detect and configure flash device + // + Status =3D MvFvbConfigureFlashInstance (mFvbDevice); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Fail to configure Fvb SPI device\n", __FUNCT= ION__)); + goto ErrorConfigureFlash; + } + + // + // Declare the Non-Volatile storage as EFI_MEMORY_RUNTIME + // + RuntimeMmioRegionSize =3D mFvbDevice->FvbSize; + RegionBaseAddress =3D mFvbDevice->RegionBaseAddress; + + Status =3D gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, + RegionBaseAddress, + RuntimeMmioRegionSize, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__)= ); + goto ErrorAddSpace; + } + + Status =3D gDS->SetMemorySpaceAttributes (RegionBaseAddress, + RuntimeMmioRegionSize, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTI= ON__)); + goto ErrorSetMemAttr; + } + + // + // Register for the virtual address change event + // + Status =3D gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + MvFvbVirtualNotifyEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &mFvbVirtualAddrChangeEvent); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __FUN= CTION__)); + goto ErrorSetMemAttr; + } + + // + // Configure runtime access to host controller registers + // + Status =3D mFvbDevice->SpiMasterProtocol->ConfigRuntime (&mFvbDevice->Sp= iDevice); + if (EFI_ERROR (Status)) { + goto ErrorSetMemAttr; + } + + return Status; + +ErrorSetMemAttr: + gDS->RemoveMemorySpace (RegionBaseAddress, RuntimeMmioRegionSize); + +ErrorAddSpace: + gBS->UninstallMultipleProtocolInterfaces (&mFvbDevice->Handle, + &gEfiDevicePathProtocolGuid, + &gEfiFirmwareVolumeBlockProtocolGuid, + NULL); + +ErrorConfigureFlash: + FreePool (mFvbDevice); + + return Status; +} diff --git a/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.h b/Platform/M= arvell/Drivers/Spi/Variables/MvFvbDxe.h new file mode 100644 index 0000000..31e6e44 --- /dev/null +++ b/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.h @@ -0,0 +1,128 @@ +/** @file MvFvbDxe.h + + Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
+ Copyright (c) 2017 Marvell International Ltd.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#ifndef __FVB_FLASH_DXE_H__ +#define __FVB_FLASH_DXE_H__ + +#include +#include +#include +#include + +#define GET_DATA_OFFSET(BaseAddr, Lba, LbaSize) ((BaseAddr) + (UINTN)((Lba= ) * (LbaSize))) + +#define FVB_FLASH_SIGNATURE SIGNATURE_32('S', 'n', '= o', 'r') +#define INSTANCE_FROM_FVB_THIS(a) CR(a, FVB_DEVICE, FvbPro= tocol, FVB_FLASH_SIGNATURE) + +// +// Define two helper macro to extract the Capability field or Status field= in FVB +// bit fields. +// +#define EFI_FVB2_CAPABILITIES (EFI_FVB2_READ_DISABLED_CAP | \ + EFI_FVB2_READ_ENABLED_CAP | \ + EFI_FVB2_WRITE_DISABLED_CAP | \ + EFI_FVB2_WRITE_ENABLED_CAP | \ + EFI_FVB2_LOCK_CAP) + +#define EFI_FVB2_STATUS (EFI_FVB2_READ_STATUS | \ + EFI_FVB2_WRITE_STATUS | \ + EFI_FVB2_LOCK_STATUS) + +typedef struct { + VENDOR_DEVICE_PATH Vendor; + EFI_DEVICE_PATH_PROTOCOL End; +} FVB_DEVICE_PATH; + +typedef struct { + SPI_DEVICE SpiDevice; + + MARVELL_SPI_FLASH_PROTOCOL *SpiFlashProtocol; + MARVELL_SPI_MASTER_PROTOCOL *SpiMasterProtocol; + + EFI_HANDLE Handle; + + UINT32 Signature; + + UINTN DeviceBaseAddress; + UINTN RegionBaseAddress; + UINTN Size; + UINTN FvbOffset; + UINTN FvbSize; + EFI_LBA StartLba; + + EFI_BLOCK_IO_MEDIA Media; + EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol; + + FVB_DEVICE_PATH DevicePath; +} FVB_DEVICE; + +EFI_STATUS +EFIAPI +MvFvbGetAttributes( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + OUT EFI_FVB_ATTRIBUTES_2* Attributes +); + +EFI_STATUS +EFIAPI +MvFvbSetAttributes( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + IN OUT EFI_FVB_ATTRIBUTES_2* Attributes +); + +EFI_STATUS +EFIAPI +MvFvbGetPhysicalAddress( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + OUT EFI_PHYSICAL_ADDRESS* Address +); + +EFI_STATUS +EFIAPI +MvFvbGetBlockSize( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + IN EFI_LBA Lba, + OUT UINTN* BlockSize, + OUT UINTN* NumberOfBlocks +); + +EFI_STATUS +EFIAPI +MvFvbRead( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN* NumBytes, + IN OUT UINT8* Buffer +); + +EFI_STATUS +EFIAPI +MvFvbWrite( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN* NumBytes, + IN UINT8* Buffer +); + +EFI_STATUS +EFIAPI +MvFvbEraseBlocks( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL* This, + ... +); + +#endif /* __FVB_FLASH_DXE_H__ */ diff --git a/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf b/Platform= /Marvell/Drivers/Spi/Variables/MvFvbDxe.inf new file mode 100644 index 0000000..5d73c21 --- /dev/null +++ b/Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf @@ -0,0 +1,91 @@ +# +# Marvell BSD License Option +# +# If you received this File from Marvell, you may opt to use, redistribute +# and/or modify this File under the following licensing terms. +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are m= et: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS = IS" +# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPO= SE ARE +# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIA= BLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTI= AL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS = OR +# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEV= ER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABI= LITY, +# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF TH= E USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D MvFvbDxe + FILE_GUID =3D 42903750-7e61-4aaf-8329-bf42364e2485 + MODULE_TYPE =3D DXE_RUNTIME_DRIVER + VERSION_STRING =3D 0.1 + ENTRY_POINT =3D MvFvbEntryPoint + +[Sources] + MvFvbDxe.c + +[Packages] + ArmPlatformPkg/ArmPlatformPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/Marvell/Marvell.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + DxeServicesTableLib + HobLib + IoLib + MemoryAllocationLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + UefiRuntimeLib + UefiRuntimeServicesTableLib + +[Guids] + gEfiAuthenticatedVariableGuid + gEfiEventVirtualAddressChangeGuid + gEfiSystemNvDataFvGuid + gEfiVariableGuid + +[Protocols] + gEfiDevicePathProtocolGuid + gEfiFirmwareVolumeBlockProtocolGuid + gMarvellSpiFlashProtocolGuid + gMarvellSpiMasterProtocolGuid + +[FixedPcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize + gMarvellTokenSpaceGuid.PcdSpiMemoryBase + +[Depex] + # + # MvFvbDxe must be loaded before VariableRuntimeDxe in case empty + # flash needs populating with default values. + # + BEFORE gVariableRuntimeDxeFileGuid diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index 8255895..6aa2a8d 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -125,6 +125,7 @@ =20 #SPI gMarvellTokenSpaceGuid.PcdSpiRegBase|0|UINT32|0x3000051 + gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0|UINT32|0x3000059 gMarvellTokenSpaceGuid.PcdSpiMaxFrequency|0|UINT32|0x30000052 gMarvellTokenSpaceGuid.PcdSpiClockFrequency|0|UINT32|0x30000053 =20 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Dec 24 16:10:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511857177817491.96955997793464; Tue, 28 Nov 2017 00:19:37 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3E8CE220D4C1F; Tue, 28 Nov 2017 00:15:12 -0800 (PST) Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CB7042034A794 for ; Tue, 28 Nov 2017 00:15:10 -0800 (PST) Received: by mail-lf0-x244.google.com with SMTP id x68so35967705lff.0 for ; Tue, 28 Nov 2017 00:19:33 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id j85sm79732lfh.53.2017.11.28.00.19.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Nov 2017 00:19:30 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=sh+zpDaf8hZLjL+yWVlPN+f9yJEMf/6VbQW/QuShxjo=; b=UmEken4xcLvtgjmHOu2rtZHfhNwUp4tqOvvwYvOGgWtjmmJHI4+kxYBC/AkR4f0mis KC8lumFxMQ5j45r88JdAJgFNjwalge74p+kiZFJgSks+x4YnMIBAqWIc0UabUhWppO5S 34YeOnfBoBtYQnRjdE2nnbx5i1+IXciKK2nl6hYBAJ8WsufbMLpSVMQXFpZSB1hhPA9g eC+paUJqmis0t0q7dRSDggsAEo3l+OVMYwIb5lHgAkSzlF04TzxtfXM+eBa5L5NXi2YL hffe+bW2gn8xqNB/jYvvR0IETWap+8FP8YGjwZrLItyZeY1YtEAm3F50oN5hWY2dcnkE ruhQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=sh+zpDaf8hZLjL+yWVlPN+f9yJEMf/6VbQW/QuShxjo=; b=m5+DnPaxqif4fGa2nQl0BBj88M37Kghfl3irCL/NFg07hrAeRvOY0RHKpFXQeoqut/ 0ukUDS4Cfn7/M/nEVc6B8Z809wLp0Ygd6LA2wm0M1y7ID6R8Wv1Up5VUTNzv/YvLYEeG sCr/AbtaNwUHFQgaBdiSf86d5WQ0vlBZXS4C3ssGej28YDrfdFfoSYyoiYA7iAGjW734 2ozKqLTF8NjJbDHbP4ZAIuhO1YSMTRQVQnQTQe8rtAhynwDGq5uiJEI3LGEbbINeL89Q iMbirOMNnfmZH/wi8AxJqnHxcBxUryIpCjXyU22ZRRVUk3Lphlu/ykOOzjk49P+ljCig s6Yw== X-Gm-Message-State: AJaThX4A/aTfkD7eA7W5nCk7oTVY3qccgRManm4IT/GiQ6YosXJMLevJ ULQU7eobBcTQDWC33BpsUDWGbrKXXDc= X-Google-Smtp-Source: AGs4zMa3JNvwvwWApBc5QDVj/iwIF7KMlc1b2ja96mG/fcNjQAZBnKbUf3lRGyD8UVsXWWBqfQd+iA== X-Received: by 10.25.157.143 with SMTP id g137mr3436857lfe.6.1511857171782; Tue, 28 Nov 2017 00:19:31 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Tue, 28 Nov 2017 09:19:11 +0100 Message-Id: <1511857153-9266-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511857153-9266-1-git-send-email-mw@semihalf.com> References: <1511857153-9266-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v3 2/4] Marvell/Drivers: MvSpiFlash: Enable using driver in RT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This patch applies necessary modifications, which allow to use MvSpiFlash driver in variable support as a runtime service. Its type is modified to DXE_RUNTIME_DRIVER, as well as an event is created, which converts the pointers to the SpiMasterProtocol and its routines. In order to ensure proper execution of the MvFvbDxe driver, configure initialization order with Depex entry. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c | 58 +++++++++++++++++= +-- Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h | 1 + Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf | 11 +++- Platform/Marvell/Marvell.dec | 2 + 4 files changed, 66 insertions(+), 6 deletions(-) diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c b/Platform/M= arvell/Drivers/Spi/Devices/MvSpiFlash.c index 456d9f9..6886d01 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.c @@ -33,6 +33,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. **************************************************************************= *****/ #include "MvSpiFlash.h" =20 +STATIC EFI_EVENT mMvSpiFlashVirtualAddrChangeEvent; MARVELL_SPI_MASTER_PROTOCOL *SpiMasterProtocol; SPI_FLASH_INSTANCE *mSpiFlashInstance; =20 @@ -503,6 +504,33 @@ MvSpiFlashInitProtocol ( return EFI_SUCCESS; } =20 +/** + Fixup internal data so that EFI can be call in virtual mode. + Call the passed in Child Notify event and convert any pointers in + lib to virtual mode. + + @param[in] Event The Event that is being processed + @param[in] Context Event Context +**/ +STATIC +VOID +EFIAPI +MvSpiFlashVirtualNotifyEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + // + // Convert SpiMasterProtocol callbacks in MvSpiFlashErase and + // MvSpiFlashWrite required by runtime variable support. + // + EfiConvertPointer (0x0, (VOID**)&SpiMasterProtocol->ReadWrite); + EfiConvertPointer (0x0, (VOID**)&SpiMasterProtocol->Transfer); + EfiConvertPointer (0x0, (VOID**)&SpiMasterProtocol); + + return; +} + EFI_STATUS EFIAPI MvSpiFlashEntryPoint ( @@ -522,8 +550,7 @@ MvSpiFlashEntryPoint ( return EFI_DEVICE_ERROR; } =20 - mSpiFlashInstance =3D AllocateZeroPool (sizeof (SPI_FLASH_INSTANCE)); - + mSpiFlashInstance =3D AllocateRuntimeZeroPool (sizeof (SPI_FLASH_INSTANC= E)); if (mSpiFlashInstance =3D=3D NULL) { DEBUG((DEBUG_ERROR, "SpiFlash: Cannot allocate memory\n")); return EFI_OUT_OF_RESOURCES; @@ -540,10 +567,33 @@ MvSpiFlashEntryPoint ( NULL ); if (EFI_ERROR (Status)) { - FreePool (mSpiFlashInstance); DEBUG((DEBUG_ERROR, "SpiFlash: Cannot install SPI flash protocol\n")); - return EFI_DEVICE_ERROR; + goto ErrorInstallProto; + } + + // + // Register for the virtual address change event + // + Status =3D gBS->CreateEventEx (EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + MvSpiFlashVirtualNotifyEvent, + NULL, + &gEfiEventVirtualAddressChangeGuid, + &mMvSpiFlashVirtualAddrChangeEvent); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to register VA change event\n", __FUN= CTION__)); + goto ErrorCreateEvent; } =20 return EFI_SUCCESS; + +ErrorCreateEvent: + gBS->UninstallMultipleProtocolInterfaces (&mSpiFlashInstance->Handle, + &gMarvellSpiFlashProtocolGuid, + NULL); + +ErrorInstallProto: + FreePool (mSpiFlashInstance); + + return EFI_SUCCESS; } diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h b/Platform/M= arvell/Drivers/Spi/Devices/MvSpiFlash.h index f09ff50..f69c562 100755 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.h @@ -42,6 +42,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #include #include #include +#include =20 #include #include diff --git a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf b/Platform= /Marvell/Drivers/Spi/Devices/MvSpiFlash.inf index 6587f69..c6bbe5e 100644 --- a/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf +++ b/Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf @@ -33,7 +33,7 @@ INF_VERSION =3D 0x00010005 BASE_NAME =3D SpiFlashDxe FILE_GUID =3D 49d7fb74-306d-42bd-94c8-c0c54b181dd7 - MODULE_TYPE =3D DXE_DRIVER + MODULE_TYPE =3D DXE_RUNTIME_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D MvSpiFlashEntryPoint =20 @@ -54,10 +54,17 @@ UefiLib DebugLib MemoryAllocationLib + UefiRuntimeLib + +[Guids] + gEfiEventVirtualAddressChangeGuid =20 [Protocols] gMarvellSpiMasterProtocolGuid gMarvellSpiFlashProtocolGuid =20 [Depex] - TRUE + # + # MvSpiFlashDxe must be loaded prior to variables driver MvFvbDxe + # + BEFORE gMarvellFvbDxeGuid diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index 6aa2a8d..e40771b 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -56,6 +56,8 @@ gShellFUpdateHiiGuid =3D { 0x9b5d2176, 0x590a, 0x49db, { 0x89, 0x5d, 0x4= a, 0x70, 0xfe, 0xad, 0xbe, 0x24 } } gShellSfHiiGuid =3D { 0x03a67756, 0x8cde, 0x4638, { 0x82, 0x34, 0x4a, 0x= 0f, 0x6d, 0x58, 0x81, 0x39 } } =20 + gMarvellFvbDxeGuid =3D { 0x42903750, 0x7e61, 0x4aaf, { 0x83, 0x29, 0xbf,= 0x42, 0x36, 0x4e, 0x24, 0x85 } } + [Protocols] # installed as a protocol by PlatInitDxe to force ordering between DXE d= rivers # that depend on the lowlevel platform initialization having been comple= ted --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Dec 24 16:10:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511857180716243.3677814711898; Tue, 28 Nov 2017 00:19:40 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 858D4220D4C0C; Tue, 28 Nov 2017 00:15:15 -0800 (PST) Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 64925220F3C54 for ; Tue, 28 Nov 2017 00:15:12 -0800 (PST) Received: by mail-lf0-x242.google.com with SMTP id d10so24870625lfj.7 for ; Tue, 28 Nov 2017 00:19:35 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id j85sm79732lfh.53.2017.11.28.00.19.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Nov 2017 00:19:32 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::242; helo=mail-lf0-x242.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AW+nupAykgHbAZanQUqzeHrY9yFyQydOMHeUqmi2P6c=; b=uI2DhCgV8S0IkTPVvq3MfYybool+waK/iXUxGAldj9gJZfuJ7Q1wcAT8iHnpWmV/N8 xiq+pmPRc88mqFLNxKodGY3t+2uauZBXxFHFavF6yxnxojhRYg71KfZh3PTHt5l5QYfz U3yPrh/HqdY5V9tQfXGV5RPXbYaNkCVEefVsJIKvoHDWHvLOMPHj1rxRBpZ3b2TJd0p3 rM+Me7iLDYYzuFAgmLOqV7pZAGu2N1Emk5D2ySoml9EjKbul2+MxWwSR0Vh8/81aMbak u6SMkdrTa+bLZHUzmpJpEF17xIN7Hk/c8buLysGMvVuPL+fv3HBlQrEjak6A/CLAqnt9 BJZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AW+nupAykgHbAZanQUqzeHrY9yFyQydOMHeUqmi2P6c=; b=VjdQQ84PEVs652VBnjgThWy/y4v91hV7MZ1B4iloxBJKScaQNH4zAdipH+stcl3vJQ hvpQCJ+p6MAAKrsT0yJxxU6q826c32eO4lPXKEjPFdbqPyKceJHAzf3sLKkEDlA3PHfy mRLflFyc20o2U9bGpb0WLaK/0CdAaq2wL34eei6/eHpdEEfHlo7kiLxDX9uOGzO6dUs1 3xm9Nm46x6djsBiWMOxxmobP5MP3QnsYaOdSjpZoc0MrTrNDIKoEnAO0baj15uOW8pa3 1vq0PhPw43Pbu44L0qhh2B+0iJj84CLbUdgupaFavwj8ct7THNwAJaoj544tttlIcYHV Ms7Q== X-Gm-Message-State: AJaThX4rC3oPaHbRYvEDVOKTq9yFNQKSgSiBSnVLD4b95KnU1B3bZ9g9 CrdbVjJfbjY/U9bWC+mpkuqzhvsUWiE= X-Google-Smtp-Source: AGs4zMZBi0HkqUNO+8YJUCbdlalYCnfzQNdQet4lxtilA8h3Qs1dbgXeZl/RA1t9sRp8VByzhwaRZA== X-Received: by 10.25.232.17 with SMTP id f17mr13773140lfh.54.1511857173010; Tue, 28 Nov 2017 00:19:33 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Tue, 28 Nov 2017 09:19:12 +0100 Message-Id: <1511857153-9266-4-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511857153-9266-1-git-send-email-mw@semihalf.com> References: <1511857153-9266-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v3 3/4] Marvell/Drivers: MvSpiDxe: Enable using driver in RT X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This patch applies necessary modifications, which allow to use MvSpiDxe driver in variable support as a runtime service. The driver's type is modified to DXE_RUNTIME_DRIVER, as well as a new callback is introduced as a part of the SpiMasterProtocol. It configures the memory space for mmio access to the host controller registers. Apply locking in the driver only during boot services. Once at runtime, resource protection is handled by the operating system. Moreover ensure proper execution order before MvSpiFlashDxe (and hence MvFvbDxe) by setting according Depex dependency. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Platform/Marvell/Drivers/Spi/MvSpiDxe.c | 50 ++++++++++++++++++-- Platform/Marvell/Drivers/Spi/MvSpiDxe.h | 2 + Platform/Marvell/Drivers/Spi/MvSpiDxe.inf | 9 +++- Platform/Marvell/Include/Protocol/Spi.h | 7 +++ Platform/Marvell/Marvell.dec | 1 + 5 files changed, 63 insertions(+), 6 deletions(-) diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c b/Platform/Marvell/Dri= vers/Spi/MvSpiDxe.c index c60a520..bab6cf4 100755 --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.c +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.c @@ -211,7 +211,9 @@ MvSpiTransfer ( =20 Length =3D 8 * DataByteCount; =20 - EfiAcquireLock (&SpiMaster->Lock); + if (!EfiAtRuntime ()) { + EfiAcquireLock (&SpiMaster->Lock); + } =20 if (Flag & SPI_TRANSFER_BEGIN) { SpiActivateCs (Slave); @@ -254,7 +256,9 @@ MvSpiTransfer ( SpiDeactivateCs (Slave); } =20 - EfiReleaseLock (&SpiMaster->Lock); + if (!EfiAtRuntime ()) { + EfiReleaseLock (&SpiMaster->Lock); + } =20 return EFI_SUCCESS; } @@ -338,6 +342,44 @@ MvSpiFreeSlave ( return EFI_SUCCESS; } =20 +EFI_STATUS +EFIAPI +MvSpiConfigRuntime ( + IN SPI_DEVICE *Slave + ) +{ + EFI_STATUS Status; + UINTN AlignedAddress; + + // + // Host register base may be not aligned to the page size, + // which is not accepted when setting memory space attributes. + // Add one aligned page of memory space which covers the host + // controller registers. + // + AlignedAddress =3D Slave->HostRegisterBaseAddress & ~(SIZE_4KB - 1); + + Status =3D gDS->AddMemorySpace (EfiGcdMemoryTypeMemoryMappedIo, + AlignedAddress, + SIZE_4KB, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to add memory space\n", __FUNCTION__)= ); + return Status; + } + + Status =3D gDS->SetMemorySpaceAttributes (AlignedAddress, + SIZE_4KB, + EFI_MEMORY_UC | EFI_MEMORY_RUNTIME); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Failed to set memory attributes\n", __FUNCTI= ON__)); + gDS->RemoveMemorySpace (AlignedAddress, SIZE_4KB); + return Status; + } + + return EFI_SUCCESS; +} + STATIC EFI_STATUS SpiMasterInitProtocol ( @@ -350,6 +392,7 @@ SpiMasterInitProtocol ( SpiMasterProtocol->FreeDevice =3D MvSpiFreeSlave; SpiMasterProtocol->Transfer =3D MvSpiTransfer; SpiMasterProtocol->ReadWrite =3D MvSpiReadWrite; + SpiMasterProtocol->ConfigRuntime =3D MvSpiConfigRuntime; =20 return EFI_SUCCESS; } @@ -363,8 +406,7 @@ SpiMasterEntryPoint ( { EFI_STATUS Status; =20 - mSpiMasterInstance =3D AllocateZeroPool (sizeof (SPI_MASTER)); - + mSpiMasterInstance =3D AllocateRuntimeZeroPool (sizeof (SPI_MASTER)); if (mSpiMasterInstance =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.h b/Platform/Marvell/Dri= vers/Spi/MvSpiDxe.h index e7e280a..50cdc02 100644 --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.h +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.h @@ -38,10 +38,12 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DA= MAGE. #include #include #include +#include #include #include #include #include +#include =20 #include =20 diff --git a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf b/Platform/Marvell/D= rivers/Spi/MvSpiDxe.inf index 08c6c04..ac0e407 100644 --- a/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf +++ b/Platform/Marvell/Drivers/Spi/MvSpiDxe.inf @@ -33,7 +33,7 @@ INF_VERSION =3D 0x00010005 BASE_NAME =3D SpiMasterDxe FILE_GUID =3D c19dbc8a-f4f9-43b0-aee5-802e3ed03d15 - MODULE_TYPE =3D DXE_DRIVER + MODULE_TYPE =3D DXE_RUNTIME_DRIVER VERSION_STRING =3D 1.0 ENTRY_POINT =3D SpiMasterEntryPoint =20 @@ -53,8 +53,10 @@ TimerLib UefiLib DebugLib + DxeServicesTableLib MemoryAllocationLib IoLib + UefiRuntimeLib =20 [FixedPcd] gMarvellTokenSpaceGuid.PcdSpiRegBase @@ -65,4 +67,7 @@ gMarvellSpiMasterProtocolGuid =20 [Depex] - TRUE + # + # MvSpiDxe must be loaded prior to MvSpiFlash driver + # + BEFORE gMarvellSpiFlashDxeGuid diff --git a/Platform/Marvell/Include/Protocol/Spi.h b/Platform/Marvell/Inc= lude/Protocol/Spi.h index d993021..abbad19 100644 --- a/Platform/Marvell/Include/Protocol/Spi.h +++ b/Platform/Marvell/Include/Protocol/Spi.h @@ -101,12 +101,19 @@ EFI_STATUS IN SPI_DEVICE *SpiDev ); =20 +typedef +EFI_STATUS +(EFIAPI *MV_SPI_CONFIG_RT) ( + IN SPI_DEVICE *SpiDev + ); + struct _MARVELL_SPI_MASTER_PROTOCOL { MV_SPI_INIT Init; MV_SPI_READ_WRITE ReadWrite; MV_SPI_TRANSFER Transfer; MV_SPI_SETUP_DEVICE SetupDevice; MV_SPI_FREE_DEVICE FreeDevice; + MV_SPI_CONFIG_RT ConfigRuntime; }; =20 #endif // __MARVELL_SPI_MASTER_PROTOCOL_H__ diff --git a/Platform/Marvell/Marvell.dec b/Platform/Marvell/Marvell.dec index e40771b..2eb6238 100644 --- a/Platform/Marvell/Marvell.dec +++ b/Platform/Marvell/Marvell.dec @@ -57,6 +57,7 @@ gShellSfHiiGuid =3D { 0x03a67756, 0x8cde, 0x4638, { 0x82, 0x34, 0x4a, 0x= 0f, 0x6d, 0x58, 0x81, 0x39 } } =20 gMarvellFvbDxeGuid =3D { 0x42903750, 0x7e61, 0x4aaf, { 0x83, 0x29, 0xbf,= 0x42, 0x36, 0x4e, 0x24, 0x85 } } + gMarvellSpiFlashDxeGuid =3D { 0x49d7fb74, 0x306d, 0x42bd, { 0x94, 0xc8, = 0xc0, 0xc5, 0x4b, 0x18, 0x1d, 0xd7 } } =20 [Protocols] # installed as a protocol by PlatInitDxe to force ordering between DXE d= rivers --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Tue Dec 24 16:10:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1511857183311116.60342804261654; Tue, 28 Nov 2017 00:19:43 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id BD7E2220F3C5A; Tue, 28 Nov 2017 00:15:15 -0800 (PST) Received: from mail-lf0-x241.google.com (mail-lf0-x241.google.com [IPv6:2a00:1450:4010:c07::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B329E2034A797 for ; Tue, 28 Nov 2017 00:15:13 -0800 (PST) Received: by mail-lf0-x241.google.com with SMTP id c188so28415166lfd.5 for ; Tue, 28 Nov 2017 00:19:36 -0800 (PST) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id j85sm79732lfh.53.2017.11.28.00.19.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Nov 2017 00:19:33 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::241; helo=mail-lf0-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y8TbNCCS0oUYputhIZ+GPHrmuNu1mMYf7xIfV9hezaI=; b=1lvJia99u0Ug+a7zoCTvFAaedoOdpkwBSaGDQX9HJB5bVR7q5407wJWKBC5wRIDwdu wIOPE7j1c4Lq5shBZlUT+ogP1xLyXeDRuIltwkCnHAMarwbJvZiUo9lGdmY7lRw2MZEq Uf18H9yfz9LYbTatAkEGIb6y2esR0mmkRNgra2prM0WK4MwiOOfjEwnNooBSoC4xZG4W DTKyOT737kXjjsXZLehauKlVTJSge28vFsT1BTlUWSuym/sUGr8ZMgDH47S/H1Xl4XcP IXtrpuUE4M7zVoDfbpzSctsH8W21MThcUZGWJOQV4ARLEaFPdKDeAPt7sw87KCOSdmpP kdFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y8TbNCCS0oUYputhIZ+GPHrmuNu1mMYf7xIfV9hezaI=; b=AnfmMY3krnsZstIMu6DUN23kiuQ3y7k7OIVeRK6BJA1WyQOGF4pNBwIZAHWEUZl/JK iGT/keie82rm096eeaPKHi5HzFzw2rtcuEBWsdKk5/T8extrrz1on1xzeC2sqkSIiVnv oujkniuDOdDwNtKWDnXIQcIr+TQRlrBzXJhWhUJxpTQEmyXlxSdlU65SJQE0DkQRcPDX dimGBEMdfkSWuINoBXZ1aTPcqSwacjFEuTn4+Fmbczsw+OzIA8gwoMDe7BPbzgMezAst Qx1hseywco5PK7eyJEqGz19HrIznGOi0Lr6qSAWVZokwTuWr6bdS0k8UDtPMeV2/LUpi dB2w== X-Gm-Message-State: AJaThX4dzJAuylNMLuZQxK+o0PzpPaAD01gONi9rFbRgGguMU9OrlnQA LSC0K8C/GXDgPaGsW5xngkTf3jpYPa4= X-Google-Smtp-Source: AGs4zMaaJmlnhJrhbH5O6pbw4Kax3c2l/uYKk710HgdtKktrLoC6DM3WCwbzWXjbyi55J3NyjKUDSg== X-Received: by 10.25.178.139 with SMTP id t11mr7013411lfk.13.1511857174457; Tue, 28 Nov 2017 00:19:34 -0800 (PST) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Tue, 28 Nov 2017 09:19:13 +0100 Message-Id: <1511857153-9266-5-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511857153-9266-1-git-send-email-mw@semihalf.com> References: <1511857153-9266-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v3 4/4] Marvell/Armada: Enable variables support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, leif.lindholm@linaro.org, nadavh@marvell.com, neta@marvell.com, kostap@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Wire up the non-volatile EFI variable store support, by switching from the emulation driver to the real one. Define default values for memory mapped SPI access, which must be configured by the early firmware. In order to ensure proper execution, configure initialization order with Depex entries. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Platform/Marvell/Armada/Armada.dsc.inc | 25 +++++++++++++++++++- Platform/Marvell/Armada/Armada70x0.fdf | 6 ++++- 2 files changed, 29 insertions(+), 2 deletions(-) diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Arma= da/Armada.dsc.inc index 0c873fb..0da271e 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -364,6 +364,17 @@ # TRNG gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0xF2760000 =20 + # + # Variable store - default values + # + gMarvellTokenSpaceGuid.PcdSpiMemoryBase|0xF9000000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0xF93C0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0xF93D0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0xF93E0000 + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 + ##########################################################################= ###### # # Components Section - list of all EDK II Modules needed by this Platform @@ -421,7 +432,6 @@ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf =20 EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf @@ -478,6 +488,19 @@ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf } =20 + # + # Variable services + # + Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf + MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf + MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf { + + AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariabl= eLibNull.inf + NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf + TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeas= urementLibNull.inf + VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf + } + # UEFI application (Shell Embedded Boot Loader) ShellPkg/Application/Shell/Shell.inf { diff --git a/Platform/Marvell/Armada/Armada70x0.fdf b/Platform/Marvell/Arma= da/Armada70x0.fdf index ec2c368..ca92c60 100644 --- a/Platform/Marvell/Armada/Armada70x0.fdf +++ b/Platform/Marvell/Armada/Armada70x0.fdf @@ -103,7 +103,6 @@ FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0baf74b1= b30c INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.= inf INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.i= nf INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf @@ -115,6 +114,11 @@ FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0baf74b= 1b30c INF Platform/Marvell/Drivers/Spi/Devices/MvSpiFlash.inf INF Platform/Marvell/Armada/Drivers/Armada70x0RngDxe/Armada70x0RngDxe.inf =20 + # Variable services + INF Platform/Marvell/Drivers/Spi/Variables/MvFvbDxe.inf + INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.i= nf + INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf + # Network support INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel