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Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN2PR03MB2366 Subject: [edk2] [PATCH] PCI : define macro for AHCI base address. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Define PCI BAR 5 macro of AHCI Base address. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Meenakshi Aggarwal --- MdePkg/Include/IndustryStandard/Pci22.h | 1 + 1 file changed, 1 insertion(+) diff --git a/MdePkg/Include/IndustryStandard/Pci22.h b/MdePkg/Include/Indus= tryStandard/Pci22.h index 96a7680..a63bb7c 100644 --- a/MdePkg/Include/IndustryStandard/Pci22.h +++ b/MdePkg/Include/IndustryStandard/Pci22.h @@ -533,6 +533,7 @@ typedef struct { #define PCI_HEADER_TYPE_OFFSET 0x0E #define PCI_BIST_OFFSET 0x0F #define PCI_BASE_ADDRESSREG_OFFSET 0x10 +#define PCI_AHCI_BASE_ADDRESS 0x24 #define PCI_CARDBUS_CIS_OFFSET 0x28 #define PCI_SVID_OFFSET 0x2C ///< SubSystem Ve= ndor id #define PCI_SUBSYSTEM_VENDOR_ID_OFFSET 0x2C --=20 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel