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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.29.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:29:56 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qGWFWChAF0MWstT9Q8OQxeNTNCFwoP9bMMDYCm2ebT0=; b=RnOYXTEp/pk817P2tc5pbPMsDnr8A45BrpabEfKHLfVGyWc7KRQD7sHW7s36v3Q65B EIQnOKU6MMIJ3kiMAaQTwbsDyxyJyAitj+W4eFQY1PLWEosnfocw6Z0Xd6Wj/CBOszl7 zjYbSSkGkpEiCpjAdcdbvd79DuUtr1Ur6Tt6pXs50CxZ85jN9EX2JrCURGBqjZYhIMNG pId51ySKE9K1cEEmLFQEqzNcvFEWnGYnIaLSIhUgP79YEciQTdKFCL4C4eYJTG3T2Wkm akp5m0oBfETkDRavH2AUzR4lZ11J5QOXYuWi3CFdtiNxizZt5Y/XwtC2t6GulMjg3Lpd UCxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qGWFWChAF0MWstT9Q8OQxeNTNCFwoP9bMMDYCm2ebT0=; b=Q15lXDXJMuB/KpO1Uz8/3ncqRuw3y1TOA7G8VO6c037a2NE8RqdCj+r7M1IkbIkCt+ EnaWLBb4nLWbyTH5P+MwwaySRpQs9v5oMfVPJ1bN/iQamrS5sIPDqT0UL2VxcoV8l25e YgeCTEmOULBiIyUEYpc+bWYerjakSipJazOmxV891mEKxz3dhQ3EALwklUiIg06b3Y0N VCvk50KJ2mnmeQksDTeUGyZu8Z+dwTBVRCVgkDjHdXfQt4oIOrrwLoFKZX6H08J/xLUw 6T1O3Kol8+DkFx/Jg6tUJYZTslprJzBOn7yR7f3LvQvF2O2IJ33GZ2qDOzxllzICSkiS KNdg== X-Gm-Message-State: APt69E1oeOinAQvBrABeMwgTGyo9GrkIVuMkleXVE1R3vkzG8OdL/+D5 8ELL4N/bVUvjJUwm96GeDjkxSFp6qZU= X-Google-Smtp-Source: ADUXVKIIkHdl/eZAjiFtL6XFSMXzODS70UlREx5RfktHc35uj5OEdLJK4l4gdsuBOyQWXbhtIPZXtw== X-Received: by 2002:a2e:1010:: with SMTP id j16-v6mr4960983lje.94.1528090197261; Sun, 03 Jun 2018 22:29:57 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 07:29:31 +0200 Message-Id: <1528090175-15791-2-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH v2 1/5] Marvell/Armada70x0Db: Shift main FV from 0x0 address X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: davidsn@marvell.com, jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" When using PEI phase, UEFI interprets 0x0 address of boot FV as an error. In order to avoid it, shift it to 0x1000 and put a hardcoded 'jump to 0x1000' at offset 0x0. This patch is a preparation for using PEI by Armada platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Ard Biesheuvel --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marv= ell/Armada70x0Db/Armada70x0Db.fdf index befb107..69cb4cd 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -49,7 +49,21 @@ NumBlocks =3D 0x400 # ##########################################################################= ###### =20 -0x00000000|0x00100000 +# +# UEFI has trouble dealing with FVs that reside at physical address 0x0. +# So instead, put a hardcoded 'jump to 0x1000' at offset 0x0, and put the +# real FV at offset 0x1000 +# +0x00000000|0x00001000 +DATA =3D { +!if $(ARCH) =3D=3D AARCH64 + 0x00, 0x04, 0x00, 0x14 # 'b 0x1000' in AArch64 ASM +!else + 0xfe, 0x03, 0x00, 0xea # 'b 0x1000' in AArch32 ASM +!endif +} + +0x00001000|0x000ff000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV =3D FVMAIN_COMPACT =20 @@ -191,7 +205,6 @@ FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0baf74b1= b30c # PEI phase firmware volume [FV.FVMAIN_COMPACT] FvAlignment =3D 8 -FvForceRebase =3D TRUE ERASE_POLARITY =3D 1 MEMORY_MAPPED =3D TRUE STICKY_WRITE =3D TRUE --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat May 4 07:21:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528090207517752.6581763177772; Sun, 3 Jun 2018 22:30:07 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7EAA02096F34B; Sun, 3 Jun 2018 22:30:02 -0700 (PDT) Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 832E8207DF28F for ; Sun, 3 Jun 2018 22:30:00 -0700 (PDT) Received: by mail-lf0-x243.google.com with SMTP id u4-v6so23154377lff.3 for ; Sun, 03 Jun 2018 22:30:00 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.29.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:29:57 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/Tc0vGFQSGuzzPJKQm44Okz33v1gC8msEerPsVxeXtw=; b=Xjnk/EtAvZJm1jmkpEe3ZuR98Oz3TfhMeWoCA78Ush3w2Inh8aBe49NljzGDZTkiRQ vp3SEfGb99bPiVTmsG1WMm/N1MeCRNq6XRM0a/Xr+MIxLwVATtiKeE+ogIUb17VY63zI qASq1jr8kDG0DZG5G6PVyCB9eF9cK9YMDAz1ege+wKn57gx3HH0q2KXf0Y6o0GknAjrd 0LwWhmNvlJnIepYWpcWCGlDRIy32gjTupEOnUZF3S62HL2LOBjqUeu7TgMrhjnjCo9eK nBV+AqMMltHYwDPtyRYVYBMB56LoiC/D4E/giz/gH9FN48LHXsPd7yllnwPmC+jfE7xp XQQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/Tc0vGFQSGuzzPJKQm44Okz33v1gC8msEerPsVxeXtw=; b=AHW8dsrG5+Su6Fex8KK24H+D2Y2L80CTb2c7I4sWvbUkQVovFJlCRppTYtUqZzGe3N PiDZheaGsVTQQ62m8BMSIKjvSQ/tJp8RvrKQ0J9K8MRX7tj7pgCWPr1C0yiWFdM2jaMR fCXuHLvrbem2a4gi9/1ME8buoC/4bwyOcCSPbMtO68A1NY8hl9tVGhQ3Gat8ojRzJGRy zjEqQDwg77l+kwsdPAaAU7TpeEa0Ui5+l8gUa/XBET4D5CXa9QwE/EzovOMjOjK6kqmY wg2m+/27p5Rx4FLfte1Lp7IAWmSsbOPW19RMqpUUNPbhkjeq06L5+geLJiEiT4qkFaRh y2uw== X-Gm-Message-State: ALKqPwcXYShnccnXxNY9ejHcbE5kjz8hAcK9DvKfyBoUCqrmR0oPoirj g9zxPCvbNXgdcTtYuGe7hVYdKFNtMf0= X-Google-Smtp-Source: ADUXVKJ8TiLNCnJu0ubTZY+mAQBWLdj2L6IjwAiG26LqIRLsaXRGgVLUYT3VajjySr0COuxgttGrnA== X-Received: by 2002:a2e:1dd9:: with SMTP id w86-v6mr13700301lje.110.1528090198442; Sun, 03 Jun 2018 22:29:58 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 07:29:32 +0200 Message-Id: <1528090175-15791-3-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH v2 2/5] Marvell/Aramda7k8k: Enable PEI booting stage X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: davidsn@marvell.com, jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" PEI phase will allow to use more robust platform initialization, with new features like the capsule support. Wire up all dependencies for that purpose. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 15 ++++++-- Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 40 ++++++++++++++++++-- 2 files changed, 48 insertions(+), 7 deletions(-) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marv= ell/Armada70x0Db/Armada70x0Db.fdf index 69cb4cd..bf04f4d 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -63,7 +63,7 @@ DATA =3D { !endif } =20 -0x00001000|0x000ff000 +0x00001000|0x001ff000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV =3D FVMAIN_COMPACT =20 @@ -221,7 +221,14 @@ READ_STATUS =3D TRUE READ_LOCK_CAP =3D TRUE READ_LOCK_STATUS =3D TRUE =20 - INF ArmPlatformPkg/PrePi/PeiUniCore.inf + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf + INF MdeModulePkg/Core/Pei/PeiMain.inf + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + INF ArmPkg/Drivers/CpuPei/CpuPei.inf + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =20 FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRE= D =3D TRUE { @@ -264,14 +271,14 @@ READ_LOCK_STATUS =3D TRUE =20 [Rule.Common.PEI_CORE] FILE PEI_CORE =3D $(NAMED_GUID) { - TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING =3D"$(MODULE_NAME)" Optional } =20 [Rule.Common.PEIM] FILE PEIM =3D $(NAMED_GUID) { PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex - TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi + TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING=3D"$(MODULE_NAME)" Optional } =20 diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvel= l/Armada7k8k/Armada7k8k.dsc.inc index 4129742..8fb912b 100644 --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc @@ -145,13 +145,28 @@ MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMe= moryAllocationLib.inf HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/Pre= PiHobListPointerLib.inf - PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf ArmGicArchLib|ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf =20 [LibraryClasses.common.SEC, LibraryClasses.common.PEIM] - MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInit= PeiLib/Armada7k8kMemoryInitPeiLib.inf BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + +[LibraryClasses.common.PEI_CORE, LibraryClasses.common.PEIM] + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAlloc= ationLib.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExt= ractGuidedSectionLib.inf + PeiServicesTablePointerLib|ArmPkg/Library/PeiServicesTablePointerLib/Pei= ServicesTablePointerLib.inf + +[LibraryClasses.common.PEI_CORE] + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf + +[LibraryClasses.common.PEIM] + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf + MemoryInitPeiLib|Silicon/Marvell/Armada7k8k/Library/Armada7k8kMemoryInit= PeiLib/Armada7k8kMemoryInitPeiLib.inf =20 [LibraryClasses.common.DXE_CORE] HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf @@ -336,8 +351,13 @@ # ARM Pcds gArmTokenSpaceGuid.PcdSystemMemoryBase|0 gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000 + + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|36 gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36 =20 + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x41F0000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 + # Secure region reservation gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000 gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0200000 @@ -364,7 +384,21 @@ [Components.common] =20 # PEI Phase modules - ArmPlatformPkg/PrePi/PeiUniCore.inf + ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + ArmPlatformPkg/PlatformPei/PlatformPeim.inf + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + ArmPkg/Drivers/CpuPei/CpuPei.inf + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompre= ssLib.inf + } + =20 # DXE MdeModulePkg/Core/Dxe/DxeMain.inf { --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat May 4 07:21:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528090210793632.8470411613023; Sun, 3 Jun 2018 22:30:10 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A84822096F351; Sun, 3 Jun 2018 22:30:03 -0700 (PDT) Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8B18421BADAB9 for ; Sun, 3 Jun 2018 22:30:01 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id j13-v6so18704425lfb.13 for ; Sun, 03 Jun 2018 22:30:01 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.29.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:29:58 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=apT0rkGm9TGHDH8OfyKbvdoCZR+5zYfHniJf5vT0kJQ=; b=U34RE6Uzdvnl3KYLmFx9og5EIDTuiFJtE9EUwqcw4KWMVCAGbgOuRfsZhjRGoOD4UW tTLK0f06BTQB0kw2RpBmwuXJbPmrfMn/gyRSuXLFFAY0witqiziOwHJl96vFQ6t1OVsH qBrNEVK4OAAjmXPc/ZfFnocbGs78M5IPjxqmqOSMVFgjdg9xPZzrg2RkQqj0n1/f0JYq oVLWpH80cbcRY3pYzGUxVHpPOjhxanR9L4efG/f/WrF0oE/+Irs254XxX3TOyD6H7y/a +/Y5tTuNoBWqfAH2Wpqd19zDOVOXPQx+OffsKwelse1/4AOMwhfiywGptKDvqMKKsrtN z49Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=apT0rkGm9TGHDH8OfyKbvdoCZR+5zYfHniJf5vT0kJQ=; b=Pax8lujnCu/E3B1s9G7cOnVjwpvpN+CgxKLWhHWiTxBv8xe3HwTLdSJR2z2f2BGHgq L7rL+Hg0mzC8zQhaCbFE+QgMeJ14DoVC/k+7usxBjlqDDEKY15IPeqZP9QwOwrxHHcCX inbHL+xOeNW+ZETE333yiz1ChC2qCLw2m/VnZwWL89Br5KglDDYBQKX+QVjIw2rp19sg Sijyyv/492Iv3li/VH2KlrqGWhtrYgmxSSC1V5emrXJNl2Iht4njroF7DPB8n5dUv1K3 b3pPG7SkSOUvUvHX6oilaG3LqkpxLOfZvdJ5woh016PRW7cnrn3MpWy40bXiaBd7P8PH ZN9Q== X-Gm-Message-State: ALKqPwcfyLjTUR6/Jw0XOyLc0av8AqWL/U5pDWjUgyPL5wgJ8eG6pZqa vVcvSzA6wsfRgxaTcWuNHNLPu6BAlG8= X-Google-Smtp-Source: ADUXVKIYb+irM8rG1Pde+W6Cbi31YVGclO/XpHs3bZxslrVDr8hsRQvRTKZAMyDjWZeSkQCHfhTN4w== X-Received: by 2002:a19:1b11:: with SMTP id b17-v6mr11549363lfb.50.1528090199586; Sun, 03 Jun 2018 22:29:59 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 07:29:33 +0200 Message-Id: <1528090175-15791-4-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH v2 3/5] Marvell/Drivers: MvSpiFlashDxe: Add progress API X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: davidsn@marvell.com, jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" In order to support new API of the PlatformFlashAccessLib, which passes and optional Progress() function, introduce new callback for updating data in the SPI flash, that can utilize it. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c | 60 +++++++++++= +++++++++ Silicon/Marvell/Include/Protocol/SpiFlash.h | 14 +++++ 2 files changed, 74 insertions(+) diff --git a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c b/Si= licon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c index a2ce975..d81f6e3 100755 --- a/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c +++ b/Silicon/Marvell/Drivers/Spi/MvSpiFlashDxe/MvSpiFlashDxe.c @@ -397,6 +397,65 @@ MvSpiFlashUpdate ( } =20 EFI_STATUS +MvSpiFlashUpdateWithProgress ( + IN SPI_DEVICE *Slave, + IN UINT32 Offset, + IN UINTN ByteCount, + IN UINT8 *Buffer, + IN EFI_FIRMWARE_MANAGEMENT_UPDATE_IMAGE_PROGRESS Progress, OPTIO= NAL + IN UINTN StartPercentage, + IN UINTN EndPercentage + ) +{ + EFI_STATUS Status; + UINTN SectorSize; + UINTN SectorNum; + UINTN ToUpdate; + UINTN Index; + UINT8 *TmpBuf; + + SectorSize =3D Slave->Info->SectorSize; + SectorNum =3D ByteCount / SectorSize; + ToUpdate =3D SectorSize; + + TmpBuf =3D (UINT8 *)AllocateZeroPool (SectorSize); + if (TmpBuf =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + for (Index =3D 0; Index < SectorNum; Index++) { + if (Progress !=3D NULL) { + Progress (StartPercentage + + ((Index * (EndPercentage - StartPercentage)) / SectorNum)); + } + + // In the last chunk update only an actual number of remaining bytes. + if (Index + 1 =3D=3D SectorNum) { + ToUpdate =3D ByteCount % SectorSize; + } + + Status =3D MvSpiFlashUpdateBlock (Slave, + Offset + Index * SectorSize, + ToUpdate, + Buffer + Index * SectorSize, + TmpBuf, + SectorSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Error while updating\n", __FUNCTION__)); + return Status; + } + } + FreePool (TmpBuf); + + if (Progress !=3D NULL) { + Progress (EndPercentage); + } + + return EFI_SUCCESS; +} + +EFI_STATUS EFIAPI MvSpiFlashReadId ( IN SPI_DEVICE *SpiDev, @@ -500,6 +559,7 @@ MvSpiFlashInitProtocol ( SpiFlashProtocol->Write =3D MvSpiFlashWrite; SpiFlashProtocol->Erase =3D MvSpiFlashErase; SpiFlashProtocol->Update =3D MvSpiFlashUpdate; + SpiFlashProtocol->UpdateWithProgress =3D MvSpiFlashUpdateWithProgress; =20 return EFI_SUCCESS; } diff --git a/Silicon/Marvell/Include/Protocol/SpiFlash.h b/Silicon/Marvell/= Include/Protocol/SpiFlash.h index 4ba29ba..e703330 100644 --- a/Silicon/Marvell/Include/Protocol/SpiFlash.h +++ b/Silicon/Marvell/Include/Protocol/SpiFlash.h @@ -34,6 +34,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMA= GE. #ifndef __MV_SPI_FLASH__ #define __MV_SPI_FLASH__ =20 +#include #include =20 extern EFI_GUID gMarvellSpiFlashProtocolGuid; @@ -89,6 +90,18 @@ EFI_STATUS IN UINT8 *Buffer ); =20 +typedef +EFI_STATUS +(EFIAPI *MV_SPI_FLASH_UPDATE_WITH_PROGRESS) ( + IN SPI_DEVICE *Slave, + IN UINT32 Offset, + IN UINTN ByteCount, + IN UINT8 *Buffer, + IN EFI_FIRMWARE_MANAGEMENT_UPDATE_IMAGE_PROGRESS Progress, OPTIO= NAL + IN UINTN StartPercentage, + IN UINTN EndPercentage + ); + struct _MARVELL_SPI_FLASH_PROTOCOL { MV_SPI_FLASH_INIT Init; MV_SPI_FLASH_READ_ID ReadId; @@ -96,6 +109,7 @@ struct _MARVELL_SPI_FLASH_PROTOCOL { MV_SPI_FLASH_WRITE Write; MV_SPI_FLASH_ERASE Erase; MV_SPI_FLASH_UPDATE Update; + MV_SPI_FLASH_UPDATE_WITH_PROGRESS UpdateWithProgress; }; =20 #endif // __MV_SPI_FLASH__ --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat May 4 07:21:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528090213986403.2191476376804; Sun, 3 Jun 2018 22:30:13 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D73072096F34E; Sun, 3 Jun 2018 22:30:04 -0700 (PDT) Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 3ABC62096F34E for ; Sun, 3 Jun 2018 22:30:03 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id y20-v6so23159452lfy.0 for ; Sun, 03 Jun 2018 22:30:03 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.29.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:30:00 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HO2FTSghgbiexUswMR9+pqPmD0Mz6IPzy5/dqJ2rlow=; b=CIkgW2nJQkl3ByVjVelVHvhTtKuF6O1wgDcVOyi6LywMSktq8E/b1PaE0MumqFOuZF 8zGhJ3mG03ZZ02U1XeN9qFBTc+oOQGYai9Bl/W35ABYkGNtwsAteNcK+BAIpEZnWG+8R 4731Qj5r/mFc3pV2bDF3g0kKSjqkxIojjwpaSKc8HhGLbcS/602dMAMIxg1BbASdOJE7 DCQNensjA2StVP6lVJph/kv9RgfEPgUbxUrIKYLOc2iU7Lslc2hm+rN/ISJr3Os9gUQ4 FLAV3toD10GQSqj9JhxClvpaz7S2Gqgvi7xeFxqc0FGBMfWcldh5s59IIOaYkIcfVzoT e2WA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HO2FTSghgbiexUswMR9+pqPmD0Mz6IPzy5/dqJ2rlow=; b=Bq/Cv3OfLp7E4pySElKYXLvyNhl5C1X7d667Ekm0i972SdZQS6lUBIFiuMNzAW9Iw6 wwR9zUuTzhvyfnk9Y8wLlXw6zn28Pap325lUuDVRyZY2WwyGIMkAIX7xfVh7oEF33QRR TKTVli2cGuE0fzyTt4BM8va59gmL5UJJZAGnP94T9nJDwd+4tYWavNfs3fqTPuLo89R9 cGWvLHAK41nIQQNCAvhpT1XPPUcIJk/FV+dQBaPCXOltRzp3goWYMFvAT7E2KhoNJ06V VLfvJbArtWgjvZHk9PS74c9orXJD3xhVrHq63F9w1IDZU+WZt+NwzLRuxSGWHykhfMj8 GxqA== X-Gm-Message-State: ALKqPwdfwueT1zHFIPaRhh8gzcVozIpcV/fPQOvBGTP2287CYj+8XkNE dVTjE5g86boBsEEZTFpHqOU7sGReOWU= X-Google-Smtp-Source: ADUXVKJi30SY5y/lU5Lj9oIve6ztUFQiCi/sAT8ingrxeLaNnXVZ0acAacWfxv2fZOwa97weBAWkEw== X-Received: by 2002:a19:5c94:: with SMTP id u20-v6mr10658021lfi.138.1528090201044; Sun, 03 Jun 2018 22:30:01 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 07:29:34 +0200 Message-Id: <1528090175-15791-5-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH v2 4/5] Marvell/Armada7k8k: Introduce capsule FW update implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: davidsn@marvell.com, jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: David Sniatkiwicz This patch adds necessary code that allows to update firmware on Armada7k8k platforms, using generic gRT->UpdateCapsule, i.e. * PlatformFlashAccessLib implementation to write data to SPI flash * SystemFirmwareDescriptor for FMP protocol * SystemFirmwareUpdateConfig to specify binary description within SystemFirmwareFile Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: David Sniatkiwicz Signed-off-by: Marcin Wojtas --- Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/Platform= FlashAccessLib.c | 329 ++++++++++++++++++++ Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/Platform= FlashAccessLib.inf | 52 ++++ Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/System= FirmwareDescriptor.aslc | 81 +++++ Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/System= FirmwareDescriptor.inf | 50 +++ Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/System= FirmwareDescriptorPei.c | 74 +++++ Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareUpdateConfig/Syst= emFirmwareUpdateConfig.ini | 26 ++ 6 files changed, 612 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccess= Lib/PlatformFlashAccessLib.c b/Silicon/Marvell/Armada7k8k/Feature/Capsule/P= latformFlashAccessLib/PlatformFlashAccessLib.c new file mode 100644 index 0000000..f62cf57 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/Pla= tformFlashAccessLib.c @@ -0,0 +1,329 @@ +/** @file + Platform flash device access library for Marvell Armada 7k8k Platforms + + Copyright (c) 2018 Marvell International Ltd.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define MAIN_HDR_MAGIC 0xB105B002 + +STATIC MARVELL_SPI_FLASH_PROTOCOL *SpiFlashProtocol; +STATIC MARVELL_SPI_MASTER_PROTOCOL *SpiMasterProtocol; + +typedef struct { // Bytes + UINT32 Magic; // 0-3 + UINT32 PrologSize; // 4-7 + UINT32 PrologChecksum; // 8-11 + UINT32 BootImageSize; // 12-15 + UINT32 BootImageChecksum; // 16-19 + UINT32 Reserved0; // 20-23 + UINT32 LoadAddr; // 24-27 + UINT32 ExecAddr; // 28-31 + UINT8 UartConfig; // 32 + UINT8 Baudrate; // 33 + UINT8 ExtCount; // 34 + UINT8 AuxFlags; // 35 + UINT32 IoArg0; // 36-39 + UINT32 IoArg1; // 40-43 + UINT32 IoArg2; // 43-47 + UINT32 IoArg3; // 48-51 + UINT32 Reserved1; // 52-55 + UINT32 Reserved2; // 56-59 + UINT32 Reserved3; // 60-63 +} MV_FIRMWARE_IMAGE_HEADER; + +STATIC +EFI_STATUS +SpiFlashProbe ( + IN SPI_DEVICE *SpiFlash + ) +{ + EFI_STATUS Status; + + // Read SPI flash ID + Status =3D SpiFlashProtocol->ReadId (SpiFlash, FALSE); + if (EFI_ERROR (Status)) { + return Status; + } + + Status =3D SpiFlashProtocol->Init (SpiFlashProtocol, SpiFlash); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: Cannot initialize flash device\n", __FUNCTIO= N__)); + return Status; + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +CheckImageHeader ( + IN OUT VOID *ImageBuffer + ) +{ + MV_FIRMWARE_IMAGE_HEADER *Header; + UINT32 HeaderLength, Checksum, ChecksumBackup; + + Header =3D (MV_FIRMWARE_IMAGE_HEADER *)ImageBuffer; + HeaderLength =3D Header->PrologSize; + ChecksumBackup =3D Header->PrologChecksum; + + // Compare magic number + if (Header->Magic !=3D MAIN_HDR_MAGIC) { + DEBUG ((DEBUG_ERROR, + "%a: Bad Image magic 0x%08x !=3D 0x%08x\n", + __FUNCTION__, + Header->Magic, + MAIN_HDR_MAGIC)); + return EFI_VOLUME_CORRUPTED; + } + + // The checksum field is discarded from calculation + Header->PrologChecksum =3D 0; + + Checksum =3D CalculateSum32 ((UINT32 *)Header, HeaderLength); + if (Checksum !=3D ChecksumBackup) { + DEBUG ((DEBUG_ERROR, + "%a: Bad Image checksum. 0x%x !=3D 0x%x\n", + __FUNCTION__, + Checksum, + ChecksumBackup)); + return EFI_VOLUME_CORRUPTED; + } + + // Restore checksum backup + Header->PrologChecksum =3D ChecksumBackup; + + return EFI_SUCCESS; +} + +/** + Perform flash write operation with progress indicator. The start and end + completion percentage values are passed into this function. If the requ= ested + flash write operation is broken up, then completion percentage between t= he + start and end values may be passed to the provided Progress function. T= he + caller of this function is required to call the Progress function for the + start and end completion percentage values. This allows the Progress, + StartPercentage, and EndPercentage parameters to be ignored if the reque= sted + flash write operation can not be broken up + + @param[in] FirmwareType The type of firmware. + @param[in] FlashAddress The address of flash device to be accessed. + @param[in] FlashAddressType The type of flash device address. + @param[in] Buffer The pointer to the data buffer. + @param[in] Length The length of data buffer in bytes. + @param[in] Progress A function used report the progress of the + firmware update. This is an optional param= eter + that may be NULL. + @param[in] StartPercentage The start completion percentage value that = may + be used to report progress during the flash + write operation. + @param[in] EndPercentage The end completion percentage value that may + be used to report progress during the flash + write operation. + + @retval EFI_SUCCESS The operation returns successfully. + @retval EFI_WRITE_PROTECTED The flash device is read only. + @retval EFI_UNSUPPORTED The flash device access is unsupported. + @retval EFI_INVALID_PARAMETER The input parameter is not valid. +**/ +EFI_STATUS +EFIAPI +PerformFlashWriteWithProgress ( + IN PLATFORM_FIRMWARE_TYPE FirmwareType, + IN EFI_PHYSICAL_ADDRESS FlashAddress, + IN FLASH_ADDRESS_TYPE FlashAddressType, + IN VOID *Buffer, + IN UINTN Length, + IN EFI_FIRMWARE_MANAGEMENT_UPDATE_IMAGE_PROGRESS Progress, OPTIO= NAL + IN UINTN StartPercentage, + IN UINTN EndPercentage + ) +{ + EFI_STATUS Status; + VOID *ImageBuffer; + SPI_DEVICE *SpiFlash =3D NULL; + BOOLEAN BufferAligned =3D TRUE; + + // Verify Firmware data + if (FlashAddressType !=3D FlashAddressTypeAbsoluteAddress) { + DEBUG ((DEBUG_ERROR, + "%a: only FlashAddressTypeAbsoluteAddress supported\n", + __FUNCTION__)); + + return EFI_INVALID_PARAMETER; + } + + if (FirmwareType !=3D PlatformFirmwareTypeSystemFirmware) { + DEBUG ((DEBUG_ERROR, + "%a: only PlatformFirmwareTypeSystemFirmware supported\n", + __FUNCTION__)); + + return EFI_INVALID_PARAMETER; + } + + // Locate SPI protocols + Status =3D gBS->LocateProtocol (&gMarvellSpiFlashProtocolGuid, + NULL, + (VOID **)&SpiFlashProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: Cannot locate SpiFlash protocol\n", + __FUNCTION__)); + return Status; + } + + Status =3D gBS->LocateProtocol (&gMarvellSpiMasterProtocolGuid, + NULL, + (VOID **)&SpiMasterProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: Cannot locate SpiMaster protocol\n", + __FUNCTION__)); + return Status; + } + + // + // Counting checksum in the header verification requires + // the buffer address alignment. + // It is not guaranteed by the generic capsule handling code, + // so use an auxiliary buffer in such case. + // + if (((UINTN) Buffer & 0x3) !=3D 0) { + ImageBuffer =3D AllocateCopyPool (Length, Buffer); + if (ImageBuffer =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + BufferAligned =3D FALSE; + } else { + ImageBuffer =3D Buffer; + } + + // Check image checksum and magic + Status =3D CheckImageHeader (ImageBuffer); + if (EFI_ERROR (Status)) { + goto HeaderError; + } + + // Setup and probe SPI flash + SpiFlash =3D SpiMasterProtocol->SetupDevice (SpiMasterProtocol, + SpiFlash, + PcdGet32 (PcdSpiFlashCs), + PcdGet32 (PcdSpiFlashMode)); + if (SpiFlash =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate SPI device!\n", __FUNCTION__= )); + Status =3D EFI_DEVICE_ERROR; + goto HeaderError; + } + + Status =3D SpiFlashProbe (SpiFlash); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: Error while performing SPI flash probe\n", + __FUNCTION__)); + goto FlashProbeError; + } + + // Update firmware image in flash + if (Progress !=3D NULL) { + Status =3D SpiFlashProtocol->UpdateWithProgress (SpiFlash, + FlashAddress, + Length, + (UINT8 *)ImageBuffer, + Progress, + StartPercentage, + EndPercentage); + } else { + Status =3D SpiFlashProtocol->Update (SpiFlash, + FlashAddress, + Length, + (UINT8 *)ImageBuffer); + } + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, + "%a: Error while performing flash update\n", + __FUNCTION__)); + goto FlashProbeError; + } + + DEBUG ((DEBUG_ERROR, + "%a: Update %d bytes at offset 0x%x succeeded!\n", + __FUNCTION__, + FlashAddress, + Length)); + + // Release resources + SpiMasterProtocol->FreeDevice (SpiFlash); + + if (!BufferAligned) { + FreePool (ImageBuffer); + } + + return EFI_SUCCESS; + +FlashProbeError: + SpiMasterProtocol->FreeDevice (SpiFlash); +HeaderError: + if (!BufferAligned) { + FreePool (ImageBuffer); + } + + return Status; +} + +/** + Perform flash write operation. + + @param[in] FirmwareType The type of firmware. + @param[in] FlashAddress The address of flash device to be accessed. + @param[in] FlashAddressType The type of flash device address. + @param[in] Buffer The pointer to the data buffer. + @param[in] Length The length of data buffer in bytes. + + @retval EFI_SUCCESS The operation returns successfully. + @retval EFI_WRITE_PROTECTED The flash device is read only. + @retval EFI_UNSUPPORTED The flash device access is unsupported. + @retval EFI_INVALID_PARAMETER The input parameter is not valid. +**/ +EFI_STATUS +EFIAPI +PerformFlashWrite ( + IN PLATFORM_FIRMWARE_TYPE FirmwareType, + IN EFI_PHYSICAL_ADDRESS FlashAddress, + IN FLASH_ADDRESS_TYPE FlashAddressType, + IN VOID *Buffer, + IN UINTN Length + ) +{ + return PerformFlashWriteWithProgress ( + FirmwareType, + FlashAddress, + FlashAddressType, + Buffer, + Length, + NULL, + 0, + 0 + ); +} diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccess= Lib/PlatformFlashAccessLib.inf b/Silicon/Marvell/Armada7k8k/Feature/Capsule= /PlatformFlashAccessLib/PlatformFlashAccessLib.inf new file mode 100644 index 0000000..fd94759 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/PlatformFlashAccessLib/Pla= tformFlashAccessLib.inf @@ -0,0 +1,52 @@ +## @file +# Platform flash device access library. +# +# Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+# Copyright (c) 2018, Marvell International, Ltd. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x00010019 + BASE_NAME =3D PlatformFlashAccessLib + FILE_GUID =3D c3f314d8-2995-4f0c-a8d6-e10298de4bde + MODULE_TYPE =3D BASE + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D PlatformFlashAccessLib|DXE_DRIVER + +[Sources] + PlatformFlashAccessLib.c + +[Packages] + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + Silicon/Marvell/Marvell.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DxeServicesTableLib + MemoryAllocationLib + PcdLib + UefiBootServicesTableLib + UefiLib + UefiRuntimeServicesTableLib + +[Pcd] + gMarvellTokenSpaceGuid.PcdSpiFlashCs + gMarvellTokenSpaceGuid.PcdSpiFlashMode + +[Protocols] + gMarvellSpiFlashProtocolGuid + gMarvellSpiMasterProtocolGuid diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescr= iptor/SystemFirmwareDescriptor.aslc b/Silicon/Marvell/Armada7k8k/Feature/Ca= psule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc new file mode 100644 index 0000000..fbccdc2 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/S= ystemFirmwareDescriptor.aslc @@ -0,0 +1,81 @@ +/** @file + System Firmware descriptor. + + Copyright (c) 2018, Marvell International Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include + +#define PACKAGE_VERSION 0xFFFFFFFF +#define PACKAGE_VERSION_STRING L"Unknown" + +#define CURRENT_FIRMWARE_VERSION 0x00000002 +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002" +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001 + +#define IMAGE_ID SIGNATURE_64('M','V','E', 'B',= 'U', '_', 'I', 'D') +#define IMAGE_ID_STRING L"MvebuPlatform" + +// PcdSystemFmpCapsuleImageTypeIdGuid +#define IMAGE_TYPE_ID_GUID { 0x757fc475, 0x6b22, 0x4482, = { 0x86, 0x8e, 0xde, 0xd2, 0x86, 0xf3, 0x09, 0x40 } } + +typedef struct { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor; + // real string data + CHAR16 ImageIdNameStr[ARRAY_SIZE (IMAGE= _ID_STRING)]; + CHAR16 VersionNameStr[ARRAY_SIZE (CURRE= NT_FIRMWARE_VERSION_STRING)]; + CHAR16 PackageVersionNameStr[ARRAY_SIZE= (PACKAGE_VERSION_STRING)]; +} IMAGE_DESCRIPTOR; + +IMAGE_DESCRIPTOR mImageDescriptor =3D +{ + { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE, + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR), + sizeof (IMAGE_DESCRIPTOR), + PACKAGE_VERSION, // PackageVersi= on + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersi= onName + 1, // ImageIndex; + {0x0}, // Reserved + IMAGE_TYPE_ID_GUID, // ImageTypeId; + IMAGE_ID, // ImageId; + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName; + CURRENT_FIRMWARE_VERSION, // Version; + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName; + {0x0}, // Reserved2 + FixedPcdGet32 (PcdFdSize), // Size; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSu= pported; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSe= tting; + 0x0, // Compatibilit= ies; + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSuppor= tedImageVersion; + 0x00000000, // LastAttemptV= ersion; + 0, // LastAttemptS= tatus; + {0x0}, // Reserved3 + 0, // HardwareInst= ance; + }, + // real string data + {IMAGE_ID_STRING}, + {CURRENT_FIRMWARE_VERSION_STRING}, + {PACKAGE_VERSION_STRING}, +}; + +VOID* CONST ReferenceAcpiTable =3D &mImageDescriptor; diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescr= iptor/SystemFirmwareDescriptor.inf b/Silicon/Marvell/Armada7k8k/Feature/Cap= sule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf new file mode 100644 index 0000000..e6967b2 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/S= ystemFirmwareDescriptor.inf @@ -0,0 +1,50 @@ +## @file +# System Firmware descriptor. +# +# Copyright (c) 2018, Marvell International Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D SystemFirmwareDescriptor + FILE_GUID =3D 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC + MODULE_TYPE =3D PEIM + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D SystemFirmwareDescriptorPeimEntry + +[Sources] + SystemFirmwareDescriptorPei.c + SystemFirmwareDescriptor.aslc + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + +[LibraryClasses] + DebugLib + PcdLib + PeimEntryPoint + PeiServicesLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdSize + +[Pcd] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor + +[Depex] + TRUE diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescr= iptor/SystemFirmwareDescriptorPei.c b/Silicon/Marvell/Armada7k8k/Feature/Ca= psule/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c new file mode 100644 index 0000000..c55c4d9 --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/S= ystemFirmwareDescriptorPei.c @@ -0,0 +1,74 @@ +/** @file + System Firmware descriptor producer. + + Copyright (c) 2018, Marvell International, Ltd. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include +#include +#include +#include +#include +#include + +/** + Entrypoint for SystemFirmwareDescriptor PEIM. + + @param[in] FileHandle Handle of the file being invoked. + @param[in] PeiServices Describes the list of possible PEI Services. + + @retval EFI_SUCCESS PPI successfully installed. +**/ +EFI_STATUS +EFIAPI +SystemFirmwareDescriptorPeimEntry ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor; + UINTN Size; + UINTN Index; + UINT32 AuthenticationStatus; + + // + // Search RAW section. + // + + Index =3D 0; + while (TRUE) { + Status =3D PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, + Index, + FileHandle, + (VOID **)&Descriptor, + &AuthenticationStatus); + if (EFI_ERROR (Status)) { + // Should not happen, must something wrong in FDF. + ASSERT(FALSE); + return EFI_NOT_FOUND; + } + if (Descriptor->Signature =3D=3D EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTO= R_SIGNATURE) { + break; + } + Index++; + } + + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\= n", Descriptor->Length)); + + Size =3D Descriptor->Length; + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor); + + return EFI_SUCCESS; +} diff --git a/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareUpdat= eConfig/SystemFirmwareUpdateConfig.ini b/Silicon/Marvell/Armada7k8k/Feature= /Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini new file mode 100644 index 0000000..fb0bd0b --- /dev/null +++ b/Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareUpdateConfig= /SystemFirmwareUpdateConfig.ini @@ -0,0 +1,26 @@ +## @file +# +# Copyright (c) 2018, Marvell International Ltd.
+# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Head] +NumOfUpdate =3D 1 +NumOfRecovery =3D 0 +Update0 =3D MvFvMain + +[MvFvMain] +FirmwareType =3D 0 # SystemFirmware +AddressType =3D 1 # 0 - relative address, 1 - absolute addre= ss. +BaseAddress =3D 0x0 # Base address offset on flash +Length =3D 0x00300000 # Length, need to fix the length +ImageOffset =3D 0x00100000 # Image offset of this SystemFirmware image +FileGuid =3D b3890e02-c46b-4970-9536-57787a9e06c7 # PcdEdkiiSystemFi= rmwareFileGuid --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Sat May 4 07:21:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528090217733340.453157090364; Sun, 3 Jun 2018 22:30:17 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 156E52096F358; Sun, 3 Jun 2018 22:30:06 -0700 (PDT) Received: from mail-lf0-x243.google.com (mail-lf0-x243.google.com [IPv6:2a00:1450:4010:c07::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 830E22096F34F for ; Sun, 3 Jun 2018 22:30:04 -0700 (PDT) Received: by mail-lf0-x243.google.com with SMTP id i83-v6so10988562lfh.5 for ; Sun, 03 Jun 2018 22:30:04 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id v1-v6sm9677204ljg.58.2018.06.03.22.30.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Jun 2018 22:30:01 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DfIf3p2h1IXS3sbaBfTJTDC95zubl/t9FYGQE6uBGRM=; b=JPtgT2Wt6MoCmNWNgH60lMtMi75uAOfwIEXWZpOocU1EJtVMecqBH/3t+kcO86EgEp hng6EmskCxQ3o9NSIYA7IbCZ81NL+VMTzBKwjTlNZ8NMF7tTqyLor4ObzzMXCQtYzdSj 2ZM1SSs0H+uz/aDFvuBTed/kImEG6ROEp3qC53MeUEIX1UYF1Tk3fyFM/Bmf2W2wz4Ub Il/dX7lxYvl806aBJVBSZD5QPPXvqEh9j0OlGRliW7yQxHLmHeI7EJRutATux2wG0bvq xYNxKtyRc8o3vhAce0n+FqeEZJmJyf+jUvU08xOH2Ql5m6nvz4tnLAOy/LkboWMsidju I9oQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DfIf3p2h1IXS3sbaBfTJTDC95zubl/t9FYGQE6uBGRM=; b=L0zlHjF5/4UXAJwZFbhbZWfUNAsMBrajSZUHlwN6kV8h5w3jjt4BA0eXKuLNepMC0B f+OPZlj+ugK+SJxTRbJb+p7jAPRMR+ITZOoQBW+a6DUR52lyOs6EzUoCK0jspuObfq4i 9RsFyWeJB/0ePDS0YkApRB9y2hrqye6Bz5sKZMjxTRmUsMRb7D1KE6NcKdi/Z5IOfwm8 w5Mw6i1I4U/NWzHHnMwxzB5Z+1vfABBovKL15akpL5NGDrWYCga19MkBo8PovZ0Kdc3E dBHELs+douEmASftL6lc0MYgNx0037fIeUPe6x0R42MyQ5spAjZU7WHRVicaw5Py/iQx j0QQ== X-Gm-Message-State: ALKqPwfvG9nh0UPBLdFYXnjT+tA83tJwU8YJCRAImd3YV8DxZ5GREANe 0Fp3m5o1eXIR9SWeDNlpSEWSqXyYSvw= X-Google-Smtp-Source: ADUXVKJ9okQakGtzqf1iv1u5i2rzwAeYQCAIxTimSoIQfkLHbdH8AmVglCT1GvWotJunYIZN8oaQnA== X-Received: by 2002:a19:1003:: with SMTP id f3-v6mr12589525lfi.114.1528090202246; Sun, 03 Jun 2018 22:30:02 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 07:29:35 +0200 Message-Id: <1528090175-15791-6-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528090175-15791-1-git-send-email-mw@semihalf.com> References: <1528090175-15791-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH v2 5/5] Marvell/Armada7k8k: Wire up capsule support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: davidsn@marvell.com, jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" All required components are in place, so we can now add all necessary dependencies to build and use capsule support for Armada7k8k platforms. It is conditionally enabled with '-D CAPSULE_ENABLE' flag added during build time. Because the capsule generation must be sequential, due to boot requirements and glueing all binaries (BLE, ARM-TF, BL33) externally, introduce additional .dsc and .fdf file solely for creating the capsule. Prior to this step 'flash-image.bin' binary must be placed under Platform/Marvell path. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Signed-off-by: David Sniatkiwicz --- Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf | 66 +++++++++++++++= +++ Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.dsc | 46 +++++++++++++ Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.fdf | 70 +++++++++++++++= +++++ Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 41 ++++++++++++ 4 files changed, 223 insertions(+) diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf b/Platform/Marv= ell/Armada70x0Db/Armada70x0Db.fdf index bf04f4d..e5e5443 100644 --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf @@ -201,6 +201,15 @@ FvNameGuid =3D 5eda4200-2c5f-43cb-9da3-0baf74b= 1b30c INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf INF MdeModulePkg/Application/UiApp/UiApp.inf =20 +!if $(CAPSULE_ENABLE) + # Firmware update + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReport= Dxe.inf + FILE FREEFORM =3D PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7Te= stPublicKeyFileGuid) { + SECTION RAW =3D BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer + SECTION UI =3D "Pkcs7TestRoot" + } +!endif =20 # PEI phase firmware volume [FV.FVMAIN_COMPACT] @@ -228,6 +237,11 @@ READ_LOCK_STATUS =3D TRUE INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf INF ArmPkg/Drivers/CpuPei/CpuPei.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf +!if $(CAPSULE_ENABLE) + INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.i= nf + INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf + INF RuleOverride =3D FMP_IMAGE_DESC Silicon/Marvell/Armada7k8k/Feature/C= apsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf +!endif INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf =20 FILE FV_IMAGE =3D 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { @@ -236,6 +250,49 @@ READ_LOCK_STATUS =3D TRUE } } =20 +!if $(CAPSULE_ENABLE) +[FV.SystemFirmwareDescriptor] +FvAlignment =3D 8 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF RuleOverride =3D FMP_IMAGE_DESC Silicon/Marvell/Armada7k8k/Feature/C= apsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf + +[FV.CapsuleDispatchFv] +FvAlignment =3D 8 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdat= eDxe.inf + +!endif + ##########################################################################= ###### # # Rules are use with the [FV] section's module INF type to define @@ -331,3 +388,12 @@ READ_LOCK_STATUS =3D TRUE UI STRING =3D"$(MODULE_NAME)" Optional PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi } + +[Rule.Common.PEIM.FMP_IMAGE_DESC] + FILE PEIM =3D $(NAMED_GUID) { + RAW BIN |.acpi + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=3D4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING=3D"$(MODULE_NAME)" Optional + VERSION STRING=3D"$(INF_VERSION)" Optional BUILD_NUM=3D$(BUILD_NUMBE= R) + } diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.dsc b/Platfo= rm/Marvell/Armada70x0Db/Armada70x0DbCapsule.dsc new file mode 100644 index 0000000..a7d1382 --- /dev/null +++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.dsc @@ -0,0 +1,46 @@ +#Copyright (C) 2018 Marvell International Ltd. +# +#Marvell BSD License Option +# +#If you received this File from Marvell, you may opt to use, redistribute = and/or +#modify this File under the following licensing terms. +#Redistribution and use in source and binary forms, with or without modifi= cation, +#are permitted provided that the following conditions are met: +# +# * Redistributions of source code must retain the above copyright notice, +# this list of conditions and the following disclaimer. +# +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# +# * Neither the name of Marvell nor the names of its contributors may be +# used to endorse or promote products derived from this software without +# specific prior written permission. +# +#THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS I= S" AND +#ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMP= LIED +#WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +#DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIAB= LE FOR +#ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DA= MAGES +#(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVIC= ES; +#LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED A= ND ON +#ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +#(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF = THIS +#SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +##########################################################################= ###### +# +# Defines Section - statements that will be processed to create a Makefile. +# +##########################################################################= ###### +[Defines] + PLATFORM_NAME =3D Armada70x0Db + PLATFORM_GUID =3D 982e2ab1-26ca-4617-92e6-061bd6ba9ae3 + PLATFORM_VERSION =3D 0.1 + DSC_SPECIFICATION =3D 0x00010019 + OUTPUT_DIRECTORY =3D Build/$(PLATFORM_NAME)-$(ARCH) + SUPPORTED_ARCHITECTURES =3D AARCH64|ARM + BUILD_TARGETS =3D DEBUG|RELEASE + SKUID_IDENTIFIER =3D DEFAULT + FLASH_DEFINITION =3D Platform/Marvell/Armada70x0Db/Armada7= 0x0DbCapsule.fdf diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.fdf b/Platfo= rm/Marvell/Armada70x0Db/Armada70x0DbCapsule.fdf new file mode 100644 index 0000000..e5a9c68 --- /dev/null +++ b/Platform/Marvell/Armada70x0Db/Armada70x0DbCapsule.fdf @@ -0,0 +1,70 @@ +# +# Copyright (C) Marvell International Ltd. and its affiliates +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# + +[FD.Armada_Capsule] +BaseAddress =3D 0x00000000 #|gArmTokenSpaceGuid.PcdFdBaseAddress # The = base address of the Firmware in NOR Flash. +Size =3D 0x00400000 #|gArmTokenSpaceGuid.PcdFdSize # The = size in bytes of the FLASH Device +ErasePolarity =3D 1 + +0x00000000|0x00010000 +FILE =3D $(WORKSPACE)/$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/S= YSTEMFIRMWAREDESCRIPTOR.Fv + +0x00100000|0x00300000 +FILE =3D Platform/Marvell/flash-image.bin + +[FV.SystemFirmwareUpdateCargo] +FvAlignment =3D 8 +ERASE_POLARITY =3D 1 +MEMORY_MAPPED =3D TRUE +STICKY_WRITE =3D TRUE +LOCK_CAP =3D TRUE +LOCK_STATUS =3D TRUE +WRITE_DISABLED_CAP =3D TRUE +WRITE_ENABLED_CAP =3D TRUE +WRITE_STATUS =3D TRUE +WRITE_LOCK_CAP =3D TRUE +WRITE_LOCK_STATUS =3D TRUE +READ_DISABLED_CAP =3D TRUE +READ_ENABLED_CAP =3D TRUE +READ_STATUS =3D TRUE +READ_LOCK_CAP =3D TRUE +READ_LOCK_STATUS =3D TRUE + + FILE RAW =3D b3890e02-c46b-4970-9536-57787a9e06c7 { # PcdEdkiiSystemFirm= wareFileGuid + FD =3D Armada_Capsule + } + + FILE RAW =3D ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCap= suleDriverFvFileGuid + $(WORKSPACE)/$(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/CAPSUL= EDISPATCHFV.Fv + } + + FILE RAW =3D 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCap= suleConfigFileGuid + Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareUpdateConfig/= SystemFirmwareUpdateConfig.ini + } + +[FmpPayload.FmpPayloadSystemFirmwarePkcs7] +IMAGE_HEADER_INIT_VERSION =3D 0x02 +IMAGE_TYPE_ID =3D 757fc475-6b22-4482-868e-ded286f30940 # PcdSy= stemFmpCapsuleImageTypeIdGuid +IMAGE_INDEX =3D 0x1 +HARDWARE_INSTANCE =3D 0x0 +MONOTONIC_COUNT =3D 0x1 +CERTIFICATE_GUID =3D 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 + + FV =3D SystemFirmwareUpdateCargo + +[Capsule.MvFirmwareUpdateCapsuleFmpPkcs7] +CAPSULE_GUID =3D 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEf= iFmpCapsuleGuid +CAPSULE_HEADER_SIZE =3D 0x20 +CAPSULE_HEADER_INIT_VERSION =3D 0x1 + + FMP_PAYLOAD =3D FmpPayloadSystemFirmwarePkcs7 + diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvel= l/Armada7k8k/Armada7k8k.dsc.inc index 8fb912b..75fa3d4 100644 --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc @@ -42,8 +42,23 @@ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseD= ebugPrintErrorLevelLib.inf =20 +!if $(CAPSULE_ENABLE) + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/Edk= iiSystemCapsuleLib.inf + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAu= thenticationLibPkcs7.inf + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf + PlatformFlashAccessLib|Silicon/Marvell/Armada7k8k/Feature/Capsule/Platfo= rmFlashAccessLib/PlatformFlashAccessLib.inf +!endif + # Basic utility libraries BaseLib|MdePkg/Library/BaseLib/BaseLib.inf +!if $(CAPSULE_ENABLE) + BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.i= nf + SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf +!endif SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchroniza= tionLib.inf PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibN= ull.inf PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf @@ -199,7 +214,11 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER] HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAll= ocationLib.inf +!if $(CAPSULE_ENABLE) + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf +!else CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf +!endif !if $(TARGET) !=3D RELEASE DebugLib|MdePkg/Library/DxeRuntimeDebugLibSerialPort/DxeRuntimeDebugLibS= erialPort.inf !endif @@ -376,6 +395,13 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0xF93E0000 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000 =20 +!if $(CAPSULE_ENABLE) +[PcdsDynamicExDefault.common.DEFAULT] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor= |{0x0}|VOID*|0x100 + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0x02,= 0x0e, 0x89, 0xb3, 0x6b, 0xc4, 0x70, 0x49, 0x95, 0x36, 0x57, 0x78, 0x7a, 0x= 9e, 0x06, 0xc7} + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x75,= 0xc4, 0x7f, 0x75, 0x22, 0x6b, 0x82, 0x44, 0x86, 0x8e, 0xde, 0xd2, 0x86, 0x= f3, 0x09, 0x40} +!endif + ##########################################################################= ###### # # Components Section - list of all EDK II Modules needed by this Platform @@ -394,6 +420,11 @@ ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf ArmPkg/Drivers/CpuPei/CpuPei.inf MdeModulePkg/Universal/Variable/Pei/VariablePei.inf +!if $(CAPSULE_ENABLE) + MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf + MdeModulePkg/Universal/CapsulePei/CapsulePei.inf + Silicon/Marvell/Armada7k8k/Feature/Capsule/SystemFirmwareDescriptor/Syst= emFirmwareDescriptor.inf +!endif MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompre= ssLib.inf @@ -503,6 +534,16 @@ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanc= eManagerUiLib.inf } =20 +!if $(CAPSULE_ENABLE) + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.= inf + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.= inf { + + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/F= mpAuthenticationLibPkcs7.inf + } + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf +!endif + # # Variable services # --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel