Hitherto mechanism of obtaining RTC base address proved
to be not flexible enough to support more than one SoC
family. Because there can be a single controller in use
anyway, this patch drops utilization of MvHwDescLib
header with hardcoded structure and replace it with
simple UINT64 PCD.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
---
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 2 +-
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 29 ++++----------------
Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf | 2 +-
Silicon/Marvell/Include/Library/MvHwDescLib.h | 25 -----------------
Silicon/Marvell/Marvell.dec | 2 +-
5 files changed, 9 insertions(+), 51 deletions(-)
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index 46a1ea9..b51b6fb 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -134,4 +134,4 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x1, 0x1 }
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x1 }
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0xF2284000
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
index d671b6a..087bd9a 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -26,7 +26,6 @@
#include <Library/DxeServicesTableLib.h>
#include <Library/TimeBaseLib.h>
#include <Library/IoLib.h>
-#include <Library/MvHwDescLib.h>
#include <Library/RealTimeClockLib.h>
#include <Library/TimerLib.h>
#include <Library/UefiBootServicesTableLib.h>
@@ -34,7 +33,6 @@
#include <Protocol/RealTimeClock.h>
#include "RealTimeClockLib.h"
-DECLARE_A7K8K_RTC_TEMPLATE;
STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
STATIC UINTN mArmadaRtcBase;
@@ -216,28 +214,13 @@ LibRtcInitialize (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
- MVHW_RTC_DESC *Desc = &mA7k8kRtcDescTemplate;
- UINT8 *RtcDeviceTable, Index;
EFI_HANDLE Handle;
EFI_STATUS Status;
- // Pick RTC device and initialize its data
- RtcDeviceTable = (UINT8 *) PcdGetPtr (PcdRtcEnabled);
- if (RtcDeviceTable == NULL) {
- DEBUG ((DEBUG_ERROR, "RTC: Missing PcdRtcEnabled\n"));
- return EFI_INVALID_PARAMETER;
- }
-
- // Initialize only first of enabled controllers
- for (Index = 0; Index < PcdGetSize (PcdRtcEnabled); Index++) {
- if (MVHW_DEV_ENABLED (Rtc, Index)) {
- DEBUG ((DEBUG_ERROR, "RTC: Initialize controller %d\n", Index));
- mArmadaRtcBase = Desc->RtcBaseAddresses[Index];
- break;
- }
- }
+ // Obtain RTC device base address
+ mArmadaRtcBase = PcdGet64 (PcdRtcBaseAddress);
- // Check if any of the controllers can be initialized
+ // Check if the controller can be initialized
if (mArmadaRtcBase == 0) {
DEBUG ((DEBUG_ERROR, "RTC: None of controllers enabled\n"));
return EFI_INVALID_PARAMETER;
@@ -247,7 +230,7 @@ LibRtcInitialize (
Status = gDS->AddMemorySpace (
EfiGcdMemoryTypeMemoryMappedIo,
mArmadaRtcBase,
- Desc->RtcMemSize[Index],
+ SIZE_4KB,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
@@ -257,7 +240,7 @@ LibRtcInitialize (
Status = gDS->SetMemorySpaceAttributes (
mArmadaRtcBase,
- Desc->RtcMemSize[Index],
+ SIZE_4KB,
EFI_MEMORY_UC | EFI_MEMORY_RUNTIME
);
if (EFI_ERROR (Status)) {
@@ -304,7 +287,7 @@ LibRtcInitialize (
ErrEvent:
gBS->UninstallProtocolInterface (Handle, &gEfiRealTimeClockArchProtocolGuid, NULL);
ErrSetMem:
- gDS->RemoveMemorySpace (mArmadaRtcBase, Desc->RtcMemSize[Index]);
+ gDS->RemoveMemorySpace (mArmadaRtcBase, SIZE_4KB);
return Status;
}
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
index 59c71c4..1ecd444 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.inf
@@ -49,7 +49,7 @@
gEfiEventVirtualAddressChangeGuid
[Pcd]
- gMarvellTokenSpaceGuid.PcdRtcEnabled
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress
[Depex.common.DXE_RUNTIME_DRIVER]
gEfiCpuArchProtocolGuid
diff --git a/Silicon/Marvell/Include/Library/MvHwDescLib.h b/Silicon/Marvell/Include/Library/MvHwDescLib.h
index e13814a..34d03d4 100644
--- a/Silicon/Marvell/Include/Library/MvHwDescLib.h
+++ b/Silicon/Marvell/Include/Library/MvHwDescLib.h
@@ -116,17 +116,6 @@ typedef struct {
} MVHW_PP2_DESC;
//
-// RealTimeClock devices description template definition
-//
-#define MVHW_MAX_RTC_DEVS 2
-
-typedef struct {
- UINT8 RtcDevCount;
- UINTN RtcBaseAddresses[MVHW_MAX_RTC_DEVS];
- UINTN RtcMemSize[MVHW_MAX_RTC_DEVS];
-} MVHW_RTC_DESC;
-
-//
// Platform description of CommonPhy devices
//
#define MVHW_CP0_COMPHY_BASE 0xF2441000
@@ -226,18 +215,4 @@ MVHW_PP2_DESC mA7k8kPp2DescTemplate = {\
{ MVHW_PP2_CLK_FREQ, MVHW_PP2_CLK_FREQ } \
}
-//
-// Platform description of RealTimeClock devices
-//
-#define MVHW_CP0_RTC0_BASE 0xF2284000
-#define MVHW_CP1_RTC0_BASE 0xF4284000
-
-#define DECLARE_A7K8K_RTC_TEMPLATE \
-STATIC \
-MVHW_RTC_DESC mA7k8kRtcDescTemplate = {\
- 2,\
- { MVHW_CP0_RTC0_BASE, MVHW_CP1_RTC0_BASE },\
- { SIZE_4KB, SIZE_4KB }\
-}
-
#endif /* __MVHWDESCLIB_H__ */
diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
index 6861cc4..4def897 100644
--- a/Silicon/Marvell/Marvell.dec
+++ b/Silicon/Marvell/Marvell.dec
@@ -195,7 +195,7 @@
gMarvellTokenSpaceGuid.PcdPciESdhci|{ 0x0 }|VOID*|0x3000035
#RTC
- gMarvellTokenSpaceGuid.PcdRtcEnabled|{ 0x0 }|VOID*|0x40000052
+ gMarvellTokenSpaceGuid.PcdRtcBaseAddress|0x0|UINT64|0x40000052
#TRNG
gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0x0|UINT64|0x50000053
--
2.7.4
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