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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id v79-v6sm7355396lfd.32.2018.06.08.08.34.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 08 Jun 2018 08:34:59 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::241; helo=mail-lf0-x241.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E/5a8Bl44AMufda52KG17v0a1dv+h8J5RRS4UOPMH6w=; b=EdlS+9XhJnAPYdTLCfFVc5pRSTM7gCyowLnqQu7xDuefXSneIxbYO5VicsfMoC3YTo Bcw1r0fVKslZ1saLHxZr6+soXI1U5DjFn0QwXPlu36cY8AQjpuOd9VGBavfFr9AAqsLw yUdCE723JgCULY1ubIF6ftvbwEMFfKVdc911GvGEmK4112E1gFwumlrHPd6tILmr6+ev qVR5hRVh2MSQw1NyBp77pRKzXyzbENz7zZNq3O170l2BZIX0iMW6U60B3f8MfhcBmxU3 FDcqtMMq50D2K0OB2DMk94GlOkUYWaAPScNWpj//HqQbGiaoqliJi/ASMrmhzfW37Hs7 R8cA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E/5a8Bl44AMufda52KG17v0a1dv+h8J5RRS4UOPMH6w=; b=b02S1H1Uogaz3e3Tz2KnCnrKBe9l3vYn/yeknfqK8nD1tIcUIpUFbcv1oTTWm037nv PVbpLhQOz50qyQTxwPE6NXZHweNDKAipsuoLvnSIClwqXBl1F0eJUNe+QgQHuDARj3rZ 9x6AAjoFAX+GCqklULUgDKhdbWJEH/r+ic98N/bJiMw1OugLMoYkSI19mB+RLCsXc2/3 sf4Nrn5RmEgfoGuLHQDgHirarjQA41KznpLA4/B6bUmuh6+qCeGmIxaCPJk2OgZtcpku Sm9NSl+JL+SmlhNOXzydxTJVJc63McM6Kk8Y6Z37zrt2IHAFg2G9Bh3p7vfB9l8AT9B8 lR2w== X-Gm-Message-State: APt69E3rXnqsgFmgN7UuxvtPH/Sf+1mkWgdLsUfTNKv8vljWe1yKWh82 kivVtFsKnAzCQQto1p6jyTSrehaM4AA= X-Google-Smtp-Source: ADUXVKIDoC1PFMIhYoenfNnhy9lRoiFEc2GBYH6dhNvAjg4DXnIg3jGHDhB0rPU0q29kB4157dggDg== X-Received: by 2002:a2e:8151:: with SMTP id t17-v6mr4894704ljg.32.1528472100215; Fri, 08 Jun 2018 08:35:00 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Fri, 8 Jun 2018 17:34:13 +0200 Message-Id: <1528472063-1660-16-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528472063-1660-1-git-send-email-mw@semihalf.com> References: <1528472063-1660-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms PATCH 15/25] Marvell/Armada7k8k: Extend ArmadaSoCDescLib with ComPhy information X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org, nadavh@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This patch introduces new library callback (ArmadaSoCDescComPhyGet ()), which dynamically allocates and fills MV_SOC_COMPHY_DESC structure with the SoC description of ComPhy SerDes controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Hua Jing --- Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescL= ib.c | 40 ++++++++++++++++++++ Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h = | 20 ++++++++++ 2 files changed, 60 insertions(+) diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada= 7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/= Armada7k8kSoCDescLib.c index de57b47..ba44a0c 100644 --- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.c +++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoC= DescLib.c @@ -32,6 +32,46 @@ #define MV_SOC_CP_BASE(Cp) (0xF2000000 + (Cp) * 0x2000000) =20 // +// Platform description of ComPhy controllers +// +#define MV_SOC_COMPHY_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x441000) +#define MV_SOC_HPIPE3_BASE(Cp) (MV_SOC_CP_BASE ((Cp)) + 0x120000) +#define MV_SOC_COMPHY_LANE_COUNT 6 +#define MV_SOC_COMPHY_MUX_BITS 4 + +EFI_STATUS +EFIAPI +ArmadaSoCDescComPhyGet ( + IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc, + IN OUT UINT8 *DescCount + ) +{ + MV_SOC_COMPHY_DESC *Desc; + UINT8 CpCount =3D FixedPcdGet8 (PcdMaxCpCount); + UINT8 CpIndex; + + Desc =3D AllocateZeroPool (CpCount * sizeof (MV_SOC_COMPHY_DESC)); + if (Desc =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + for (CpIndex =3D 0; CpIndex < CpCount; CpIndex++) { + Desc[CpIndex].ComPhyBaseAddress =3D MV_SOC_COMPHY_BASE (CpIndex); + Desc[CpIndex].ComPhyHpipe3BaseAddress =3D MV_SOC_HPIPE3_BASE (CpIndex); + Desc[CpIndex].ComPhyLaneCount =3D MV_SOC_COMPHY_LANE_COUNT; + Desc[CpIndex].ComPhyMuxBitCount =3D MV_SOC_COMPHY_MUX_BITS; + Desc[CpIndex].ComPhyChipType =3D MvComPhyTypeCp110; + Desc[CpIndex].ComPhyId =3D CpIndex; + } + + *ComPhyDesc =3D Desc; + *DescCount =3D CpCount; + + return EFI_SUCCESS; +} + +// // Platform description of NonDiscoverableDevices // =20 diff --git a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h b/Silicon/M= arvell/Include/Library/ArmadaSoCDescLib.h index 438f838..791d58b 100644 --- a/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h @@ -14,9 +14,29 @@ #ifndef __ARMADA_SOC_DESC_LIB_H__ #define __ARMADA_SOC_DESC_LIB_H__ =20 +#include #include =20 // +// ComPhy SoC description +// +typedef struct { + UINTN ComPhyId; + UINTN ComPhyBaseAddress; + UINTN ComPhyHpipe3BaseAddress; + UINTN ComPhyLaneCount; + UINTN ComPhyMuxBitCount; + MV_COMPHY_CHIP_TYPE ComPhyChipType; +} MV_SOC_COMPHY_DESC; + +EFI_STATUS +EFIAPI +ArmadaSoCDescComPhyGet ( + IN OUT MV_SOC_COMPHY_DESC **ComPhyDesc, + IN OUT UINT8 *DescCount + ); + +// // NonDiscoverable devices SoC description // // AHCI --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel