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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:36 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::243; helo=mail-lf0-x243.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ponM3jgvNe9csdxeVQcUf2w8WTGRPULIyNFLQk5E76k=; b=RPgBK0BJ0OiSZO2wrdOrZ/A61DbUfJ2rDv3FT7fxmA4zpJvSr5cZ0M1byiOvVqXz8f /qw4UwmMZ23IQNJOVOKfjjQl80S6CT5KmtbBvPInibJR019LBQ74SfnLLMqlwLOkWjbX XE3owlL4ngrzP5LuzhwZGg5VsU/91gm85YMPdNRZuBpsWJbctMUlvN+EkN8ZkRr6atBs ltkkuUJYPzgF4T/B490LHIZLKVCRpRHku4GrT/g5y1sfO0SNIvaBUzqHFmpUdAzCokxD IqXePL57eYrofngJ2Uo2/zHofTV9OdTsFdAQ21Eit2LHSG3iTJFtRN5gtoroqFX5xKUK /GVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ponM3jgvNe9csdxeVQcUf2w8WTGRPULIyNFLQk5E76k=; b=l512mkbZousWuvPRqnI9k1sHAVz/ZKsRl3yBPLPD+ZCpusI5SOaPlyihLTTCPW3NlR qxyv3CrmDo+VzCzFNu5tta9JieUlNPnGKbFoBylkV8coGAiOw7FWmx0Vk0QnO4eV28B0 nJOz5ttD8UfoOYKdoaKGqRcgarG4IUl5Tg6qz0pH9H+ZmDVTCBlQmpnQRv45TUV++Wj/ veRESjqRhJ8W1iunzyCGsCN+lLkHpESF7RmLrvUP95G+blV8jH05AnneF3wurNaIOkRZ PFQzZduJblZhgW0vOD28x0UFTDbAAZ5h2i+t/eijMfupMFNrNSstZX61iCVL2LViGcT7 M/TA== X-Gm-Message-State: APt69E2pEEJo6troZYYB6L08WjAOJIH5l7nAPT3LHxi+WHYtDROXpO2o jGYiQa70uckcxuJV+xrAyrMTfwM5ohc= X-Google-Smtp-Source: ADUXVKLexjwdlS8NDifKIBi/apPzbnvf/aDYqfEc/qDbcO9h46K3lyAb0+4EeVRzqTwsj5XOeWge3A== X-Received: by 2002:a19:9601:: with SMTP id y1-v6mr5584637lfd.130.1529266357554; Sun, 17 Jun 2018 13:12:37 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Sun, 17 Jun 2018 22:11:49 +0200 Message-Id: <1529266325-18371-10-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 09/25] Marvell/Drivers: MvBoardDesc: Extend protocol with PP2 support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org, nadavh@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Introduce new callback that can provide information about PP2 NICs to the Pp2Dxe driver. Extend ArmadaBoardDescLib with new structure MV_BOARD_PP2_DESC, for holding board specific data. In further steps it should be extended and replace PCD port's representation with the appropriate structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++ Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 63 ++++++++++++++++= ++++ 4 files changed, 80 insertions(+) diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon= /Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf index 5da5f21..6f57f06 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -58,6 +58,7 @@ =20 [Pcd] gMarvellTokenSpaceGuid.PcdPciEXhci + gMarvellTokenSpaceGuid.PcdPp2Controllers gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled gMarvellTokenSpaceGuid.PcdUtmiPortType =20 diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon= /Marvell/Include/Library/ArmadaBoardDescLib.h index 068535a..ab94877 100644 --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h @@ -17,6 +17,14 @@ #include =20 // +// PP2 NIC devices per-board description +// +typedef struct { + MV_SOC_PP2_DESC *SoC; + UINT8 Pp2DevCount; +} MV_BOARD_PP2_DESC; + +// // UTMI PHY devices per-board description // typedef struct { diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell= /Include/Protocol/BoardDesc.h index f8a2902..114a0ec 100644 --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOAR= D_DESC_PROTOCOL; =20 typedef EFI_STATUS +(EFIAPI *MV_BOARD_DESC_PP2_GET) ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_PP2_DESC **Pp2Desc + ); + +typedef +EFI_STATUS (EFIAPI *MV_BOARD_DESC_UTMI_GET) ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_UTMI_DESC **UtmiDesc @@ -55,6 +62,7 @@ VOID ); =20 struct _MARVELL_BOARD_DESC_PROTOCOL { + MV_BOARD_DESC_PP2_GET BoardDescPp2Get; MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; MV_BOARD_DESC_FREE BoardDescFree; }; diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/M= arvell/Drivers/BoardDesc/MvBoardDescDxe.c index 0232a21..7c0bc39 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c @@ -37,6 +37,68 @@ MV_BOARD_DESC *mBoardDescInstance; =20 STATIC EFI_STATUS +MvBoardDescPp2Get ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_PP2_DESC **Pp2Desc + ) +{ + UINT8 *Pp2DeviceEnabled; + UINTN Pp2Count, Pp2DeviceTableSize, Pp2Index, Index; + MV_BOARD_PP2_DESC *BoardDesc; + MV_SOC_PP2_DESC *SoCDesc; + EFI_STATUS Status; + + /* Get SoC data about all available PP2 controllers */ + Status =3D ArmadaSoCDescPp2Get (&SoCDesc, &Pp2Count); + if (EFI_ERROR (Status)) { + return Status; + } + + /* + * Obtain table with enabled Pp2 controllers, + * which is represented as an array of UINT8 values + * (0x0 - disabled, 0x1 enabled). + */ + Pp2DeviceEnabled =3D PcdGetPtr (PcdPp2Controllers); + if (Pp2DeviceEnabled =3D=3D NULL) { + /* No PP2 NIC on platform */ + return EFI_SUCCESS; + } + + Pp2DeviceTableSize =3D PcdGetSize (PcdPp2Controllers); + + /* Check if PCD with PP2 NICs is correctly defined */ + if (Pp2DeviceTableSize > Pp2Count) { + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdPp2Controllers format\n", __FUNCTIO= N__)); + return EFI_INVALID_PARAMETER; + } + + /* Allocate and fill board description */ + BoardDesc =3D AllocateZeroPool (Pp2DeviceTableSize * sizeof (MV_BOARD_PP= 2_DESC)); + if (BoardDesc =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + Pp2Index =3D 0; + for (Index =3D 0; Index < Pp2DeviceTableSize; Index++) { + if (!Pp2DeviceEnabled[Index]) { + continue; + } + + BoardDesc[Pp2Index].SoC =3D &SoCDesc[Index]; + Pp2Index++; + } + + BoardDesc->Pp2DevCount =3D Pp2Index; + + *Pp2Desc =3D BoardDesc; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS MvBoardDescUtmiGet ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_UTMI_DESC **UtmiDesc @@ -140,6 +202,7 @@ MvBoardDescInitProtocol ( IN MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol ) { + BoardDescProtocol->BoardDescPp2Get =3D MvBoardDescPp2Get; BoardDescProtocol->BoardDescUtmiGet =3D MvBoardDescUtmiGet; BoardDescProtocol->BoardDescFree =3D MvBoardDescFree; =20 --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel