From nobody Mon Sep 16 18:54:29 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1529266405234658.7562097772136; Sun, 17 Jun 2018 13:13:25 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6D10E2097214F; Sun, 17 Jun 2018 13:12:47 -0700 (PDT) Received: from mail-lf0-x244.google.com (mail-lf0-x244.google.com [IPv6:2a00:1450:4010:c07::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8B15A2097213C for ; Sun, 17 Jun 2018 13:12:44 -0700 (PDT) Received: by mail-lf0-x244.google.com with SMTP id p23-v6so9860115lfh.11 for ; Sun, 17 Jun 2018 13:12:44 -0700 (PDT) Received: from gilgamesh.semihalf.com (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:41 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mAFIKR77tuImppjWlErMCGbVG50og6G9coRlg4ZJyWw=; b=eCJATCbFYyr1hu0dpW6yF2JaryZQm2dgc64cXfmGKzDfSgzgdc+O1obhdSGwHoFunt C5OPtyAg+cITUzdjNNyiEnQtv43ElfvFib+/MSqdrMjCcbQxIZU7N2tuWYoZB0rgQFbY P5ZyXWEFk9W1YHC4OT0Nk1fTu+Jivfh4nvCkRV0zeYG/VYz3xXNsfdvcQa+/iuHOUnt2 uBEsy7ucQRsl47OTDyuEYAgWS/NfC1Ei1MkwXfqJX2gQ9sS7ohP294LhjnHc+ME3R5vc 3wGnd++GDozWKJzAG+mgOrGfFxfd6lp97YJmQ0oZB4TBqTQ/ka5pcz7El1Y0p7oPWV7Y TaXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mAFIKR77tuImppjWlErMCGbVG50og6G9coRlg4ZJyWw=; b=gsvbqYtW1tMNv4wDDl9D58SVlJUBwuRd2jqMg95ja8/8w8i2juKExWMjD5mE9wNYTw UI2hvSKmI/iQdKrU/8PJR30aMkTSh436GBWZ9KPqW6pyaDiR33YlED962T/NJSWAJ34k nFlfbFkBzmBhKKIgq88LAnITwrg1m6nJNdhgGvhedyuZsEy+sG9qYh2EFMEQw3tsfbZc MXDB97/tYUs6WZIcSCsRB7PWVFIaT4Gmha+jqSMKpvay33TfI4YlLHc2jkCOlmqW/ICJ TS+FezchtXGgQEw0j0rr41vt47ITRtnEGWl2NO5V54j9MzunOcERTgR5QNduZ6+fo3NS WiWg== X-Gm-Message-State: APt69E3hgRVVBP5RyjZw8KbcjO0naJFNJb+JFPOStFH5kbfwe/ll+kUZ z+fe/o5SM8Uam+LiTRt9xv/Vl/EWHVA= X-Google-Smtp-Source: ADUXVKJbqhlvT88l0oUe6Q3eHXKcIXLh5B2V3yoJZRLgVN79qhg/qH2ni7n99LR0fC/cZ2yh4pnCWQ== X-Received: by 2002:a2e:4811:: with SMTP id v17-v6mr6065297lja.39.1529266362658; Sun, 17 Jun 2018 13:12:42 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Sun, 17 Jun 2018 22:11:53 +0200 Message-Id: <1529266325-18371-14-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 13/25] Marvell/Drivers: NonDiscoverable: Switch to use MARVELL_BOARD_DESC X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org, nadavh@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" NonDiscoverableDevices driver used to get Armada7k8k AHCI/SDMMC/XHCI controller description from hardcoded values stored in the header file MvHwDescLib.h. As a result it is very hard to support other Armada SoC families with this driver. This patch updates the driver to get AHCI/SDMMC/XHCI controller description from newly introduced MARVELL_BOARD_DESC protocol, and removes the dependency on the hardcoded structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf | 6 +- Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c | 100 ++= ++++++++---------- 2 files changed, 52 insertions(+), 54 deletions(-) diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.= inf b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf index b62b3fb..98e5b0c 100644 --- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf +++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.inf @@ -52,10 +52,8 @@ NonDiscoverableDeviceRegistrationLib UefiDriverEntryPoint =20 -[Pcd] - gMarvellTokenSpaceGuid.PcdPciEAhci - gMarvellTokenSpaceGuid.PcdPciESdhci - gMarvellTokenSpaceGuid.PcdPciEXhci +[Protocols] + gMarvellBoardDescProtocolGuid =20 [Depex] TRUE diff --git a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.= c b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c index 6ff90a5..c5cf904 100644 --- a/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c +++ b/Silicon/Marvell/Drivers/NonDiscoverableDxe/NonDiscoverableDxe.c @@ -35,50 +35,33 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DA= MAGE. #include =20 #include -#include #include #include =20 +#include #include =20 -DECLARE_A7K8K_NONDISCOVERABLE_TEMPLATE; - -// -// Tables with used devices -// -STATIC UINT8 * CONST XhciDeviceTable =3D FixedPcdGetPtr (PcdPciEXhci); -STATIC UINT8 * CONST AhciDeviceTable =3D FixedPcdGetPtr (PcdPciEAhci); -STATIC UINT8 * CONST SdhciDeviceTable =3D FixedPcdGetPtr (PcdPciESdhci); - // // NonDiscoverable devices registration // STATIC EFI_STATUS NonDiscoverableInitXhci ( + IN MV_BOARD_XHCI_DESC *Desc ) { - MVHW_NONDISCOVERABLE_DESC *Desc =3D &mA7k8kNonDiscoverableDescTemplate; EFI_STATUS Status; UINT8 i; =20 - if (PcdGetSize (PcdPciEXhci) < Desc->XhciDevCount) { - DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEXhci format\n")); - return EFI_INVALID_PARAMETER; - } - for (i =3D 0; i < Desc->XhciDevCount; i++) { - if (!MVHW_DEV_ENABLED (Xhci, i)) { - continue; - } - Status =3D RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeXhci, - Desc->XhciDmaType[i], + Desc[i].SoC->XhciDmaType, NULL, NULL, 1, - Desc->XhciBaseAddresses[i], Desc->XhciMemSize[i] + Desc[i].SoC->XhciBaseAddress, + Desc[i].SoC->XhciMemSize ); =20 if (EFI_ERROR(Status)) { @@ -93,29 +76,21 @@ NonDiscoverableInitXhci ( STATIC EFI_STATUS NonDiscoverableInitAhci ( + IN MV_BOARD_AHCI_DESC *Desc ) { - MVHW_NONDISCOVERABLE_DESC *Desc =3D &mA7k8kNonDiscoverableDescTemplate; EFI_STATUS Status; UINT8 i; =20 - if (PcdGetSize (PcdPciEAhci) < Desc->AhciDevCount) { - DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciEAhci format\n")); - return EFI_INVALID_PARAMETER; - } - for (i =3D 0; i < Desc->AhciDevCount; i++) { - if (!MVHW_DEV_ENABLED (Ahci, i)) { - continue; - } - Status =3D RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeAhci, - Desc->AhciDmaType[i], + Desc[i].SoC->AhciDmaType, NULL, NULL, 1, - Desc->AhciBaseAddresses[i], Desc->AhciMemSize[i] + Desc[i].SoC->AhciBaseAddress, + Desc[i].SoC->AhciMemSize ); =20 if (EFI_ERROR(Status)) { @@ -130,29 +105,21 @@ NonDiscoverableInitAhci ( STATIC EFI_STATUS NonDiscoverableInitSdhci ( + IN MV_BOARD_SDMMC_DESC *Desc ) { - MVHW_NONDISCOVERABLE_DESC *Desc =3D &mA7k8kNonDiscoverableDescTemplate; EFI_STATUS Status; UINT8 i; =20 - if (PcdGetSize (PcdPciESdhci) < Desc->SdhciDevCount) { - DEBUG((DEBUG_ERROR, "NonDiscoverable: Wrong PcdPciESdhci format\n")); - return EFI_INVALID_PARAMETER; - } - - for (i =3D 0; i < Desc->SdhciDevCount; i++) { - if (!MVHW_DEV_ENABLED (Sdhci, i)) { - continue; - } - + for (i =3D 0; i < Desc->SdMmcDevCount; i++) { Status =3D RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeSdhci, - Desc->SdhciDmaType[i], + Desc[i].SoC->SdMmcDmaType, NULL, NULL, 1, - Desc->SdhciBaseAddresses[i], Desc->SdhciMemSize[i] + Desc[i].SoC->SdMmcBaseAddress, + Desc[i].SoC->SdMmcMemSize ); =20 if (EFI_ERROR(Status)) { @@ -174,22 +141,55 @@ NonDiscoverableEntryPoint ( IN EFI_SYSTEM_TABLE *SystemTable ) { + MARVELL_BOARD_DESC_PROTOCOL *BoardDescProtocol; + MV_BOARD_SDMMC_DESC *SdMmcBoardDesc; + MV_BOARD_AHCI_DESC *AhciBoardDesc; + MV_BOARD_XHCI_DESC *XhciBoardDesc; EFI_STATUS Status; =20 - Status =3D NonDiscoverableInitXhci(); + /* Obtain list of available controllers */ + Status =3D gBS->LocateProtocol (&gMarvellBoardDescProtocolGuid, + NULL, + (VOID **)&BoardDescProtocol); + if (EFI_ERROR (Status)) { + return Status; + } + + /* Xhci */ + Status =3D BoardDescProtocol->BoardDescXhciGet (BoardDescProtocol, + &XhciBoardDesc); + if (EFI_ERROR (Status)) { + return Status; + } + Status =3D NonDiscoverableInitXhci (XhciBoardDesc); if (EFI_ERROR(Status)) { return Status; } + BoardDescProtocol->BoardDescFree (XhciBoardDesc); =20 - Status =3D NonDiscoverableInitAhci(); + /* Ahci */ + Status =3D BoardDescProtocol->BoardDescAhciGet (BoardDescProtocol, + &AhciBoardDesc); + if (EFI_ERROR (Status)) { + return Status; + } + Status =3D NonDiscoverableInitAhci (AhciBoardDesc); if (EFI_ERROR(Status)) { return Status; } + BoardDescProtocol->BoardDescFree (AhciBoardDesc); =20 - Status =3D NonDiscoverableInitSdhci(); + /* SdMmc */ + Status =3D BoardDescProtocol->BoardDescSdMmcGet (BoardDescProtocol, + &SdMmcBoardDesc); + if (EFI_ERROR (Status)) { + return Status; + } + Status =3D NonDiscoverableInitSdhci (SdMmcBoardDesc); if (EFI_ERROR(Status)) { return Status; } + BoardDescProtocol->BoardDescFree (SdMmcBoardDesc); =20 return EFI_SUCCESS; } --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel