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[31.172.191.173]) by smtp.gmail.com with ESMTPSA id q75-v6sm387272lfq.47.2018.06.17.13.12.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 Jun 2018 13:12:45 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: None (no SPF record) identity=mailfrom; client-ip=2a00:1450:4010:c07::244; helo=mail-lf0-x244.google.com; envelope-from=mw@semihalf.com; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=J/VgZs1og5EnE0ONAEjuRLu7V0HLecYUbXJ1r4RIO/c=; b=hXujoCUWW0Ze2lUUiwwwWg9tuvXilWH/8bmi+zRMjK7KrvcmmARO+tEBdRSfbQHAzo kxVYnLdc8UqQRfiExFZtcXY2AVpMrwS5cnz/Fu4NhYF0vUe4n4Jzpal9OVYnhvsdkvkJ 7mQC53cZJKYVVrHgCGRX1yNU8nO6wfQbYwFH/U6Zc6JvHDE4s3xw8jOepmyEzSLkJuZk 4lxJYKvo7JGFVIsLz1k75cs9UrOxPqAN3W2Q4Y13gRA1eeeX3c0sPAJvbC7oI5L0HwN2 HqMEbAtoWtjw1AtuLND4z5bm2jXhXabNe24/4z5R5huVWJqQKhoeCQ4QECjyt2XNyuZF OY/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=J/VgZs1og5EnE0ONAEjuRLu7V0HLecYUbXJ1r4RIO/c=; b=LynPFtmV64XzVbGfaM32LMTLxbPkc5BKjg+bq6jjDs2WyBL6PRV5vGtfZN806nyR77 f7pRgJrOVpYAWrib4B3vzKDyGlfCtxtoI7C7UV6JYHECPDTBNadqS40Ozkz35OfQ3Juq cuelOztLG/hAeM2AD/FDPjjxiC2iaWIUykfHe8d/S6fAYU9BPP7mvYge5UhXxiwuItPt nr9NC9AUMdlpRrIIRO0rvIJUh4UzG9AsHGLQpVcO8kC6YquTSXS8NHfe9FM0OvE3hd8W anOmF40U8aicANOKSjI5DQY5KMvOsxLGZzuXu56ZV5pUQwHFCPcFvF0RmKRBKsxKZGmu gR6w== X-Gm-Message-State: APt69E1mZDG6fUM3trye4PiQhd4ezuPqyb6ac4vexv8pKOGcis/81WUV 6QjgABMfRihs5eAWBfROR7wNxEXw60s= X-Google-Smtp-Source: ADUXVKIuJYDbcEMJ/O+1EE3SqZ7cCWpiQ3ub1mCzCC6X3pZz9nkOPN/Byc+qU5whzTnBTrbxCzz+AQ== X-Received: by 2002:a19:6a0f:: with SMTP id u15-v6mr6029407lfu.81.1529266366368; Sun, 17 Jun 2018 13:12:46 -0700 (PDT) From: Marcin Wojtas To: edk2-devel@lists.01.org Date: Sun, 17 Jun 2018 22:11:56 +0200 Message-Id: <1529266325-18371-17-git-send-email-mw@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529266325-18371-1-git-send-email-mw@semihalf.com> References: <1529266325-18371-1-git-send-email-mw@semihalf.com> Subject: [edk2] [platforms: PATCH v2 16/25] Marvell/Drivers: MvBoardDesc: Extend protocol with ComPhy support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jinghua@marvell.com, ard.biesheuvel@linaro.org, jaz@semihalf.com, leif.lindholm@linaro.org, nadavh@marvell.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Introduce new callback that can provide information about ComPhy controllers to the ComPhyLib. Extend ArmadaBoardDescLib with new structure MV_BOARD_COMPHY_DESC, for holding board specific data. In further steps it can be extended and replace PCD SerDes lanes' representation with the appropriate structures. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Marcin Wojtas Reviewed-by: Leif Lindholm --- Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf | 1 + Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 8 +++ Silicon/Marvell/Include/Protocol/BoardDesc.h | 8 +++ Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c | 64 ++++++++++++++++= ++++ 4 files changed, 81 insertions(+) diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf b/Silicon= /Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf index cc0d9d4..dea99fd 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf @@ -57,6 +57,7 @@ gMarvellBoardDescProtocolGuid =20 [Pcd] + gMarvellTokenSpaceGuid.PcdComPhyDevices gMarvellTokenSpaceGuid.PcdPciEAhci gMarvellTokenSpaceGuid.PcdPciESdhci gMarvellTokenSpaceGuid.PcdPciEXhci diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h b/Silicon= /Marvell/Include/Library/ArmadaBoardDescLib.h index 7e4fa4d..32bd915 100644 --- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h +++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h @@ -17,6 +17,14 @@ #include =20 // +// COMPHY controllers per-board description +// +typedef struct { + MV_SOC_COMPHY_DESC *SoC; + UINTN ComPhyDevCount; +} MV_BOARD_COMPHY_DESC; + +// // NonDiscoverableDevices per-board description // =20 diff --git a/Silicon/Marvell/Include/Protocol/BoardDesc.h b/Silicon/Marvell= /Include/Protocol/BoardDesc.h index edf9491..b6dac75 100644 --- a/Silicon/Marvell/Include/Protocol/BoardDesc.h +++ b/Silicon/Marvell/Include/Protocol/BoardDesc.h @@ -43,6 +43,13 @@ typedef struct _MARVELL_BOARD_DESC_PROTOCOL MARVELL_BOAR= D_DESC_PROTOCOL; =20 typedef EFI_STATUS +(EFIAPI *MV_BOARD_DESC_COMPHY_GET) ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ); + +typedef +EFI_STATUS (EFIAPI *MV_BOARD_DESC_AHCI_GET) ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -84,6 +91,7 @@ VOID =20 struct _MARVELL_BOARD_DESC_PROTOCOL { MV_BOARD_DESC_AHCI_GET BoardDescAhciGet; + MV_BOARD_DESC_COMPHY_GET BoardDescComPhyGet; MV_BOARD_DESC_PP2_GET BoardDescPp2Get; MV_BOARD_DESC_SDMMC_GET BoardDescSdMmcGet; MV_BOARD_DESC_UTMI_GET BoardDescUtmiGet; diff --git a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c b/Silicon/M= arvell/Drivers/BoardDesc/MvBoardDescDxe.c index 3439017..6bbe40b 100644 --- a/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c +++ b/Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.c @@ -37,6 +37,69 @@ MV_BOARD_DESC *mBoardDescInstance; =20 STATIC EFI_STATUS +MvBoardDescComPhyGet ( + IN MARVELL_BOARD_DESC_PROTOCOL *This, + IN OUT MV_BOARD_COMPHY_DESC **ComPhyDesc + ) +{ + UINT8 *ComPhyDeviceEnabled; + UINTN ComPhyCount, ComPhyDeviceTableSize, ComPhyIndex, Index; + MV_BOARD_COMPHY_DESC *BoardDesc; + MV_SOC_COMPHY_DESC *SoCDesc; + EFI_STATUS Status; + + /* Get SoC data about all available ComPhy controllers */ + Status =3D ArmadaSoCDescComPhyGet (&SoCDesc, &ComPhyCount); + if (EFI_ERROR (Status)) { + return Status; + } + + /* + * Obtain table with enabled ComPhy controllers + * which is represented as an array of UINT8 values + * (0x0 - disabled, 0x1 enabled). + */ + ComPhyDeviceEnabled =3D PcdGetPtr (PcdComPhyDevices); + if (ComPhyDeviceEnabled =3D=3D NULL) { + /* No ComPhy controllers declared */ + return EFI_NOT_FOUND; + } + + ComPhyDeviceTableSize =3D PcdGetSize (PcdComPhyDevices); + + /* Check if PCD with ComPhy is correctly defined */ + if (ComPhyDeviceTableSize > ComPhyCount) { + DEBUG ((DEBUG_ERROR, "%a: Wrong PcdComPhyDevices format\n", __FUNCTION= __)); + return EFI_INVALID_PARAMETER; + } + + /* Allocate and fill board description */ + BoardDesc =3D AllocateZeroPool (ComPhyDeviceTableSize * sizeof (MV_BOARD= _COMPHY_DESC)); + if (BoardDesc =3D=3D NULL) { + DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__)); + return EFI_OUT_OF_RESOURCES; + } + + ComPhyIndex =3D 0; + for (Index =3D 0; Index < ComPhyDeviceTableSize; Index++) { + if (!ComPhyDeviceEnabled[Index]) { + DEBUG ((DEBUG_ERROR, "%a: Skip ComPhy controller %d\n", __FUNCTION__= , Index)); + continue; + } + + BoardDesc[ComPhyIndex].SoC =3D &SoCDesc[Index]; + ComPhyIndex++; + } + + BoardDesc->ComPhyDevCount =3D ComPhyIndex; + + *ComPhyDesc =3D BoardDesc; + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS MvBoardDescAhciGet ( IN MARVELL_BOARD_DESC_PROTOCOL *This, IN OUT MV_BOARD_AHCI_DESC **AhciDesc @@ -392,6 +455,7 @@ MvBoardDescInitProtocol ( ) { BoardDescProtocol->BoardDescAhciGet =3D MvBoardDescAhciGet; + BoardDescProtocol->BoardDescComPhyGet =3D MvBoardDescComPhyGet; BoardDescProtocol->BoardDescPp2Get =3D MvBoardDescPp2Get; BoardDescProtocol->BoardDescSdMmcGet =3D MvBoardDescSdMmcGet; BoardDescProtocol->BoardDescUtmiGet =3D MvBoardDescUtmiGet; --=20 2.7.4 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel