This patch introduces DSDT table and adds necessary
wiring in order to enable ACPI support on Armada 7040 DB.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
7 files changed, 346 insertions(+)
create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index f1ccda0..d4c67a2 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -593,6 +593,20 @@
ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
!endif #$(INCLUDE_TFTP_COMMAND)
+[Components.AARCH64]
+ #
+ # Generic ACPI modules
+ #
+ MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
+ <LibraryClasses>
+ PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
+
+ <PcdsFixedAtBuild>
+ # support ACPI v5.0 or later
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
+ }
+
[BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index d3dffb0..f6faff1 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -51,6 +51,9 @@
[Components.common]
Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
+[Components.AARCH64]
+ Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
+
################################################################################
#
# Pcd Section - list of all EDK II PCD Entries defined by this Platform
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
index 909ad3e..c064a43 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
@@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
# DTB
INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
+!if $(ARCH) == AARCH64
+ # ACPI support
+ INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
+ INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+!endif
+
!include $(BOARD_DXE_FV_COMPONENTS)
# PEI phase firmware volume
@@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
FILE FREEFORM = $(NAMED_GUID) {
RAW BIN |.dtb
}
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ASL |.aml
+ RAW ACPI |.acpi
+ }
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
new file mode 100644
index 0000000..8732e10
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
@@ -0,0 +1,61 @@
+## @file
+# Component description file for PlatformAcpiTables module.
+#
+# ACPI table data and ASL sources required to boot the platform.
+#
+# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PlatformAcpiTables
+ FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
+ MODULE_TYPE = USER_DEFINED
+ VERSION_STRING = 1.0
+
+[Sources]
+ Dsdt.asl
+ ../Fadt.aslc
+ ../Gtdt.aslc
+ ../Madt.aslc
+ ../Pptt.aslc
+ ../Spcr.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Marvell/Marvell.dec
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
+ gArmTokenSpaceGuid.PcdGicDistributorBase
+
+ gArmPlatformTokenSpaceGuid.PcdCoreCount
+
+ gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
+ gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
+
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate
+
+[BuildOptions]
+ *_*_*_ASLCC_FLAGS = -DARMADA7K
diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
index b4c3e20..0610fdb 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
@@ -14,3 +14,8 @@
# DTB
INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
+
+!if $(ARCH) == AARCH64
+ # ACPI support
+ INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
+!endif
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
new file mode 100644
index 0000000..621b688
--- /dev/null
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
@@ -0,0 +1,229 @@
+/** @file
+
+ Differentiated System Description Table Fields (DSDT)
+
+ Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+ Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "IcuInterrupts.h"
+
+DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
+{
+ Scope (_SB)
+ {
+ Device (CPU0)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x000) // _UID: Unique ID
+ }
+ Device (CPU1)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x001) // _UID: Unique ID
+ }
+ Device (CPU2)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x100) // _UID: Unique ID
+ }
+ Device (CPU3)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, 0x101) // _UID: Unique ID
+ }
+
+ Device (AHC0)
+ {
+ Name (_HID, "LNRO001E") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+ Name (_CLS, Package (0x03) // _CLS: Class Code
+ {
+ 0x01,
+ 0x06,
+ 0x01
+ })
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF2540000, // Address Base (MMIO)
+ 0x00030000, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_CP0_SATA_H0
+ }
+ })
+ }
+
+ Device (XHC0)
+ {
+ Name (_HID, "PNP0D10") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF2500000, // Address Base (MMIO)
+ 0x00004000, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_CP0_USB_H0
+ }
+ })
+ }
+
+ Device (XHC1)
+ {
+ Name (_HID, "PNP0D10") // _HID: Hardware ID
+ Name (_UID, 0x01) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0xF2510000, // Address Base (MMIO)
+ 0x00004000, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_CP0_USB_H1
+ }
+ })
+ }
+
+ Device (COM1)
+ {
+ Name (_HID, "HISI0031") // _HID: Hardware ID
+ Name (_CID, "8250dw") // _CID: Compatible ID
+ Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ FixedPcdGet64(PcdSerialRegisterBase), // Address Base
+ 0x00000100, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 51
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", FixedPcdGet32 (PcdSerialClockRate) },
+ Package () { "reg-io-width", 1 },
+ Package () { "reg-shift", 2 },
+ }
+ })
+ }
+
+ Device (PP20)
+ {
+ Name (_HID, "MRVL0110") // _HID: Hardware ID
+ Name (_CCA, 0x01) // Cache-coherent controller
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
+ Memory32Fixed (ReadWrite, 0xf2129000 , 0xb000)
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 333333333 },
+ }
+ })
+ Device (ETH0)
+ {
+ Name (_ADR, 0x0)
+ Name (_CRS, ResourceTemplate ()
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_PP2_CP0_PORT0
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port-id", 0 },
+ Package () { "gop-port-id", 0 },
+ Package () { "phy-mode", "10gbase-kr"},
+ }
+ })
+ }
+ Device (ETH1)
+ {
+ Name (_ADR, 0x0)
+ Name (_CRS, ResourceTemplate ()
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_PP2_CP0_PORT1
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port-id", 1 },
+ Package () { "gop-port-id", 2 },
+ Package () { "phy-mode", "sgmii"},
+ }
+ })
+ }
+ Device (ETH2)
+ {
+ Name (_ADR, 0x0)
+ Name (_CRS, ResourceTemplate ()
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ CP_GIC_SPI_PP2_CP0_PORT2
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "port-id", 2 },
+ Package () { "gop-port-id", 3 },
+ Package () { "phy-mode", "rgmii-id"},
+ }
+ })
+ }
+ }
+
+ Device (RNG0)
+ {
+ Name (_HID, "PRP0001") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Shared)
+ {
+ CP_GIC_SPI_CP0_EIP_RNG0
+ }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "compatible", "inside-secure,safexcel-eip76" },
+ }
+ })
+ }
+ }
+}
diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
index d5deed5..2603980 100644
--- a/Silicon/Marvell/Documentation/PortingGuide.txt
+++ b/Silicon/Marvell/Documentation/PortingGuide.txt
@@ -43,6 +43,28 @@ board. For the sake of simplicity new Marvell board will be called "new_board".
- Output files (and among others FD file, which may be used by ATF) are
generated under directory pointed by "OUTPUT_DIRECTORY" entry (see point 1.2).
+5. ACPI support (optional)
+ - The tables can be enabled as in A70x0Db example:
+
+ <path to edk2-platforms>/Platforms/Marvell/Armada/AcpiTables/Armada70x0Db/
+
+ - Enable compilation of the tables in the board's .dsc file. Add it to the
+ output flash image contents via .fdf.inc file - path to it defined as
+ BOARD_DXE_FV_COMPONENTS. Example:
+ Armada70x0Db.dsc:
+
+ BOARD_DXE_FV_COMPONENTS = Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
+
+ [Components.AARCH64]
+ Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
+
+ Armada70x0Db.fdf.inc:
+
+ !if $(ARCH) == AARCH64
+ # ACPI support
+ INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
+ !endif
+
COMPHY configuration
====================
--
2.7.4
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
> This patch introduces DSDT table and adds necessary
> wiring in order to enable ACPI support on Armada 7040 DB.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
> Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
> Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
> Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
> Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
> 7 files changed, 346 insertions(+)
> create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
>
> diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> index f1ccda0..d4c67a2 100644
> --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> @@ -593,6 +593,20 @@
> ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> !endif #$(INCLUDE_TFTP_COMMAND)
>
> +[Components.AARCH64]
> + #
> + # Generic ACPI modules
> + #
> + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
> + <LibraryClasses>
> + PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
> +
> + <PcdsFixedAtBuild>
> + # support ACPI v5.0 or later
> + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
> + }
> +
> [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
> GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
>
> diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> index d3dffb0..f6faff1 100644
> --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> @@ -51,6 +51,9 @@
> [Components.common]
> Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
>
> +[Components.AARCH64]
> + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> +
> ################################################################################
> #
> # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> index 909ad3e..c064a43 100644
> --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> @@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
> # DTB
> INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
>
> +!if $(ARCH) == AARCH64
> + # ACPI support
> + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> +!endif
> +
> !include $(BOARD_DXE_FV_COMPONENTS)
>
> # PEI phase firmware volume
> @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
> FILE FREEFORM = $(NAMED_GUID) {
> RAW BIN |.dtb
> }
> +
> +[Rule.Common.USER_DEFINED.ACPITABLE]
> + FILE FREEFORM = $(NAMED_GUID) {
> + RAW ASL |.aml
> + RAW ACPI |.acpi
> + }
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> new file mode 100644
> index 0000000..8732e10
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> @@ -0,0 +1,61 @@
> +## @file
> +# Component description file for PlatformAcpiTables module.
> +#
> +# ACPI table data and ASL sources required to boot the platform.
> +#
> +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> +# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001A
> + BASE_NAME = PlatformAcpiTables
> + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
> + MODULE_TYPE = USER_DEFINED
> + VERSION_STRING = 1.0
> +
> +[Sources]
> + Dsdt.asl
> + ../Fadt.aslc
> + ../Gtdt.aslc
> + ../Madt.aslc
> + ../Pptt.aslc
> + ../Spcr.aslc
> +
Could we reshuffle these files so we nog longer rely relative includes?
Possibly using a Common subdirectory?
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Marvell/Marvell.dec
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> + gArmTokenSpaceGuid.PcdGicDistributorBase
> +
> + gArmPlatformTokenSpaceGuid.PcdCoreCount
> +
> + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> +
> + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
> +
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate
> +
> +[BuildOptions]
> + *_*_*_ASLCC_FLAGS = -DARMADA7K
> diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> index b4c3e20..0610fdb 100644
> --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> @@ -14,3 +14,8 @@
>
> # DTB
> INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
> +
> +!if $(ARCH) == AARCH64
> + # ACPI support
> + INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> +!endif
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> new file mode 100644
> index 0000000..621b688
> --- /dev/null
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> @@ -0,0 +1,229 @@
> +/** @file
> +
> + Differentiated System Description Table Fields (DSDT)
> +
> + Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> + Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD License
> + which accompanies this distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include "IcuInterrupts.h"
> +
> +DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> +{
> + Scope (_SB)
> + {
> + Device (CPU0)
> + {
> + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> + Name (_UID, 0x000) // _UID: Unique ID
> + }
> + Device (CPU1)
> + {
> + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> + Name (_UID, 0x001) // _UID: Unique ID
> + }
> + Device (CPU2)
> + {
> + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> + Name (_UID, 0x100) // _UID: Unique ID
> + }
> + Device (CPU3)
> + {
> + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> + Name (_UID, 0x101) // _UID: Unique ID
> + }
> +
> + Device (AHC0)
> + {
> + Name (_HID, "LNRO001E") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> + Name (_CLS, Package (0x03) // _CLS: Class Code
> + {
> + 0x01,
> + 0x06,
> + 0x01
> + })
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF2540000, // Address Base (MMIO)
> + 0x00030000, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_CP0_SATA_H0
> + }
> + })
> + }
> +
> + Device (XHC0)
> + {
> + Name (_HID, "PNP0D10") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF2500000, // Address Base (MMIO)
> + 0x00004000, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_CP0_USB_H0
> + }
> + })
> + }
> +
> + Device (XHC1)
> + {
> + Name (_HID, "PNP0D10") // _HID: Hardware ID
> + Name (_UID, 0x01) // _UID: Unique ID
> + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> +
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + 0xF2510000, // Address Base (MMIO)
> + 0x00004000, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_CP0_USB_H1
> + }
> + })
> + }
> +
> + Device (COM1)
> + {
> + Name (_HID, "HISI0031") // _HID: Hardware ID
> + Name (_CID, "8250dw") // _CID: Compatible ID
> + Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> + {
> + Memory32Fixed (ReadWrite,
> + FixedPcdGet64(PcdSerialRegisterBase), // Address Base
> + 0x00000100, // Address Length
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + 51
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", FixedPcdGet32 (PcdSerialClockRate) },
> + Package () { "reg-io-width", 1 },
> + Package () { "reg-shift", 2 },
> + }
> + })
> + }
> +
> + Device (PP20)
> + {
> + Name (_HID, "MRVL0110") // _HID: Hardware ID
> + Name (_CCA, 0x01) // Cache-coherent controller
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> + Memory32Fixed (ReadWrite, 0xf2129000 , 0xb000)
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "clock-frequency", 333333333 },
> + }
> + })
> + Device (ETH0)
> + {
> + Name (_ADR, 0x0)
> + Name (_CRS, ResourceTemplate ()
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_PP2_CP0_PORT0
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "port-id", 0 },
> + Package () { "gop-port-id", 0 },
> + Package () { "phy-mode", "10gbase-kr"},
> + }
> + })
> + }
> + Device (ETH1)
> + {
> + Name (_ADR, 0x0)
> + Name (_CRS, ResourceTemplate ()
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_PP2_CP0_PORT1
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "port-id", 1 },
> + Package () { "gop-port-id", 2 },
> + Package () { "phy-mode", "sgmii"},
> + }
> + })
> + }
> + Device (ETH2)
> + {
> + Name (_ADR, 0x0)
> + Name (_CRS, ResourceTemplate ()
> + {
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> + {
> + CP_GIC_SPI_PP2_CP0_PORT2
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "port-id", 2 },
> + Package () { "gop-port-id", 3 },
> + Package () { "phy-mode", "rgmii-id"},
> + }
> + })
> + }
> + }
> +
> + Device (RNG0)
> + {
> + Name (_HID, "PRP0001") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared)
> + {
> + CP_GIC_SPI_CP0_EIP_RNG0
> + }
> + })
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "compatible", "inside-secure,safexcel-eip76" },
> + }
> + })
> + }
> + }
> +}
> diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
> index d5deed5..2603980 100644
> --- a/Silicon/Marvell/Documentation/PortingGuide.txt
> +++ b/Silicon/Marvell/Documentation/PortingGuide.txt
> @@ -43,6 +43,28 @@ board. For the sake of simplicity new Marvell board will be called "new_board".
> - Output files (and among others FD file, which may be used by ATF) are
> generated under directory pointed by "OUTPUT_DIRECTORY" entry (see point 1.2).
>
> +5. ACPI support (optional)
> + - The tables can be enabled as in A70x0Db example:
> +
> + <path to edk2-platforms>/Platforms/Marvell/Armada/AcpiTables/Armada70x0Db/
> +
> + - Enable compilation of the tables in the board's .dsc file. Add it to the
> + output flash image contents via .fdf.inc file - path to it defined as
> + BOARD_DXE_FV_COMPONENTS. Example:
> + Armada70x0Db.dsc:
> +
> + BOARD_DXE_FV_COMPONENTS = Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> +
> + [Components.AARCH64]
> + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> +
> + Armada70x0Db.fdf.inc:
> +
> + !if $(ARCH) == AARCH64
> + # ACPI support
> + INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> + !endif
> +
>
> COMPHY configuration
> ====================
> --
> 2.7.4
>
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
HI Ard,
pon., 6 sie 2018 o 13:54 Ard Biesheuvel <ard.biesheuvel@linaro.org> napisał(a):
>
> On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
> > This patch introduces DSDT table and adds necessary
> > wiring in order to enable ACPI support on Armada 7040 DB.
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> > ---
> > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
> > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
> > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
> > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
> > Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
> > 7 files changed, 346 insertions(+)
> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> >
> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> > index f1ccda0..d4c67a2 100644
> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> > @@ -593,6 +593,20 @@
> > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> > !endif #$(INCLUDE_TFTP_COMMAND)
> >
> > +[Components.AARCH64]
> > + #
> > + # Generic ACPI modules
> > + #
> > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
> > + <LibraryClasses>
> > + PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
> > +
> > + <PcdsFixedAtBuild>
> > + # support ACPI v5.0 or later
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
> > + }
> > +
> > [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
> > GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
> >
> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> > index d3dffb0..f6faff1 100644
> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> > @@ -51,6 +51,9 @@
> > [Components.common]
> > Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
> >
> > +[Components.AARCH64]
> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > +
> > ################################################################################
> > #
> > # Pcd Section - list of all EDK II PCD Entries defined by this Platform
> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> > index 909ad3e..c064a43 100644
> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> > @@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
> > # DTB
> > INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
> >
> > +!if $(ARCH) == AARCH64
> > + # ACPI support
> > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> > +!endif
> > +
> > !include $(BOARD_DXE_FV_COMPONENTS)
> >
> > # PEI phase firmware volume
> > @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
> > FILE FREEFORM = $(NAMED_GUID) {
> > RAW BIN |.dtb
> > }
> > +
> > +[Rule.Common.USER_DEFINED.ACPITABLE]
> > + FILE FREEFORM = $(NAMED_GUID) {
> > + RAW ASL |.aml
> > + RAW ACPI |.acpi
> > + }
> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > new file mode 100644
> > index 0000000..8732e10
> > --- /dev/null
> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > @@ -0,0 +1,61 @@
> > +## @file
> > +# Component description file for PlatformAcpiTables module.
> > +#
> > +# ACPI table data and ASL sources required to boot the platform.
> > +#
> > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> > +# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
> > +#
> > +# This program and the accompanying materials
> > +# are licensed and made available under the terms and conditions of the BSD License
> > +# which accompanies this distribution. The full text of the license may be found at
> > +# http://opensource.org/licenses/bsd-license.php
> > +#
> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +#
> > +##
> > +
> > +[Defines]
> > + INF_VERSION = 0x0001001A
> > + BASE_NAME = PlatformAcpiTables
> > + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
> > + MODULE_TYPE = USER_DEFINED
> > + VERSION_STRING = 1.0
> > +
> > +[Sources]
> > + Dsdt.asl
> > + ../Fadt.aslc
> > + ../Gtdt.aslc
> > + ../Madt.aslc
> > + ../Pptt.aslc
> > + ../Spcr.aslc
> > +
>
> Could we reshuffle these files so we nog longer rely relative includes?
> Possibly using a Common subdirectory?
Would below directory tree be acceptable?
Silicon/Marvell/Armada7k8k/AcpiTables/
├── AcpiHeader.h
├── Armada70x0Db
│ └── Dsdt.asl
├── Armada70x0Db.inf
├── Armada80x0Db
│ └── Dsdt.asl
├── Armada80x0Db.inf
├── Armada80x0McBin
│ └── Dsdt.asl
├── Armada80x0McBin.inf
├── Fadt.aslc
├── Gtdt.aslc
├── IcuInterrupts.h
├── Madt.aslc
├── Pptt.aslc
└── Spcr.aslc
This way we will have following in the .inf
Armada80x0McBin/Dsdt.asl
Fadt.aslc
Gtdt.aslc
Madt.aslc
Pptt.aslc
Spcr.aslc
Best regards,
Marcin
>
> > +[Packages]
> > + ArmPkg/ArmPkg.dec
> > + ArmPlatformPkg/ArmPlatformPkg.dec
> > + EmbeddedPkg/EmbeddedPkg.dec
> > + MdeModulePkg/MdeModulePkg.dec
> > + MdePkg/MdePkg.dec
> > + Silicon/Marvell/Marvell.dec
> > +
> > +[FixedPcd]
> > + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> > + gArmTokenSpaceGuid.PcdGicDistributorBase
> > +
> > + gArmPlatformTokenSpaceGuid.PcdCoreCount
> > +
> > + gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> > + gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> > + gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> > + gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> > +
> > + gArmTokenSpaceGuid.PcdGenericWatchdogControlBase
> > + gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase
> > + gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum
> > +
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate
> > +
> > +[BuildOptions]
> > + *_*_*_ASLCC_FLAGS = -DARMADA7K
> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> > index b4c3e20..0610fdb 100644
> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> > @@ -14,3 +14,8 @@
> >
> > # DTB
> > INF RuleOverride = DTB Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
> > +
> > +!if $(ARCH) == AARCH64
> > + # ACPI support
> > + INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > +!endif
> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> > new file mode 100644
> > index 0000000..621b688
> > --- /dev/null
> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> > @@ -0,0 +1,229 @@
> > +/** @file
> > +
> > + Differentiated System Description Table Fields (DSDT)
> > +
> > + Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> > + Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
> > +
> > + This program and the accompanying materials
> > + are licensed and made available under the terms and conditions of the BSD License
> > + which accompanies this distribution. The full text of the license may be found at
> > + http://opensource.org/licenses/bsd-license.php
> > +
> > + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +
> > +**/
> > +
> > +#include "IcuInterrupts.h"
> > +
> > +DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
> > +{
> > + Scope (_SB)
> > + {
> > + Device (CPU0)
> > + {
> > + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > + Name (_UID, 0x000) // _UID: Unique ID
> > + }
> > + Device (CPU1)
> > + {
> > + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > + Name (_UID, 0x001) // _UID: Unique ID
> > + }
> > + Device (CPU2)
> > + {
> > + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > + Name (_UID, 0x100) // _UID: Unique ID
> > + }
> > + Device (CPU3)
> > + {
> > + Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
> > + Name (_UID, 0x101) // _UID: Unique ID
> > + }
> > +
> > + Device (AHC0)
> > + {
> > + Name (_HID, "LNRO001E") // _HID: Hardware ID
> > + Name (_UID, 0x00) // _UID: Unique ID
> > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > + Name (_CLS, Package (0x03) // _CLS: Class Code
> > + {
> > + 0x01,
> > + 0x06,
> > + 0x01
> > + })
> > +
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + 0xF2540000, // Address Base (MMIO)
> > + 0x00030000, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_CP0_SATA_H0
> > + }
> > + })
> > + }
> > +
> > + Device (XHC0)
> > + {
> > + Name (_HID, "PNP0D10") // _HID: Hardware ID
> > + Name (_UID, 0x00) // _UID: Unique ID
> > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > +
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + 0xF2500000, // Address Base (MMIO)
> > + 0x00004000, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_CP0_USB_H0
> > + }
> > + })
> > + }
> > +
> > + Device (XHC1)
> > + {
> > + Name (_HID, "PNP0D10") // _HID: Hardware ID
> > + Name (_UID, 0x01) // _UID: Unique ID
> > + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
> > +
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + 0xF2510000, // Address Base (MMIO)
> > + 0x00004000, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_CP0_USB_H1
> > + }
> > + })
> > + }
> > +
> > + Device (COM1)
> > + {
> > + Name (_HID, "HISI0031") // _HID: Hardware ID
> > + Name (_CID, "8250dw") // _CID: Compatible ID
> > + Name (_ADR, FixedPcdGet64(PcdSerialRegisterBase)) // _ADR: Address
> > + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
> > + {
> > + Memory32Fixed (ReadWrite,
> > + FixedPcdGet64(PcdSerialRegisterBase), // Address Base
> > + 0x00000100, // Address Length
> > + )
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + 51
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "clock-frequency", FixedPcdGet32 (PcdSerialClockRate) },
> > + Package () { "reg-io-width", 1 },
> > + Package () { "reg-shift", 2 },
> > + }
> > + })
> > + }
> > +
> > + Device (PP20)
> > + {
> > + Name (_HID, "MRVL0110") // _HID: Hardware ID
> > + Name (_CCA, 0x01) // Cache-coherent controller
> > + Name (_UID, 0x00) // _UID: Unique ID
> > + Name (_CRS, ResourceTemplate ()
> > + {
> > + Memory32Fixed (ReadWrite, 0xf2000000 , 0x100000)
> > + Memory32Fixed (ReadWrite, 0xf2129000 , 0xb000)
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "clock-frequency", 333333333 },
> > + }
> > + })
> > + Device (ETH0)
> > + {
> > + Name (_ADR, 0x0)
> > + Name (_CRS, ResourceTemplate ()
> > + {
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_PP2_CP0_PORT0
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "port-id", 0 },
> > + Package () { "gop-port-id", 0 },
> > + Package () { "phy-mode", "10gbase-kr"},
> > + }
> > + })
> > + }
> > + Device (ETH1)
> > + {
> > + Name (_ADR, 0x0)
> > + Name (_CRS, ResourceTemplate ()
> > + {
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_PP2_CP0_PORT1
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "port-id", 1 },
> > + Package () { "gop-port-id", 2 },
> > + Package () { "phy-mode", "sgmii"},
> > + }
> > + })
> > + }
> > + Device (ETH2)
> > + {
> > + Name (_ADR, 0x0)
> > + Name (_CRS, ResourceTemplate ()
> > + {
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> > + {
> > + CP_GIC_SPI_PP2_CP0_PORT2
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "port-id", 2 },
> > + Package () { "gop-port-id", 3 },
> > + Package () { "phy-mode", "rgmii-id"},
> > + }
> > + })
> > + }
> > + }
> > +
> > + Device (RNG0)
> > + {
> > + Name (_HID, "PRP0001") // _HID: Hardware ID
> > + Name (_UID, 0x00) // _UID: Unique ID
> > + Name (_CRS, ResourceTemplate ()
> > + {
> > + Memory32Fixed (ReadWrite, 0xF2760000, 0x7D)
> > + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared)
> > + {
> > + CP_GIC_SPI_CP0_EIP_RNG0
> > + }
> > + })
> > + Name (_DSD, Package () {
> > + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> > + Package () {
> > + Package () { "compatible", "inside-secure,safexcel-eip76" },
> > + }
> > + })
> > + }
> > + }
> > +}
> > diff --git a/Silicon/Marvell/Documentation/PortingGuide.txt b/Silicon/Marvell/Documentation/PortingGuide.txt
> > index d5deed5..2603980 100644
> > --- a/Silicon/Marvell/Documentation/PortingGuide.txt
> > +++ b/Silicon/Marvell/Documentation/PortingGuide.txt
> > @@ -43,6 +43,28 @@ board. For the sake of simplicity new Marvell board will be called "new_board".
> > - Output files (and among others FD file, which may be used by ATF) are
> > generated under directory pointed by "OUTPUT_DIRECTORY" entry (see point 1.2).
> >
> > +5. ACPI support (optional)
> > + - The tables can be enabled as in A70x0Db example:
> > +
> > + <path to edk2-platforms>/Platforms/Marvell/Armada/AcpiTables/Armada70x0Db/
> > +
> > + - Enable compilation of the tables in the board's .dsc file. Add it to the
> > + output flash image contents via .fdf.inc file - path to it defined as
> > + BOARD_DXE_FV_COMPONENTS. Example:
> > + Armada70x0Db.dsc:
> > +
> > + BOARD_DXE_FV_COMPONENTS = Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc
> > +
> > + [Components.AARCH64]
> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > +
> > + Armada70x0Db.fdf.inc:
> > +
> > + !if $(ARCH) == AARCH64
> > + # ACPI support
> > + INF RuleOverride = ACPITABLE Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> > + !endif
> > +
> >
> > COMPHY configuration
> > ====================
> > --
> > 2.7.4
> >
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On 6 August 2018 at 18:08, Marcin Wojtas <mw@semihalf.com> wrote:
> HI Ard,
>
> pon., 6 sie 2018 o 13:54 Ard Biesheuvel <ard.biesheuvel@linaro.org> napisał(a):
>>
>> On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
>> > This patch introduces DSDT table and adds necessary
>> > wiring in order to enable ACPI support on Armada 7040 DB.
>> >
>> > Contributed-under: TianoCore Contribution Agreement 1.1
>> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> > ---
>> > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
>> > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
>> > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
>> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
>> > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
>> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
>> > Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
>> > 7 files changed, 346 insertions(+)
>> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
>> >
>> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> > index f1ccda0..d4c67a2 100644
>> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> > @@ -593,6 +593,20 @@
>> > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> > !endif #$(INCLUDE_TFTP_COMMAND)
>> >
>> > +[Components.AARCH64]
>> > + #
>> > + # Generic ACPI modules
>> > + #
>> > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
>> > + <LibraryClasses>
>> > + PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
>> > +
>> > + <PcdsFixedAtBuild>
>> > + # support ACPI v5.0 or later
>> > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
>> > + }
>> > +
>> > [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
>> > GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
>> >
>> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> > index d3dffb0..f6faff1 100644
>> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> > @@ -51,6 +51,9 @@
>> > [Components.common]
>> > Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
>> >
>> > +[Components.AARCH64]
>> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> > +
>> > ################################################################################
>> > #
>> > # Pcd Section - list of all EDK II PCD Entries defined by this Platform
>> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> > index 909ad3e..c064a43 100644
>> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> > @@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
>> > # DTB
>> > INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
>> >
>> > +!if $(ARCH) == AARCH64
>> > + # ACPI support
>> > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>> > +!endif
>> > +
>> > !include $(BOARD_DXE_FV_COMPONENTS)
>> >
>> > # PEI phase firmware volume
>> > @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
>> > FILE FREEFORM = $(NAMED_GUID) {
>> > RAW BIN |.dtb
>> > }
>> > +
>> > +[Rule.Common.USER_DEFINED.ACPITABLE]
>> > + FILE FREEFORM = $(NAMED_GUID) {
>> > + RAW ASL |.aml
>> > + RAW ACPI |.acpi
>> > + }
>> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> > new file mode 100644
>> > index 0000000..8732e10
>> > --- /dev/null
>> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> > @@ -0,0 +1,61 @@
>> > +## @file
>> > +# Component description file for PlatformAcpiTables module.
>> > +#
>> > +# ACPI table data and ASL sources required to boot the platform.
>> > +#
>> > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>> > +# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
>> > +#
>> > +# This program and the accompanying materials
>> > +# are licensed and made available under the terms and conditions of the BSD License
>> > +# which accompanies this distribution. The full text of the license may be found at
>> > +# http://opensource.org/licenses/bsd-license.php
>> > +#
>> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> > +#
>> > +##
>> > +
>> > +[Defines]
>> > + INF_VERSION = 0x0001001A
>> > + BASE_NAME = PlatformAcpiTables
>> > + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
>> > + MODULE_TYPE = USER_DEFINED
>> > + VERSION_STRING = 1.0
>> > +
>> > +[Sources]
>> > + Dsdt.asl
>> > + ../Fadt.aslc
>> > + ../Gtdt.aslc
>> > + ../Madt.aslc
>> > + ../Pptt.aslc
>> > + ../Spcr.aslc
>> > +
>>
>> Could we reshuffle these files so we nog longer rely relative includes?
>> Possibly using a Common subdirectory?
>
> Would below directory tree be acceptable?
>
> Silicon/Marvell/Armada7k8k/AcpiTables/
> ├── AcpiHeader.h
> ├── Armada70x0Db
> │ └── Dsdt.asl
> ├── Armada70x0Db.inf
> ├── Armada80x0Db
> │ └── Dsdt.asl
> ├── Armada80x0Db.inf
> ├── Armada80x0McBin
> │ └── Dsdt.asl
> ├── Armada80x0McBin.inf
> ├── Fadt.aslc
> ├── Gtdt.aslc
> ├── IcuInterrupts.h
> ├── Madt.aslc
> ├── Pptt.aslc
> └── Spcr.aslc
>
> This way we will have following in the .inf
>
> Armada80x0McBin/Dsdt.asl
> Fadt.aslc
> Gtdt.aslc
> Madt.aslc
> Pptt.aslc
> Spcr.aslc
>
Works for me. Leif?
_______________________________________________
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On Mon, 6 Aug 2018, 17:09 Ard Biesheuvel, <ard.biesheuvel@linaro.org> wrote:
> On 6 August 2018 at 18:08, Marcin Wojtas <mw@semihalf.com> wrote:
> > HI Ard,
> >
> > pon., 6 sie 2018 o 13:54 Ard Biesheuvel <ard.biesheuvel@linaro.org>
> napisał(a):
> >>
> >> On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
> >> > This patch introduces DSDT table and adds necessary
> >> > wiring in order to enable ACPI support on Armada 7040 DB.
> >> >
> >> > Contributed-under: TianoCore Contribution Agreement 1.1
> >> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> >> > ---
> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc |
> 14 ++
> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc |
> 3 +
> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf |
> 12 +
> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf |
> 61 ++++++
> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc |
> 5 +
> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl |
> 229 ++++++++++++++++++++
> >> > Silicon/Marvell/Documentation/PortingGuide.txt |
> 22 ++
> >> > 7 files changed, 346 insertions(+)
> >> > create mode 100644
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> >> > create mode 100644
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
> >> >
> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> >> > index f1ccda0..d4c67a2 100644
> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
> >> > @@ -593,6 +593,20 @@
> >> > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> >> > !endif #$(INCLUDE_TFTP_COMMAND)
> >> >
> >> > +[Components.AARCH64]
> >> > + #
> >> > + # Generic ACPI modules
> >> > + #
> >> > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> >> > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
> >> > + <LibraryClasses>
> >> > +
> PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
> >> > +
> >> > + <PcdsFixedAtBuild>
> >> > + # support ACPI v5.0 or later
> >> > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
> >> > + }
> >> > +
> >> >
> [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
> >> > GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
> >> >
> >> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> >> > index d3dffb0..f6faff1 100644
> >> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> >> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
> >> > @@ -51,6 +51,9 @@
> >> > [Components.common]
> >> > Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
> >> >
> >> > +[Components.AARCH64]
> >> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> >> > +
> >> >
> ################################################################################
> >> > #
> >> > # Pcd Section - list of all EDK II PCD Entries defined by this
> Platform
> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> >> > index 909ad3e..c064a43 100644
> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
> >> > @@ -215,6 +215,12 @@ FvNameGuid =
> 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
> >> > # DTB
> >> > INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
> >> >
> >> > +!if $(ARCH) == AARCH64
> >> > + # ACPI support
> >> > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
> >> > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> >> > +!endif
> >> > +
> >> > !include $(BOARD_DXE_FV_COMPONENTS)
> >> >
> >> > # PEI phase firmware volume
> >> > @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
> >> > FILE FREEFORM = $(NAMED_GUID) {
> >> > RAW BIN |.dtb
> >> > }
> >> > +
> >> > +[Rule.Common.USER_DEFINED.ACPITABLE]
> >> > + FILE FREEFORM = $(NAMED_GUID) {
> >> > + RAW ASL |.aml
> >> > + RAW ACPI |.acpi
> >> > + }
> >> > diff --git
> a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> >> > new file mode 100644
> >> > index 0000000..8732e10
> >> > --- /dev/null
> >> > +++
> b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
> >> > @@ -0,0 +1,61 @@
> >> > +## @file
> >> > +# Component description file for PlatformAcpiTables module.
> >> > +#
> >> > +# ACPI table data and ASL sources required to boot the platform.
> >> > +#
> >> > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
> >> > +# Copyright (C) 2018, Marvell International Ltd. and its
> affiliates.<BR>
> >> > +#
> >> > +# This program and the accompanying materials
> >> > +# are licensed and made available under the terms and conditions of
> the BSD License
> >> > +# which accompanies this distribution. The full text of the
> license may be found at
> >> > +# http://opensource.org/licenses/bsd-license.php
> >> > +#
> >> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> >> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS
> OR IMPLIED.
> >> > +#
> >> > +##
> >> > +
> >> > +[Defines]
> >> > + INF_VERSION = 0x0001001A
> >> > + BASE_NAME = PlatformAcpiTables
> >> > + FILE_GUID =
> 7E374E25-8E01-4FEE-87F2-390C23C606CD
> >> > + MODULE_TYPE = USER_DEFINED
> >> > + VERSION_STRING = 1.0
> >> > +
> >> > +[Sources]
> >> > + Dsdt.asl
> >> > + ../Fadt.aslc
> >> > + ../Gtdt.aslc
> >> > + ../Madt.aslc
> >> > + ../Pptt.aslc
> >> > + ../Spcr.aslc
> >> > +
> >>
> >> Could we reshuffle these files so we nog longer rely relative includes?
> >> Possibly using a Common subdirectory?
> >
> > Would below directory tree be acceptable?
> >
> > Silicon/Marvell/Armada7k8k/AcpiTables/
> > ├── AcpiHeader.h
> > ├── Armada70x0Db
> > │ └── Dsdt.asl
> > ├── Armada70x0Db.inf
> > ├── Armada80x0Db
> > │ └── Dsdt.asl
> > ├── Armada80x0Db.inf
> > ├── Armada80x0McBin
> > │ └── Dsdt.asl
> > ├── Armada80x0McBin.inf
> > ├── Fadt.aslc
> > ├── Gtdt.aslc
> > ├── IcuInterrupts.h
> > ├── Madt.aslc
> > ├── Pptt.aslc
> > └── Spcr.aslc
> >
> > This way we will have following in the .inf
> >
> > Armada80x0McBin/Dsdt.asl
> > Fadt.aslc
> > Gtdt.aslc
> > Madt.aslc
> > Pptt.aslc
> > Spcr.aslc
> >
>
> Works for me. Leif?
>
Sure.
/
Leif
>
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pon., 6 sie 2018 o 19:44 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
>
>
>
> On Mon, 6 Aug 2018, 17:09 Ard Biesheuvel, <ard.biesheuvel@linaro.org> wrote:
>>
>> On 6 August 2018 at 18:08, Marcin Wojtas <mw@semihalf.com> wrote:
>> > HI Ard,
>> >
>> > pon., 6 sie 2018 o 13:54 Ard Biesheuvel <ard.biesheuvel@linaro.org> napisał(a):
>> >>
>> >> On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
>> >> > This patch introduces DSDT table and adds necessary
>> >> > wiring in order to enable ACPI support on Armada 7040 DB.
>> >> >
>> >> > Contributed-under: TianoCore Contribution Agreement 1.1
>> >> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>> >> > ---
>> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
>> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
>> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
>> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
>> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
>> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
>> >> > Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
>> >> > 7 files changed, 346 insertions(+)
>> >> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> >> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
>> >> >
>> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> >> > index f1ccda0..d4c67a2 100644
>> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>> >> > @@ -593,6 +593,20 @@
>> >> > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> >> > !endif #$(INCLUDE_TFTP_COMMAND)
>> >> >
>> >> > +[Components.AARCH64]
>> >> > + #
>> >> > + # Generic ACPI modules
>> >> > + #
>> >> > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> >> > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
>> >> > + <LibraryClasses>
>> >> > + PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
>> >> > +
>> >> > + <PcdsFixedAtBuild>
>> >> > + # support ACPI v5.0 or later
>> >> > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
>> >> > + }
>> >> > +
>> >> > [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
>> >> > GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
>> >> >
>> >> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> >> > index d3dffb0..f6faff1 100644
>> >> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> >> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>> >> > @@ -51,6 +51,9 @@
>> >> > [Components.common]
>> >> > Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
>> >> >
>> >> > +[Components.AARCH64]
>> >> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> >> > +
>> >> > ################################################################################
>> >> > #
>> >> > # Pcd Section - list of all EDK II PCD Entries defined by this Platform
>> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> >> > index 909ad3e..c064a43 100644
>> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>> >> > @@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
>> >> > # DTB
>> >> > INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
>> >> >
>> >> > +!if $(ARCH) == AARCH64
>> >> > + # ACPI support
>> >> > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> >> > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>> >> > +!endif
>> >> > +
>> >> > !include $(BOARD_DXE_FV_COMPONENTS)
>> >> >
>> >> > # PEI phase firmware volume
>> >> > @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
>> >> > FILE FREEFORM = $(NAMED_GUID) {
>> >> > RAW BIN |.dtb
>> >> > }
>> >> > +
>> >> > +[Rule.Common.USER_DEFINED.ACPITABLE]
>> >> > + FILE FREEFORM = $(NAMED_GUID) {
>> >> > + RAW ASL |.aml
>> >> > + RAW ACPI |.acpi
>> >> > + }
>> >> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> >> > new file mode 100644
>> >> > index 0000000..8732e10
>> >> > --- /dev/null
>> >> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>> >> > @@ -0,0 +1,61 @@
>> >> > +## @file
>> >> > +# Component description file for PlatformAcpiTables module.
>> >> > +#
>> >> > +# ACPI table data and ASL sources required to boot the platform.
>> >> > +#
>> >> > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>> >> > +# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
>> >> > +#
>> >> > +# This program and the accompanying materials
>> >> > +# are licensed and made available under the terms and conditions of the BSD License
>> >> > +# which accompanies this distribution. The full text of the license may be found at
>> >> > +# http://opensource.org/licenses/bsd-license.php
>> >> > +#
>> >> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> >> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> >> > +#
>> >> > +##
>> >> > +
>> >> > +[Defines]
>> >> > + INF_VERSION = 0x0001001A
>> >> > + BASE_NAME = PlatformAcpiTables
>> >> > + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
>> >> > + MODULE_TYPE = USER_DEFINED
>> >> > + VERSION_STRING = 1.0
>> >> > +
>> >> > +[Sources]
>> >> > + Dsdt.asl
>> >> > + ../Fadt.aslc
>> >> > + ../Gtdt.aslc
>> >> > + ../Madt.aslc
>> >> > + ../Pptt.aslc
>> >> > + ../Spcr.aslc
>> >> > +
>> >>
>> >> Could we reshuffle these files so we nog longer rely relative includes?
>> >> Possibly using a Common subdirectory?
>> >
>> > Would below directory tree be acceptable?
>> >
>> > Silicon/Marvell/Armada7k8k/AcpiTables/
>> > ├── AcpiHeader.h
>> > ├── Armada70x0Db
>> > │ └── Dsdt.asl
>> > ├── Armada70x0Db.inf
>> > ├── Armada80x0Db
>> > │ └── Dsdt.asl
>> > ├── Armada80x0Db.inf
>> > ├── Armada80x0McBin
>> > │ └── Dsdt.asl
>> > ├── Armada80x0McBin.inf
>> > ├── Fadt.aslc
>> > ├── Gtdt.aslc
>> > ├── IcuInterrupts.h
>> > ├── Madt.aslc
>> > ├── Pptt.aslc
>> > └── Spcr.aslc
>> >
>> > This way we will have following in the .inf
>> >
>> > Armada80x0McBin/Dsdt.asl
>> > Fadt.aslc
>> > Gtdt.aslc
>> > Madt.aslc
>> > Pptt.aslc
>> > Spcr.aslc
>> >
>>
>> Works for me. Leif?
>
>
> Sure.
>
Ok, I will submit this change, once the remaining patches are reviewed.
Best regards,
Marcin
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On 6 August 2018 at 19:55, Marcin Wojtas <mw@semihalf.com> wrote:
> pon., 6 sie 2018 o 19:44 Leif Lindholm <leif.lindholm@linaro.org> napisał(a):
>>
>>
>>
>> On Mon, 6 Aug 2018, 17:09 Ard Biesheuvel, <ard.biesheuvel@linaro.org> wrote:
>>>
>>> On 6 August 2018 at 18:08, Marcin Wojtas <mw@semihalf.com> wrote:
>>> > HI Ard,
>>> >
>>> > pon., 6 sie 2018 o 13:54 Ard Biesheuvel <ard.biesheuvel@linaro.org> napisał(a):
>>> >>
>>> >> On 6 August 2018 at 01:28, Marcin Wojtas <mw@semihalf.com> wrote:
>>> >> > This patch introduces DSDT table and adds necessary
>>> >> > wiring in order to enable ACPI support on Armada 7040 DB.
>>> >> >
>>> >> > Contributed-under: TianoCore Contribution Agreement 1.1
>>> >> > Signed-off-by: Marcin Wojtas <mw@semihalf.com>
>>> >> > ---
>>> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 14 ++
>>> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc | 3 +
>>> >> > Silicon/Marvell/Armada7k8k/Armada7k8k.fdf | 12 +
>>> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf | 61 ++++++
>>> >> > Platform/Marvell/Armada70x0Db/Armada70x0Db.fdf.inc | 5 +
>>> >> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 229 ++++++++++++++++++++
>>> >> > Silicon/Marvell/Documentation/PortingGuide.txt | 22 ++
>>> >> > 7 files changed, 346 insertions(+)
>>> >> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>>> >> > create mode 100644 Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
>>> >> >
>>> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>>> >> > index f1ccda0..d4c67a2 100644
>>> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>>> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
>>> >> > @@ -593,6 +593,20 @@
>>> >> > ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>>> >> > !endif #$(INCLUDE_TFTP_COMMAND)
>>> >> >
>>> >> > +[Components.AARCH64]
>>> >> > + #
>>> >> > + # Generic ACPI modules
>>> >> > + #
>>> >> > + MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>> >> > + MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf {
>>> >> > + <LibraryClasses>
>>> >> > + PlatformHasAcpiLib|EmbeddedPkg/Library/PlatformHasAcpiLib/PlatformHasAcpiLib.inf
>>> >> > +
>>> >> > + <PcdsFixedAtBuild>
>>> >> > + # support ACPI v5.0 or later
>>> >> > + gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20
>>> >> > + }
>>> >> > +
>>> >> > [BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
>>> >> > GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
>>> >> >
>>> >> > diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>>> >> > index d3dffb0..f6faff1 100644
>>> >> > --- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>>> >> > +++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
>>> >> > @@ -51,6 +51,9 @@
>>> >> > [Components.common]
>>> >> > Silicon/Marvell/Armada7k8k/DeviceTree/Armada70x0Db.inf
>>> >> >
>>> >> > +[Components.AARCH64]
>>> >> > + Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>>> >> > +
>>> >> > ################################################################################
>>> >> > #
>>> >> > # Pcd Section - list of all EDK II PCD Entries defined by this Platform
>>> >> > diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>>> >> > index 909ad3e..c064a43 100644
>>> >> > --- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>>> >> > +++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
>>> >> > @@ -215,6 +215,12 @@ FvNameGuid = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
>>> >> > # DTB
>>> >> > INF EmbeddedPkg/Drivers/DtPlatformDxe/DtPlatformDxe.inf
>>> >> >
>>> >> > +!if $(ARCH) == AARCH64
>>> >> > + # ACPI support
>>> >> > + INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>> >> > + INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>>> >> > +!endif
>>> >> > +
>>> >> > !include $(BOARD_DXE_FV_COMPONENTS)
>>> >> >
>>> >> > # PEI phase firmware volume
>>> >> > @@ -408,3 +414,9 @@ READ_LOCK_STATUS = TRUE
>>> >> > FILE FREEFORM = $(NAMED_GUID) {
>>> >> > RAW BIN |.dtb
>>> >> > }
>>> >> > +
>>> >> > +[Rule.Common.USER_DEFINED.ACPITABLE]
>>> >> > + FILE FREEFORM = $(NAMED_GUID) {
>>> >> > + RAW ASL |.aml
>>> >> > + RAW ACPI |.acpi
>>> >> > + }
>>> >> > diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>>> >> > new file mode 100644
>>> >> > index 0000000..8732e10
>>> >> > --- /dev/null
>>> >> > +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/AcpiTables.inf
>>> >> > @@ -0,0 +1,61 @@
>>> >> > +## @file
>>> >> > +# Component description file for PlatformAcpiTables module.
>>> >> > +#
>>> >> > +# ACPI table data and ASL sources required to boot the platform.
>>> >> > +#
>>> >> > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
>>> >> > +# Copyright (C) 2018, Marvell International Ltd. and its affiliates.<BR>
>>> >> > +#
>>> >> > +# This program and the accompanying materials
>>> >> > +# are licensed and made available under the terms and conditions of the BSD License
>>> >> > +# which accompanies this distribution. The full text of the license may be found at
>>> >> > +# http://opensource.org/licenses/bsd-license.php
>>> >> > +#
>>> >> > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> >> > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> >> > +#
>>> >> > +##
>>> >> > +
>>> >> > +[Defines]
>>> >> > + INF_VERSION = 0x0001001A
>>> >> > + BASE_NAME = PlatformAcpiTables
>>> >> > + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD
>>> >> > + MODULE_TYPE = USER_DEFINED
>>> >> > + VERSION_STRING = 1.0
>>> >> > +
>>> >> > +[Sources]
>>> >> > + Dsdt.asl
>>> >> > + ../Fadt.aslc
>>> >> > + ../Gtdt.aslc
>>> >> > + ../Madt.aslc
>>> >> > + ../Pptt.aslc
>>> >> > + ../Spcr.aslc
>>> >> > +
>>> >>
>>> >> Could we reshuffle these files so we nog longer rely relative includes?
>>> >> Possibly using a Common subdirectory?
>>> >
>>> > Would below directory tree be acceptable?
>>> >
>>> > Silicon/Marvell/Armada7k8k/AcpiTables/
>>> > ├── AcpiHeader.h
>>> > ├── Armada70x0Db
>>> > │ └── Dsdt.asl
>>> > ├── Armada70x0Db.inf
>>> > ├── Armada80x0Db
>>> > │ └── Dsdt.asl
>>> > ├── Armada80x0Db.inf
>>> > ├── Armada80x0McBin
>>> > │ └── Dsdt.asl
>>> > ├── Armada80x0McBin.inf
>>> > ├── Fadt.aslc
>>> > ├── Gtdt.aslc
>>> > ├── IcuInterrupts.h
>>> > ├── Madt.aslc
>>> > ├── Pptt.aslc
>>> > └── Spcr.aslc
>>> >
>>> > This way we will have following in the .inf
>>> >
>>> > Armada80x0McBin/Dsdt.asl
>>> > Fadt.aslc
>>> > Gtdt.aslc
>>> > Madt.aslc
>>> > Pptt.aslc
>>> > Spcr.aslc
>>> >
>>>
>>> Works for me. Leif?
>>
>>
>> Sure.
>>
>
> Ok, I will submit this change, once the remaining patches are reviewed.
>
The other patches look fine to me.
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