Fix the LDO9_VSET register definition in PMIC.
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
---
Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
index 5fbf32267657..6e0587f7783a 100644
--- a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
+++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h
@@ -58,7 +58,7 @@
#define USB3OTG_PHY_CR_CAP_ADDR (1 << 0)
#define PMU_REG_BASE 0xFFF34000
-#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x068 << 2))
+#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x06b << 2))
#define LDO9_VSET_MASK (7 << 0)
#define PMIC_LDO16_ONOFF_ECO_REG (PMU_REG_BASE + (0x078 << 2))
--
2.7.4
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Hi Haojian, On Fri, Aug 10, 2018 at 04:49:33PM +0800, Haojian Zhuang wrote: > Fix the LDO9_VSET register definition in PMIC. Could you add some more detail to the commit message, please?: What register was accidentally read/written before? Does this change resolve a user-visible issue or just a hypothetical one? / Leif > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > index 5fbf32267657..6e0587f7783a 100644 > --- a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > @@ -58,7 +58,7 @@ > #define USB3OTG_PHY_CR_CAP_ADDR (1 << 0) > > #define PMU_REG_BASE 0xFFF34000 > -#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x068 << 2)) > +#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x06b << 2)) > #define LDO9_VSET_MASK (7 << 0) > > #define PMIC_LDO16_ONOFF_ECO_REG (PMU_REG_BASE + (0x078 << 2)) > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
Fixed. Best Regards Haojian ________________________________ From: Leif Lindholm <leif.lindholm@linaro.org> Sent: Wednesday, August 15, 2018 9:29:27 PM To: Haojian Zhuang Cc: edk2-devel@lists.01.org; Ard Biesheuvel Subject: Re: [edk2][PATCH v1 edk-platforms 1/3] Silicon/Hi3660: fix LDO9_VSET register definition Hi Haojian, On Fri, Aug 10, 2018 at 04:49:33PM +0800, Haojian Zhuang wrote: > Fix the LDO9_VSET register definition in PMIC. Could you add some more detail to the commit message, please?: What register was accidentally read/written before? Does this change resolve a user-visible issue or just a hypothetical one? / Leif > Cc: Leif Lindholm <leif.lindholm@linaro.org> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> > --- > Silicon/Hisilicon/Hi3660/Include/Hi3660.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > index 5fbf32267657..6e0587f7783a 100644 > --- a/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > +++ b/Silicon/Hisilicon/Hi3660/Include/Hi3660.h > @@ -58,7 +58,7 @@ > #define USB3OTG_PHY_CR_CAP_ADDR (1 << 0) > > #define PMU_REG_BASE 0xFFF34000 > -#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x068 << 2)) > +#define PMIC_LDO9_VSET_REG (PMU_REG_BASE + (0x06b << 2)) > #define LDO9_VSET_MASK (7 << 0) > > #define PMIC_LDO16_ONOFF_ECO_REG (PMU_REG_BASE + (0x078 << 2)) > -- > 2.7.4 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
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