From nobody Sat Dec 28 12:26:57 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zoho.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1493980985555806.6842133259645; Fri, 5 May 2017 03:43:05 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 2ED4321A134AE; Fri, 5 May 2017 03:43:02 -0700 (PDT) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 08B3721A18AAB for ; Fri, 5 May 2017 03:43:01 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 May 2017 03:43:00 -0700 Received: from zwei4-mobl.ccr.corp.intel.com ([10.239.197.110]) by FMSMGA003.fm.intel.com with ESMTP; 05 May 2017 03:42:59 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,292,1491289200"; d="scan'208";a="853236492" From: zwei4 To: edk2-devel@lists.01.org Date: Fri, 5 May 2017 18:42:55 +0800 Message-Id: <20170505104255.14500-1-david.wei@intel.com> X-Mailer: git-send-email 2.11.0.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3] Use GP_CAMERASB10 as Board_ID3. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Shifei Lu MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 CC: Mang Guo CC: Shifei Lu --- .../Board/LeafHill/BoardInitPreMem/PlatformId.c | 24 ++++++++++++++----= ---- .../MinnowBoard3/BoardInitPreMem/PlatformId.c | 24 ++++++++++++++----= ---- 2 files changed, 30 insertions(+), 18 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Pla= tformId.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Plat= formId.c index d550fd400..40554b95e 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .c @@ -64,24 +64,30 @@ GetEmbeddedBoardIdFabId( padConfg0.r.PMode =3D 0; padConfg0.r.GPIORxTxDis =3D 0x1; GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF0_OFFSET, padConfg0.padCn= f0); + // - // Board_ID3: PMIC_PWRGOOD + // Board_ID3: GP_CAMERASB10 // - CommAndOffset =3D GetCommOffset (NORTHWEST, 0x00C0); + =20 + CommAndOffset =3D GetCommOffset (NORTH, 0x01E0); padConfg0.padCnf0 =3D GpioPadRead (CommAndOffset + BXT_GPIO_PAD_CONF0_OF= FSET); - padConfg0.r.PMode =3D 0; - padConfg0.r.GPIORxTxDis =3D 0x1; + padConfg1.padCnf1 =3D GpioPadRead (CommAndOffset + BXT_GPIO_PAD_CONF1_OF= FSET); + + padConfg0.r.PMode =3D M0; // Set to GPIO mode + padConfg0.r.GPIORxTxDis =3D GPI; // Set to GPI GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF0_OFFSET, padConfg0.padCn= f0); + + padConfg1.r.IOSTerm =3D EnPu; // Enable pull-up + padConfg1.r.Term =3D P_20K_H; // Set to 20K pull-up =20 + GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF1_OFFSET, padConfg1.padCn= f1); + // - // Set to Pull Up 20K + // Read out Board_ID=20 // - padConfg1.r.Term =3D 0xC; - GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF1_OFFSET, padConfg1.padCn= f1); - =20 *BoardId =3D (UINT8) (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00F0) += BXT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00D0) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 1) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C8) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ - (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C0) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); + (((GpioPadRead (GetCommOffset (NORTH, 0x01E0) + BXT_G= PIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 DEBUG ((DEBUG_INFO, "BoardId from PMIC strap: %02X\n", *BoardId)); =20 diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /PlatformId.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPre= Mem/PlatformId.c index d550fd400..bacdab1f2 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.c @@ -64,24 +64,30 @@ GetEmbeddedBoardIdFabId( padConfg0.r.PMode =3D 0; padConfg0.r.GPIORxTxDis =3D 0x1; GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF0_OFFSET, padConfg0.padCn= f0); + // - // Board_ID3: PMIC_PWRGOOD + // Board_ID3: GP_CAMERASB10 // - CommAndOffset =3D GetCommOffset (NORTHWEST, 0x00C0); + + CommAndOffset =3D GetCommOffset (NORTH, 0x01E0); padConfg0.padCnf0 =3D GpioPadRead (CommAndOffset + BXT_GPIO_PAD_CONF0_OF= FSET); - padConfg0.r.PMode =3D 0; - padConfg0.r.GPIORxTxDis =3D 0x1; + padConfg1.padCnf1 =3D GpioPadRead (CommAndOffset + BXT_GPIO_PAD_CONF1_OF= FSET); + + padConfg0.r.PMode =3D M0; // Set to GPIO mode + padConfg0.r.GPIORxTxDis =3D GPI; // Set to GPI GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF0_OFFSET, padConfg0.padCn= f0); + + padConfg1.r.IOSTerm =3D EnPu; // Enable pull-up + padConfg1.r.Term =3D P_20K_H; // Set to 20K pull-up =20 + GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF1_OFFSET, padConfg1.padCn= f1); + // - // Set to Pull Up 20K + // Read out Board_ID=20 // - padConfg1.r.Term =3D 0xC; - GpioPadWrite (CommAndOffset + BXT_GPIO_PAD_CONF1_OFFSET, padConfg1.padCn= f1); - =20 *BoardId =3D (UINT8) (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00F0) += BXT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00D0) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 1) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C8) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ - (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C0) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); + (((GpioPadRead (GetCommOffset (NORTH, 0x01E0) + BXT_G= PIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 DEBUG ((DEBUG_INFO, "BoardId from PMIC strap: %02X\n", *BoardId)); =20 --=20 2.11.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel