From nobody Fri Dec 27 04:16:41 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1499956962259459.1207738052392; Thu, 13 Jul 2017 07:42:42 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C624921A00AFA; Thu, 13 Jul 2017 07:40:49 -0700 (PDT) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CCDAD2095D8E1 for ; Thu, 13 Jul 2017 07:40:48 -0700 (PDT) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jul 2017 07:42:35 -0700 Received: from zwei4-mobl.ccr.corp.intel.com ([10.255.29.228]) by fmsmga006.fm.intel.com with ESMTP; 13 Jul 2017 07:42:26 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,354,1496127600"; d="scan'208";a="126911279" From: zwei4 To: edk2-devel@lists.01.org Date: Thu, 13 Jul 2017 22:42:22 +0800 Message-Id: <20170713144222.15908-1-david.wei@intel.com> X-Mailer: git-send-email 2.11.0.windows.1 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Multi board support. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Cleanup libraries for multi boards. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 --- .../BensonGlacier/BoardInitDxe/BoardInitDxe.h | 4 +- .../BensonGlacier/BoardInitPostMem/BoardGpios.c | 72 +++++++++---------- .../BensonGlacier/BoardInitPostMem/BoardGpios.h | 22 +++--- .../BensonGlacier/BoardInitPostMem/BoardInit.c | 2 +- .../BensonGlacier/BoardInitPostMem/BoardInit.h | 6 +- .../BoardInitPostMem/BoardInitMiscs.c | 24 +++---- .../BoardInitPostMem/BoardInitMiscs.h | 18 ++--- .../BoardInitPostMem/PlatformInfoHob.c | 4 +- .../BensonGlacier/BoardInitPreMem/BoardInit.c | 6 +- .../BensonGlacier/BoardInitPreMem/BoardInit.h | 6 +- .../BensonGlacier/BoardInitPreMem/BoardInitMiscs.h | 6 +- .../BensonGlacier/BoardInitPreMem/PlatformId.c | 8 +-- .../BensonGlacier/BoardInitPreMem/PlatformId.h | 18 ++--- .../Board/LeafHill/BoardInitDxe/BoardInitDxe.h | 4 +- .../Board/LeafHill/BoardInitPostMem/BoardGpios.c | 80 +++++++++++-------= ---- .../Board/LeafHill/BoardInitPostMem/BoardGpios.h | 32 ++++----- .../Board/LeafHill/BoardInitPostMem/BoardInit.c | 2 +- .../Board/LeafHill/BoardInitPostMem/BoardInit.h | 6 +- .../LeafHill/BoardInitPostMem/BoardInitMiscs.c | 22 +++--- .../LeafHill/BoardInitPostMem/BoardInitMiscs.h | 16 ++--- .../LeafHill/BoardInitPostMem/PlatformInfoHob.c | 2 +- .../Board/LeafHill/BoardInitPreMem/BoardInit.c | 6 +- .../Board/LeafHill/BoardInitPreMem/BoardInit.h | 6 +- .../LeafHill/BoardInitPreMem/BoardInitMiscs.h | 4 +- .../Board/LeafHill/BoardInitPreMem/PlatformId.c | 4 +- .../Board/LeafHill/BoardInitPreMem/PlatformId.h | 18 ++--- .../Board/MinnowBoard3/BoardInitDxe/BoardInitDxe.h | 4 +- .../MinnowBoard3/BoardInitPostMem/BoardGpios.c | 70 +++++++++---------- .../MinnowBoard3/BoardInitPostMem/BoardGpios.h | 22 +++--- .../MinnowBoard3/BoardInitPostMem/BoardInit.c | 2 +- .../MinnowBoard3/BoardInitPostMem/BoardInit.h | 6 +- .../MinnowBoard3/BoardInitPostMem/BoardInitMiscs.c | 22 +++--- .../MinnowBoard3/BoardInitPostMem/BoardInitMiscs.h | 18 ++--- .../BoardInitPostMem/PlatformInfoHob.c | 4 +- .../Board/MinnowBoard3/BoardInitPreMem/BoardInit.c | 8 +-- .../Board/MinnowBoard3/BoardInitPreMem/BoardInit.h | 6 +- .../MinnowBoard3/BoardInitPreMem/BoardInitMiscs.h | 6 +- .../MinnowBoard3/BoardInitPreMem/PlatformId.c | 8 +-- .../MinnowBoard3/BoardInitPreMem/PlatformId.h | 20 +++--- 39 files changed, 297 insertions(+), 297 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitDxe/B= oardInitDxe.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitDx= e/BoardInitDxe.h index e8f2aa3f0..e7ba1d255 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitDxe/BoardIni= tDxe.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitDxe/BoardIni= tDxe.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef __BOARD_INIT_DXE_H__ -#define __BOARD_INIT_DXE_H__ +#ifndef __BENSON_BOARD_INIT_DXE_H__ +#define __BENSON_BOARD_INIT_DXE_H__ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardGpios.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInit= PostMem/BoardGpios.c index eef62d9fa..df11c8bbd 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dGpios.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dGpios.c @@ -13,7 +13,7 @@ =20 **/ =20 -#include +#include "BoardGpios.h" #include #include =20 @@ -30,12 +30,12 @@ =20 **/ EFI_STATUS -MultiPlatformGpioTableInit ( +BensonMultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "MultiPlatformGpioTableInit()...\n")); + DEBUG ((DEBUG_INFO, "BensonMultiPlatformGpioTableInit()...\n")); DEBUG ((DEBUG_INFO, "PlatformInfoHob->BoardId: 0x%02X\n", PlatformInfoHo= b->BoardId)); =20 // @@ -45,16 +45,16 @@ MultiPlatformGpioTableInit ( case BOARD_ID_LFH_CRB: case BOARD_ID_MINNOW: case BOARD_ID_BENSON: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mBenson_GpioInitData_SW= [0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mBenson_GpioInitData_W[0= ]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mBenson_GpioInitData_NW= [0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mBenson_GpioInitData_N[0= ]; break; default: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mBenson_GpioInitData_SW= [0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mBenson_GpioInitData_W[0= ]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mBenson_GpioInitData_NW= [0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mBenson_GpioInitData_N[0= ]; break; } =20 @@ -67,7 +67,7 @@ MultiPlatformGpioTableInit ( =20 **/ VOID -SetGpioPadCfgLock ( +BensonSetGpioPadCfgLock ( VOID ) { @@ -146,7 +146,7 @@ SetGpioPadCfgLock ( =20 **/ EFI_STATUS -MultiPlatformGpioProgram ( +BensonMultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -175,7 +175,7 @@ MultiPlatformGpioProgram ( &SystemConfiguration ); =20 - DEBUG ((DEBUG_INFO, "MultiPlatformGpioProgram()...\n")); + DEBUG ((DEBUG_INFO, "BensonMultiPlatformGpioProgram()...\n")); =20 switch (PlatformInfoHob->BoardId) { case BOARD_ID_LFH_CRB: @@ -185,24 +185,24 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "PAD programming, Board ID: 0x%X\n", PlatformInf= oHob->BoardId)); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_Gpio= InitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_Gpi= oInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_Gpio= InitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_Gpi= oInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_N) / sizeof (mBenso= n_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_NW) / sizeof (mBens= on_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_W) / sizeof (mBenso= n_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_SW) / sizeof (mBens= on_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 if (SystemConfiguration.ScIshEnabled =3D=3D 0) { DEBUG ((DEBUG_INFO, "Switch ISH_I2C0 & ISH_I2C1 to LPSS_I2C5 and L= PSS I2C6. \n" )); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_LPSS_I2C) / sizeof (= mBXT_GpioInitData_LPSS_I2C[0]), mBXT_GpioInitData_LPSS_I2C); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_LPSS_I2C) / sizeo= f (mBenson_GpioInitData_LPSS_I2C[0]), mBenson_GpioInitData_LPSS_I2C); } break; default: // // PAD programming // - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_N) / sizeof (mBenson_= GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_NW) / sizeof (mBenson= _GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_W) / sizeof (mBenson_= GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_SW) / sizeof (mBenson= _GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 // // Note1: This BXT BIOS WA needs to be applied after PAD programming t= o overwrite the GPIO setting to take effect. @@ -211,7 +211,7 @@ MultiPlatformGpioProgram ( // if (PlatformInfoHob->FABID =3D=3D FAB2) { DEBUG ((DEBUG_INFO, "FAB ID: FAB2\n")); - GpioPadConfigTable(sizeof(mBXT_GpioInitData_FAB2)/sizeof(mBXT_GpioIn= itData_FAB2[0]), mBXT_GpioInitData_FAB2); + GpioPadConfigTable(sizeof(mBenson_GpioInitData_FAB2)/sizeof(mBenson_= GpioInitData_FAB2[0]), mBenson_GpioInitData_FAB2); } =20 if (SystemConfiguration.TDO =3D=3D 2) { //Auto @@ -224,20 +224,20 @@ MultiPlatformGpioProgram ( =20 if (SystemConfiguration.ScHdAudioIoBufferOwnership =3D=3D 3) { DEBUG ((DEBUG_INFO, "HD Audio IO Buffer Ownership is I2S. Change GPI= O pin settings for it. \n" )); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_Audio_SSP6) / sizeof (= mBXT_GpioInitData_Audio_SSP6[0]), mBXT_GpioInitData_Audio_SSP6); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_Audio_SSP6) / sizeo= f (mBenson_GpioInitData_Audio_SSP6[0]), mBenson_GpioInitData_Audio_SSP6); } =20 if (SystemConfiguration.PcieRootPortEn[4] =3D=3D FALSE) { DEBUG ((DEBUG_INFO, "Onboard LAN disable. \n" )); - GpioPadConfigTable (sizeof (LomDisableGpio) / sizeof (LomDisableGpio= [0]), LomDisableGpio); + GpioPadConfigTable (sizeof (BensonLomDisableGpio) / sizeof (BensonLo= mDisableGpio[0]), BensonLomDisableGpio); } =20 if (SystemConfiguration.EPIEnable =3D=3D 1) { DEBUG ((DEBUG_INFO, "Overriding GPIO 191 for EPI\n")); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_EPI_Override) / sizeof= (mBXT_GpioInitData_EPI_Override[0]), mBXT_GpioInitData_EPI_Override); + GpioPadConfigTable (sizeof (mBenson_GpioInitData_EPI_Override) / siz= eof (mBenson_GpioInitData_EPI_Override[0]), mBenson_GpioInitData_EPI_Overri= de); } if (SystemConfiguration.GpioLock =3D=3D TRUE) { - SetGpioPadCfgLock (); + BensonSetGpioPadCfgLock (); } DEBUG ((DEBUG_INFO, "No board ID available for this board ....\n")); break; @@ -259,19 +259,19 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "Dump Community pad registers, Board ID: 0x%X\n"= , PlatformInfoHob->BoardId)); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_N) / sizeof (mBenson_= GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_NW) / sizeof (mBenson= _GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_W) / sizeof (mBenson_= GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_SW) / sizeof (mBenson= _GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); break; default: // // Dump Community pad registers // - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioInit= Data_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioIni= tData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioInit= Data_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioIni= tData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_N) / sizeof (mBenson_Gp= ioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_NW) / sizeof (mBenson_G= pioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_W) / sizeof (mBenson_Gp= ioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mBenson_GpioInitData_SW) / sizeof (mBenson_G= pioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 break; } diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInit= PostMem/BoardGpios.h index 92387e457..e0bdde873 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dGpios.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dGpios.h @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef _BOARDGPIOS_H_ -#define _BOARDGPIOS_H_ +#ifndef _BENSON_BOARDGPIOS_H_ +#define _BENSON_BOARDGPIOS_H_ =20 #include #include"ChipsetAccess.h" @@ -58,7 +58,7 @@ Wake_Enabled: // // North Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_N[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -145,7 +145,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D // // North West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_NW [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -237,7 +237,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D // // West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_W [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,= GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -290,7 +290,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D // // South West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_SW[]=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, = IOSTerm, MMIO_Offset , Community @@ -331,7 +331,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D BXT_GPIO_PAD_CONF(L"LPC_AD1", M0, GPO , GPIO_D = , LO , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Maske= d, SAME, GPIO_PADBAR+ 0x0130 , SOUTHWEST), }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_Audio_SSP6 []=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, I= OSTerm,MMIO_Offset, Community @@ -345,7 +345,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D BXT_GPIO_PAD_CONF(L"GPIO_192 DBI_SCL", M0 , HI_Z ,GPIO_D, = HI , NA , Wake_Disabled, P_2K_H, NA , NA,NA , = NA , GPIO_PADBAR+0x0028, NORTHWEST),//Feature: Codec Power Down PD Net = in Sch: SOC_CODEC_PD_N }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_FAB2[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -358,7 +358,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D // // GPIO 191 is only used if EPI reworks are applied on the board. This GPI= O switches between SD Card data (if set to 1) and EPI data (if set to 0). // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_EPI_Override[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -366,7 +366,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D BXT_GPIO_PAD_CONF(L"GPIO_191 DBI_SDA", M0, GPO, GPIO_D,L= O, NA, Wake_Disabled,P_20K_L, NA, NA, NA, = NA, GPIO_PADBAR + 0x0020, NORTHWEST),//Feature: SD_I2C MUX SEL = Net in Sch: INA_MUX_SEL }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D +BXT_GPIO_PAD_INIT mBenson_GpioInitData_LPSS_I2C[] =3D { BXT_GPIO_PAD_CONF(L"GPIO_134 LPSS_I2C5_SDA", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0050, WEST), BXT_GPIO_PAD_CONF(L"GPIO_135 LPSS_I2C5_SCL", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0058, WEST), @@ -375,7 +375,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D }; =20 =20 -BXT_GPIO_PAD_INIT LomDisableGpio[] =3D +BXT_GPIO_PAD_INIT BensonLomDisableGpio[] =3D { // // LAN diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.c index e33ce5aef..7c44a631a 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c @@ -81,7 +81,7 @@ BensonGlacierPostMemInitCallback ( // // Set init function PCD // - PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) MultiPlatformInfoIni= t); + PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) BensonMultiPlatformI= nfoInit); =20 // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.h index fa3919e3c..0a549c2dd 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _BENSON_BOARDINIT_H_ +#define _BENSON_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID BensonGpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/Board= InitPostMem/BoardInitMiscs.c index 0d40777b6..e10ab846c 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.c @@ -1,7 +1,7 @@ /** @file This file does Multiplatform initialization. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -25,11 +25,11 @@ =20 **/ VOID -GpioGroupTierInit ( +BensonGpioGroupTierInit ( IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "GpioGroupTierInit Start\n")); + DEBUG ((DEBUG_INFO, "BensonGpioGroupTierInit Start\n")); switch (PlatformInfoHob->BoardId) { default: GpioSetGroupToGpeDwX (GPIO_BXTP_GROUP_7, // map group 7 to GPE 0 ~ = 31 @@ -38,13 +38,13 @@ GpioGroupTierInit ( break; } =20 - DEBUG ((DEBUG_INFO, "GpioGroupTierInit End\n")); + DEBUG ((DEBUG_INFO, "BensonGpioGroupTierInit End\n")); } =20 =20 EFI_STATUS EFIAPI -MultiPlatformInfoInit ( +BensonMultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -110,30 +110,30 @@ MultiPlatformInfoInit ( // // Get GPIO table // - Status =3D MultiPlatformGpioTableInit (PeiServices, PlatformInfoHob); + Status =3D BensonMultiPlatformGpioTableInit (PeiServices, PlatformInfoHo= b); ASSERT_EFI_ERROR (Status); =20 // // Program GPIO // - Status =3D MultiPlatformGpioProgram (PeiServices, PlatformInfoHob); + Status =3D BensonMultiPlatformGpioProgram (PeiServices, PlatformInfoHob); =20 if (GetBxtSeries () =3D=3D BxtP) { - GpioGroupTierInit (PlatformInfoHob); + BensonGpioGroupTierInit (PlatformInfoHob); } =20 // // Update OemId // - Status =3D InitializeBoardOemId (PeiServices, PlatformInfoHob); - Status =3D InitializeBoardSsidSvid (PeiServices, PlatformInfoHob); + Status =3D BensonInitializeBoardOemId (PeiServices, PlatformInfoHob); + Status =3D BensonInitializeBoardSsidSvid (PeiServices, PlatformInfoHob); =20 return EFI_SUCCESS; } =20 =20 EFI_STATUS -InitializeBoardOemId ( +BensonInitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -158,7 +158,7 @@ InitializeBoardOemId ( } =20 EFI_STATUS -InitializeBoardSsidSvid ( +BensonInitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/Board= InitPostMem/BoardInitMiscs.h index 8ae5f7c3d..b9844efd4 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.h @@ -2,7 +2,7 @@ Multiplatform initialization header file. This file includes package header files, library classes. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _BENSON_MULTIPLATFORM_LIB_H_ +#define _BENSON_MULTIPLATFORM_LIB_H_ =20 #define LEN_64M 0x4000000 // @@ -88,37 +88,37 @@ #define SUBSYSTEM_SVID_SSID (SUBSYSTEM_VENDOR_ID + (SUBSYSTEM_DEVICE_ID = << 16)) =20 EFI_STATUS -GetPlatformInfoHob ( +BensonGetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioTableInit ( +BensonMultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioProgram ( +BensonMultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformInfoInit ( +BensonMultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardOemId ( +BensonInitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardSsidSvid ( +BensonInitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/PlatformInfoHob.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/Boar= dInitPostMem/PlatformInfoHob.c index 8dac0ba28..30700e007 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Plat= formInfoHob.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Plat= formInfoHob.c @@ -1,7 +1,7 @@ /** @file This file does Multiplatform initialization. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -26,7 +26,7 @@ =20 **/ EFI_STATUS -GetPlatformInfoHob ( +BensonGetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPr= eMem/BoardInit.c index cac4eb6e0..122ed9a89 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= Init.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= Init.c @@ -31,14 +31,14 @@ BensonGlacierPreMemInit ( IN PEI_BOARD_PRE_MEM_INIT_PPI *This ); =20 -static PEI_BOARD_PRE_MEM_INIT_PPI mPreMemInitPpiInstance =3D { +static PEI_BOARD_PRE_MEM_INIT_PPI mBensonPreMemInitPpiInstance =3D { BensonGlacierPreMemInit }; =20 static EFI_PEI_PPI_DESCRIPTOR mBensonGlacierPreMemInitPpi =3D { (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), &gBoardPreMemInitPpiGuid, - &mPreMemInitPpiInstance + &mBensonPreMemInitPpiInstance }; =20 static EFI_PEI_PPI_DESCRIPTOR mBensonGlacierPreMemInitDonePpi =3D { @@ -77,7 +77,7 @@ BensonGlacierPreMemInit ( // // Pre Mem Board Init // - Status =3D GetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabId); + Status =3D BensonGetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabId); =20 if (BoardId !=3D (UINT8) BOARD_ID_BENSON) { DEBUG ((EFI_D_INFO, "Not a Benson Glacier - skip\n")); diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPr= eMem/BoardInit.h index fa3919e3c..0a549c2dd 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= Init.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= Init.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _BENSON_BOARDINIT_H_ +#define _BENSON_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID BensonGpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/BoardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardI= nitPreMem/BoardInitMiscs.h index 4223f115c..ab6194988 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= InitMiscs.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Board= InitMiscs.h @@ -2,7 +2,7 @@ Multiplatform initialization header file. This file includes package header files, library classes. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _BENSON_MULTIPLATFORM_LIB_H_ +#define _BENSON_MULTIPLATFORM_LIB_H_ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/PlatformId.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= reMem/PlatformId.c index bacdab1f2..e164cfda7 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Platf= ormId.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Platf= ormId.c @@ -22,7 +22,7 @@ =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId( +BensonGetEmbeddedBoardIdFabId( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -89,7 +89,7 @@ GetEmbeddedBoardIdFabId( (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C8) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ (((GpioPadRead (GetCommOffset (NORTH, 0x01E0) + BXT_G= PIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 - DEBUG ((DEBUG_INFO, "BoardId from PMIC strap: %02X\n", *BoardId)); + DEBUG ((DEBUG_INFO, "BoardId: %02X\n", *BoardId)); =20 // // Fab_ID0: PMIC_I2C_SDA @@ -147,7 +147,7 @@ GetEmbeddedBoardIdFabId( (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00D8) + BXT= _GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00E0) + BXT= _GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 - DEBUG ((EFI_D_INFO, "FabId from PMIC strap: %02X\n", *FabId)); + DEBUG ((EFI_D_INFO, "FabId: %02X\n", *FabId)); =20 =20 return EFI_SUCCESS; @@ -156,7 +156,7 @@ GetEmbeddedBoardIdFabId( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +BensonGetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMe= m/PlatformId.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= reMem/PlatformId.h index 3999aaa72..7fc0cc3f9 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Platf= ormId.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/Platf= ormId.h @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef __PLATFORM_ID_H__ -#define __PLATFORM_ID_H__ +#ifndef __BENSON_PLATFORM_ID_H__ +#define __BENSON_PLATFORM_ID_H__ =20 // // Strap Fw Cfg ID define @@ -27,14 +27,14 @@ =20 EFI_STATUS EFIAPI -GetFwCfgId ( +BensonGetFwCfgId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *FwCfgId ); =20 EFI_STATUS EFIAPI -GetBoardIdFabId ( +BensonGetBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -42,7 +42,7 @@ GetBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId ( +BensonGetEmbeddedBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -50,7 +50,7 @@ GetEmbeddedBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +BensonGetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -58,21 +58,21 @@ GetIVIBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetDockId ( +BensonGetDockId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *DockId ); =20 EFI_STATUS EFIAPI -GetOsSelPss ( +BensonGetOsSelPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *OsSelPss ); =20 EFI_STATUS EFIAPI -GetBomIdPss ( +BensonGetBomIdPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BomIdPss ); diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitDxe/BoardI= nitDxe.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitDxe/BoardIni= tDxe.h index 275f7557b..119882e23 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitDxe/BoardInitDxe.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitDxe/BoardInitDxe.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef __BOARD_INIT_DXE_H__ -#define __BOARD_INIT_DXE_H__ +#ifndef __LEAFHILL_BOARD_INIT_DXE_H__ +#define __LEAFHILL_BOARD_INIT_DXE_H__ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardGpios.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardGpios.c index 7523c0089..ad255ae98 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpio= s.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpio= s.c @@ -13,7 +13,7 @@ =20 **/ =20 -#include +#include "BoardGpios.h" #include #include =20 @@ -29,12 +29,12 @@ =20 **/ EFI_STATUS -MultiPlatformGpioTableInit ( +LeafHillMultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "MultiPlatformGpioTableInit()...\n")); + DEBUG ((DEBUG_INFO, "LeafHillMultiPlatformGpioTableInit()...\n")); DEBUG ((DEBUG_INFO, "PlatformInfoHob->BoardId: 0x%02X\n", PlatformInfoHo= b->BoardId)); =20 // @@ -43,17 +43,17 @@ MultiPlatformGpioTableInit ( switch (PlatformInfoHob->BoardId) { case BOARD_ID_LFH_CRB: case BOARD_ID_MINNOW: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mLeafHill_GpioInitData_= SW[0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mLeafHill_GpioInitData_W= [0]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mLeafHill_GpioInitData_= NW[0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mLeafHill_GpioInitData_N= [0]; break; =20 default: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mLeafHill_GpioInitData_= SW[0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mLeafHill_GpioInitData_W= [0]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mLeafHill_GpioInitData_= NW[0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mLeafHill_GpioInitData_N= [0]; break; } =20 @@ -66,7 +66,7 @@ MultiPlatformGpioTableInit ( =20 **/ VOID -SetGpioPadCfgLock ( +LeafHillSetGpioPadCfgLock ( VOID ) { @@ -145,7 +145,7 @@ SetGpioPadCfgLock ( =20 **/ EFI_STATUS -MultiPlatformGpioProgram ( +LeafHillMultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -174,7 +174,7 @@ MultiPlatformGpioProgram ( &SystemConfiguration ); =20 - DEBUG ((DEBUG_INFO, "MultiPlatformGpioProgram()...\n")); + DEBUG ((DEBUG_INFO, "LeafHillMultiPlatformGpioProgram()...\n")); =20 switch (PlatformInfoHob->BoardId) { case BOARD_ID_LFH_CRB: @@ -184,18 +184,18 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "PAD programming, Board ID: 0x%X\n", PlatformInf= oHob->BoardId)); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_Gpio= InitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_Gpi= oInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_Gpio= InitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_Gpi= oInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N_LH) / sizeof (mBXT_G= pioInitData_N_LH[0]), mBXT_GpioInitData_N_LH); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW_LH) / sizeof (mBXT_= GpioInitData_SW_LH[0]), mBXT_GpioInitData_SW_LH); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W_LH) / sizeof (mBXT_G= pioInitData_W_LH[0]), mBXT_GpioInitData_W_LH); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW_LH) / sizeof (mBXT_= GpioInitData_NW_LH[0]), mBXT_GpioInitData_NW_LH); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_N) / sizeof (mLea= fHill_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_NW) / sizeof (mLe= afHill_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_W) / sizeof (mLea= fHill_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_SW) / sizeof (mLe= afHill_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_N_LH) / sizeof (m= LeafHill_GpioInitData_N_LH[0]), mLeafHill_GpioInitData_N_LH); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_SW_LH) / sizeof (= mLeafHill_GpioInitData_SW_LH[0]), mLeafHill_GpioInitData_SW_LH); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_W_LH) / sizeof (m= LeafHill_GpioInitData_W_LH[0]), mLeafHill_GpioInitData_W_LH); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_NW_LH) / sizeof (= mLeafHill_GpioInitData_NW_LH[0]), mLeafHill_GpioInitData_NW_LH); =20 if (SystemConfiguration.ScIshEnabled =3D=3D 0) { DEBUG ((DEBUG_INFO, "Switch ISH_I2C0 & ISH_I2C1 to LPSS_I2C5 and L= PSS I2C6. \n" )); - GpioPadConfigTable(sizeof(mBXT_GpioInitData_LPSS_I2C)/sizeof(mBXT_= GpioInitData_LPSS_I2C[0]), mBXT_GpioInitData_LPSS_I2C); + GpioPadConfigTable(sizeof(mLeafHill_GpioInitData_LPSS_I2C)/sizeof(= mLeafHill_GpioInitData_LPSS_I2C[0]), mLeafHill_GpioInitData_LPSS_I2C); } break; default: @@ -203,10 +203,10 @@ MultiPlatformGpioProgram ( // // PAD programming // - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_N) / sizeof (mLeafH= ill_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_NW) / sizeof (mLeaf= Hill_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_W) / sizeof (mLeafH= ill_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_SW) / sizeof (mLeaf= Hill_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 // // Note1: This BXT BIOS WA needs to be applied after PAD programming t= o overwrite the GPIO setting to take effect. @@ -215,7 +215,7 @@ MultiPlatformGpioProgram ( // if (PlatformInfoHob->FABID =3D=3D FAB2) { DEBUG ((DEBUG_INFO, "FAB ID: FAB2\n")); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_FAB2 )/ sizeof (mBXT_G= pioInitData_FAB2[0]), mBXT_GpioInitData_FAB2); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_FAB2 )/ sizeof (m= LeafHill_GpioInitData_FAB2[0]), mLeafHill_GpioInitData_FAB2); } =20 if (SystemConfiguration.TDO =3D=3D 2) { //Auto @@ -228,20 +228,20 @@ MultiPlatformGpioProgram ( =20 if (SystemConfiguration.ScHdAudioIoBufferOwnership =3D=3D 3) { DEBUG ((DEBUG_INFO, "HD Audio IO Buffer Ownership is I2S. Change GPI= O pin settings for it. \n" )); - GpioPadConfigTable ( sizeof (mBXT_GpioInitData_Audio_SSP6) / sizeof = (mBXT_GpioInitData_Audio_SSP6[0]), mBXT_GpioInitData_Audio_SSP6); + GpioPadConfigTable ( sizeof (mLeafHill_GpioInitData_Audio_SSP6) / si= zeof (mLeafHill_GpioInitData_Audio_SSP6[0]), mLeafHill_GpioInitData_Audio_S= SP6); } =20 if (SystemConfiguration.PcieRootPortEn[4] =3D=3D FALSE) { DEBUG ((DEBUG_INFO, "Onboard LAN disable. \n" )); - GpioPadConfigTable ( sizeof (LomDisableGpio) / sizeof (LomDisableGpi= o[0]), LomDisableGpio); + GpioPadConfigTable ( sizeof (LeafHillLomDisableGpio) / sizeof (LeafH= illLomDisableGpio[0]), LeafHillLomDisableGpio); } =20 if (SystemConfiguration.EPIEnable =3D=3D 1) { DEBUG((DEBUG_INFO, "Overriding GPIO 191 for EPI\n")); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_EPI_Override) / sizeof= (mBXT_GpioInitData_EPI_Override[0]), mBXT_GpioInitData_EPI_Override); + GpioPadConfigTable (sizeof (mLeafHill_GpioInitData_EPI_Override) / s= izeof (mLeafHill_GpioInitData_EPI_Override[0]), mLeafHill_GpioInitData_EPI_= Override); } if (SystemConfiguration.GpioLock =3D=3D TRUE) { - SetGpioPadCfgLock (); + LeafHillSetGpioPadCfgLock (); } DEBUG ((DEBUG_INFO, "No board ID available for this board ....\n")); break; @@ -263,20 +263,20 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "Dump Community pad registers, Board ID: 0x%X\n"= , PlatformInfoHob->BoardId)); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW_LH) / sizeof (mBXT_Gp= ioInitData_NW_LH[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W_LH) / sizeof (mBXT_Gpi= oInitData_W_LH[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW_LH) / sizeof (mBXT_Gp= ioInitData_SW_LH[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_N) / sizeof (mLeafH= ill_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_NW_LH) / sizeof (mL= eafHill_GpioInitData_NW_LH[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_W_LH) / sizeof (mLe= afHill_GpioInitData_W_LH[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_SW_LH) / sizeof (mL= eafHill_GpioInitData_SW_LH[0]), PlatformInfoHob->PlatformGpioSetting_SW); break; default: =20 // // Dump Community pad registers // - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_N) / sizeof (mLeafH= ill_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_NW) / sizeof (mLeaf= Hill_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_W) / sizeof (mLeafH= ill_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mLeafHill_GpioInitData_SW) / sizeof (mLeaf= Hill_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); break; } =20 diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardGpios.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardGpios.h index 9777d7500..de1c47683 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpio= s.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpio= s.h @@ -1,7 +1,7 @@ /** @file GPIO setting for Broxton. =20 - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef _BOARDGPIOS_H_ -#define _BOARDGPIOS_H_ +#ifndef _LEAFHILL_BOARDGPIOS_H_ +#define _LEAFHILL_BOARDGPIOS_H_ =20 #include #include"ChipsetAccess.h" @@ -59,7 +59,7 @@ Wake_Enabled: // // North Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_N[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -139,7 +139,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D // // North West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_NW [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -226,7 +226,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D // // West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_W [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,= GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -275,7 +275,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D // // South West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_SW[]=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, = IOSTerm, MMIO_Offset , Community @@ -314,7 +314,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D BXT_GPIO_PAD_CONF(L"SMB_ALERTB", M0, GPI , GPIO_D = , NA , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Maske= d,SAME ,GPIO_PADBAR+0x00F8 , SOUTHWEST),//not used on RVP }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_Audio_SSP6 []=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, I= OSTerm,MMIO_Offset, Community @@ -328,7 +328,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D BXT_GPIO_PAD_CONF(L"GPIO_192 DBI_SCL", M0 , HI_Z ,GPIO_D, = HI , NA , Wake_Disabled, P_2K_H, NA , NA,NA , = NA , GPIO_PADBAR+0x0028, NORTHWEST),//Feature: Codec Power Down PD Net = in Sch: SOC_CODEC_PD_N }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_FAB2[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -341,7 +341,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D // // GPIO 191 is only used if EPI reworks are applied on the board. This GPI= O switches between SD Card data (if set to 1) and EPI data (if set to 0). // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_EPI_Override[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -352,7 +352,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D // // North West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW_LH []=3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_NW_LH []=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset, Community @@ -392,7 +392,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW_LH []=3D }; =20 =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_N_LH[] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_N_LH[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm,MMIO_Offset,Community @@ -419,7 +419,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N_LH[] =3D // // West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_W_LH [] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_W_LH [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,= GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset, Community @@ -439,7 +439,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W_LH [] =3D // // South West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW_LH []=3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_SW_LH []=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, I= OSTerm,MMIO_Offset, Community @@ -449,7 +449,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW_LH []=3D BXT_GPIO_PAD_CONF(L"SMB_ALERTB", M1, NA , NA = , NA , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Maske= d, SAME, GPIO_PADBAR+ 0x00F8 , SOUTHWEST),//Feature: SMB_ALERTB }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D +BXT_GPIO_PAD_INIT mLeafHill_GpioInitData_LPSS_I2C[] =3D { BXT_GPIO_PAD_CONF(L"GPIO_134 LPSS_I2C5_SDA", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0050, WEST), BXT_GPIO_PAD_CONF(L"GPIO_135 LPSS_I2C5_SCL", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0058, WEST), @@ -457,7 +457,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D BXT_GPIO_PAD_CONF(L"GPIO_137 LPSS_I2C6_SCL", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0068, WEST), }; =20 -BXT_GPIO_PAD_INIT LomDisableGpio[] =3D +BXT_GPIO_PAD_INIT LeafHillLomDisableGpio[] =3D { // // LAN diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInit.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Boa= rdInit.c index 9ae19e387..501e810af 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .c @@ -81,7 +81,7 @@ LeafHillPostMemInitCallback ( // // Set init function PCD // - PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) MultiPlatformInfoIni= t); + PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) LeafHillMultiPlatfor= mInfoInit); =20 // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInit.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Boa= rdInit.h index fa3919e3c..298613ae6 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _LEAFHILL_BOARDINIT_H_ +#define _LEAFHILL_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID LeafHillGpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMe= m/BoardInitMiscs.c index 5b626a894..b7718e813 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= Miscs.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= Miscs.c @@ -24,11 +24,11 @@ =20 **/ VOID -GpioGroupTierInit ( +LeafHillGpioGroupTierInit ( IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "GpioGroupTierInit Start\n")); + DEBUG ((DEBUG_INFO, "LeafHillGpioGroupTierInit Start\n")); switch (PlatformInfoHob->BoardId) { default: GpioSetGroupToGpeDwX (GPIO_BXTP_GROUP_7, // map group 7 to GPE 0 ~ = 31 @@ -37,13 +37,13 @@ GpioGroupTierInit ( break; } =20 - DEBUG ((DEBUG_INFO, "GpioGroupTierInit End\n")); + DEBUG ((DEBUG_INFO, "LeafHillGpioGroupTierInit End\n")); } =20 =20 EFI_STATUS EFIAPI -MultiPlatformInfoInit ( +LeafHillMultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -108,30 +108,30 @@ MultiPlatformInfoInit ( // // Get GPIO table // - Status =3D MultiPlatformGpioTableInit (PeiServices, PlatformInfoHob); + Status =3D LeafHillMultiPlatformGpioTableInit (PeiServices, PlatformInfo= Hob); ASSERT_EFI_ERROR (Status); =20 // // Program GPIO // - Status =3D MultiPlatformGpioProgram (PeiServices, PlatformInfoHob); + Status =3D LeafHillMultiPlatformGpioProgram (PeiServices, PlatformInfoHo= b); =20 if (GetBxtSeries () =3D=3D BxtP) { - GpioGroupTierInit (PlatformInfoHob); + LeafHillGpioGroupTierInit (PlatformInfoHob); } =20 // // Update OemId // - Status =3D InitializeBoardOemId (PeiServices, PlatformInfoHob); - Status =3D InitializeBoardSsidSvid (PeiServices, PlatformInfoHob); + Status =3D LeafHillInitializeBoardOemId (PeiServices, PlatformInfoHob); + Status =3D LeafHillInitializeBoardSsidSvid (PeiServices, PlatformInfoHob= ); =20 return EFI_SUCCESS; } =20 =20 EFI_STATUS -InitializeBoardOemId ( +LeafHillInitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -157,7 +157,7 @@ InitializeBoardOemId ( =20 =20 EFI_STATUS -InitializeBoardSsidSvid ( +LeafHillInitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMe= m/BoardInitMiscs.h index 598fc9aef..98100c218 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= Miscs.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= Miscs.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _LEAFHILL_MULTIPLATFORM_LIB_H_ +#define _LEAFHILL_MULTIPLATFORM_LIB_H_ =20 #define LEN_64M 0x4000000 // @@ -87,37 +87,37 @@ #define SUBSYSTEM_SVID_SSID (SUBSYSTEM_VENDOR_ID + (SUBSYSTEM_DEVICE_ID = << 16)) =20 EFI_STATUS -GetPlatformInfoHob ( +LeafHillGetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioTableInit ( +LeafHillMultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioProgram ( +LeafHillMultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformInfoInit ( +LeafHillMultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardOemId ( +LeafHillInitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardSsidSvid ( +LeafHillInitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Pl= atformInfoHob.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostM= em/PlatformInfoHob.c index f84b32f21..bb1e6672c 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/PlatformI= nfoHob.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/PlatformI= nfoHob.c @@ -27,7 +27,7 @@ =20 **/ EFI_STATUS -GetPlatformInfoHob ( +LeafHillGetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Boa= rdInit.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Board= Init.c index 5dab22514..aa22e5622 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInit.c @@ -31,14 +31,14 @@ LeafHillPreMemInit ( IN PEI_BOARD_PRE_MEM_INIT_PPI *This ); =20 -static PEI_BOARD_PRE_MEM_INIT_PPI mPreMemInitPpiInstance =3D { +static PEI_BOARD_PRE_MEM_INIT_PPI mLeafHillPreMemInitPpiInstance =3D { LeafHillPreMemInit }; =20 static EFI_PEI_PPI_DESCRIPTOR mLeafHillPreMemInitPpi =3D { (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), &gBoardPreMemInitPpiGuid, - &mPreMemInitPpiInstance + &mLeafHillPreMemInitPpiInstance }; =20 static EFI_PEI_PPI_DESCRIPTOR mLeafHillPreMemInitDonePpi =3D { @@ -76,7 +76,7 @@ LeafHillPreMemInit ( // // Pre Mem Board Init // - Status =3D GetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabId); + Status =3D LeafHillGetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabI= d); if (BoardId !=3D (UINT8) BOARD_ID_LFH_CRB) { DEBUG ((EFI_D_INFO, "Not a Leaf Hill Board - skip\n")); return EFI_SUCCESS; diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Boa= rdInit.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Board= Init.h index fa3919e3c..298613ae6 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInit.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInit.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _LEAFHILL_BOARDINIT_H_ +#define _LEAFHILL_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID LeafHillGpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Boa= rdInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/= BoardInitMiscs.h index 57296b225..10132aa73 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitM= iscs.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/BoardInitM= iscs.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _LEAFHILL_MULTIPLATFORM_LIB_H_ +#define _LEAFHILL_MULTIPLATFORM_LIB_H_ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Pla= tformId.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Plat= formId.c index 40554b95e..d5fc5185b 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .c @@ -22,7 +22,7 @@ =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId( +LeafHillGetEmbeddedBoardIdFabId( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -156,7 +156,7 @@ GetEmbeddedBoardIdFabId( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +LeafHillGetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Pla= tformId.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/Plat= formId.h index 3999aaa72..d7491fdc8 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPreMem/PlatformId= .h @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef __PLATFORM_ID_H__ -#define __PLATFORM_ID_H__ +#ifndef __LEAFHILL_PLATFORM_ID_H__ +#define __LEAFHILL_PLATFORM_ID_H__ =20 // // Strap Fw Cfg ID define @@ -27,14 +27,14 @@ =20 EFI_STATUS EFIAPI -GetFwCfgId ( +LeafHillGetFwCfgId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *FwCfgId ); =20 EFI_STATUS EFIAPI -GetBoardIdFabId ( +LeafHillGetBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -42,7 +42,7 @@ GetBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId ( +LeafHillGetEmbeddedBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -50,7 +50,7 @@ GetEmbeddedBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +LeafHillGetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -58,21 +58,21 @@ GetIVIBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetDockId ( +LeafHillGetDockId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *DockId ); =20 EFI_STATUS EFIAPI -GetOsSelPss ( +LeafHillGetOsSelPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *OsSelPss ); =20 EFI_STATUS EFIAPI -GetBomIdPss ( +LeafHillGetBomIdPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BomIdPss ); diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitDxe/Bo= ardInitDxe.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitDxe/= BoardInitDxe.h index 518974801..2dd980e31 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitDxe/BoardInit= Dxe.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitDxe/BoardInit= Dxe.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef __BOARD_INIT_DXE_H__ -#define __BOARD_INIT_DXE_H__ +#ifndef __MINNOW3_BOARD_INIT_DXE_H__ +#define __MINNOW3_BOARD_INIT_DXE_H__ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardGpios.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPo= stMem/BoardGpios.c index eef62d9fa..096d0e862 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Gpios.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Gpios.c @@ -13,7 +13,7 @@ =20 **/ =20 -#include +#include "BoardGpios.h" #include #include =20 @@ -30,12 +30,12 @@ =20 **/ EFI_STATUS -MultiPlatformGpioTableInit ( +Minnow3MultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "MultiPlatformGpioTableInit()...\n")); + DEBUG ((DEBUG_INFO, "Minnow3MultiPlatformGpioTableInit()...\n")); DEBUG ((DEBUG_INFO, "PlatformInfoHob->BoardId: 0x%02X\n", PlatformInfoHo= b->BoardId)); =20 // @@ -45,16 +45,16 @@ MultiPlatformGpioTableInit ( case BOARD_ID_LFH_CRB: case BOARD_ID_MINNOW: case BOARD_ID_BENSON: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mMinnow3_GpioInitData_S= W[0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mMinnow3_GpioInitData_W[= 0]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mMinnow3_GpioInitData_N= W[0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mMinnow3_GpioInitData_N[= 0]; break; default: - PlatformInfoHob->PlatformGpioSetting_SW =3D &mBXT_GpioInitData_SW[0]; - PlatformInfoHob->PlatformGpioSetting_W =3D &mBXT_GpioInitData_W[0]; - PlatformInfoHob->PlatformGpioSetting_NW =3D &mBXT_GpioInitData_NW[0]; - PlatformInfoHob->PlatformGpioSetting_N =3D &mBXT_GpioInitData_N[0]; + PlatformInfoHob->PlatformGpioSetting_SW =3D &mMinnow3_GpioInitData_S= W[0]; + PlatformInfoHob->PlatformGpioSetting_W =3D &mMinnow3_GpioInitData_W[= 0]; + PlatformInfoHob->PlatformGpioSetting_NW =3D &mMinnow3_GpioInitData_N= W[0]; + PlatformInfoHob->PlatformGpioSetting_N =3D &mMinnow3_GpioInitData_N[= 0]; break; } =20 @@ -67,7 +67,7 @@ MultiPlatformGpioTableInit ( =20 **/ VOID -SetGpioPadCfgLock ( +Minnow3SetGpioPadCfgLock ( VOID ) { @@ -146,7 +146,7 @@ SetGpioPadCfgLock ( =20 **/ EFI_STATUS -MultiPlatformGpioProgram ( +Minnow3MultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -185,24 +185,24 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "PAD programming, Board ID: 0x%X\n", PlatformInf= oHob->BoardId)); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_Gpio= InitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_Gpi= oInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_Gpio= InitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_Gpi= oInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_N) / sizeof (mMinn= ow3_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_NW) / sizeof (mMin= now3_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_W) / sizeof (mMinn= ow3_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_SW) / sizeof (mMin= now3_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 if (SystemConfiguration.ScIshEnabled =3D=3D 0) { DEBUG ((DEBUG_INFO, "Switch ISH_I2C0 & ISH_I2C1 to LPSS_I2C5 and L= PSS I2C6. \n" )); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_LPSS_I2C) / sizeof (= mBXT_GpioInitData_LPSS_I2C[0]), mBXT_GpioInitData_LPSS_I2C); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_LPSS_I2C) / size= of (mMinnow3_GpioInitData_LPSS_I2C[0]), mMinnow3_GpioInitData_LPSS_I2C); } break; default: // // PAD programming // - GpioPadConfigTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_N) / sizeof (mMinnow= 3_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_NW) / sizeof (mMinno= w3_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_W) / sizeof (mMinnow= 3_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_SW) / sizeof (mMinno= w3_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 // // Note1: This BXT BIOS WA needs to be applied after PAD programming t= o overwrite the GPIO setting to take effect. @@ -211,7 +211,7 @@ MultiPlatformGpioProgram ( // if (PlatformInfoHob->FABID =3D=3D FAB2) { DEBUG ((DEBUG_INFO, "FAB ID: FAB2\n")); - GpioPadConfigTable(sizeof(mBXT_GpioInitData_FAB2)/sizeof(mBXT_GpioIn= itData_FAB2[0]), mBXT_GpioInitData_FAB2); + GpioPadConfigTable(sizeof(mMinnow3_GpioInitData_FAB2)/sizeof(mMinnow= 3_GpioInitData_FAB2[0]), mMinnow3_GpioInitData_FAB2); } =20 if (SystemConfiguration.TDO =3D=3D 2) { //Auto @@ -224,20 +224,20 @@ MultiPlatformGpioProgram ( =20 if (SystemConfiguration.ScHdAudioIoBufferOwnership =3D=3D 3) { DEBUG ((DEBUG_INFO, "HD Audio IO Buffer Ownership is I2S. Change GPI= O pin settings for it. \n" )); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_Audio_SSP6) / sizeof (= mBXT_GpioInitData_Audio_SSP6[0]), mBXT_GpioInitData_Audio_SSP6); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_Audio_SSP6) / size= of (mMinnow3_GpioInitData_Audio_SSP6[0]), mMinnow3_GpioInitData_Audio_SSP6); } =20 if (SystemConfiguration.PcieRootPortEn[4] =3D=3D FALSE) { DEBUG ((DEBUG_INFO, "Onboard LAN disable. \n" )); - GpioPadConfigTable (sizeof (LomDisableGpio) / sizeof (LomDisableGpio= [0]), LomDisableGpio); + GpioPadConfigTable (sizeof (Minnow3LomDisableGpio) / sizeof (Minnow3= LomDisableGpio[0]), Minnow3LomDisableGpio); } =20 if (SystemConfiguration.EPIEnable =3D=3D 1) { DEBUG ((DEBUG_INFO, "Overriding GPIO 191 for EPI\n")); - GpioPadConfigTable (sizeof (mBXT_GpioInitData_EPI_Override) / sizeof= (mBXT_GpioInitData_EPI_Override[0]), mBXT_GpioInitData_EPI_Override); + GpioPadConfigTable (sizeof (mMinnow3_GpioInitData_EPI_Override) / si= zeof (mMinnow3_GpioInitData_EPI_Override[0]), mMinnow3_GpioInitData_EPI_Ove= rride); } if (SystemConfiguration.GpioLock =3D=3D TRUE) { - SetGpioPadCfgLock (); + Minnow3SetGpioPadCfgLock (); } DEBUG ((DEBUG_INFO, "No board ID available for this board ....\n")); break; @@ -259,19 +259,19 @@ MultiPlatformGpioProgram ( // PAD programming // DEBUG ((DEBUG_INFO, "Dump Community pad registers, Board ID: 0x%X\n"= , PlatformInfoHob->BoardId)); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioIn= itData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioI= nitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioIn= itData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioI= nitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_N) / sizeof (mMinnow= 3_GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_NW) / sizeof (mMinno= w3_GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_W) / sizeof (mMinnow= 3_GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_SW) / sizeof (mMinno= w3_GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); break; default: // // Dump Community pad registers // - DumpGpioPadTable (sizeof (mBXT_GpioInitData_N) / sizeof (mBXT_GpioInit= Data_N[0]), PlatformInfoHob->PlatformGpioSetting_N); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_NW) / sizeof (mBXT_GpioIni= tData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_W) / sizeof (mBXT_GpioInit= Data_W[0]), PlatformInfoHob->PlatformGpioSetting_W); - DumpGpioPadTable (sizeof (mBXT_GpioInitData_SW) / sizeof (mBXT_GpioIni= tData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_N) / sizeof (mMinnow3_= GpioInitData_N[0]), PlatformInfoHob->PlatformGpioSetting_N); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_NW) / sizeof (mMinnow3= _GpioInitData_NW[0]), PlatformInfoHob->PlatformGpioSetting_NW); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_W) / sizeof (mMinnow3_= GpioInitData_W[0]), PlatformInfoHob->PlatformGpioSetting_W); + DumpGpioPadTable (sizeof (mMinnow3_GpioInitData_SW) / sizeof (mMinnow3= _GpioInitData_SW[0]), PlatformInfoHob->PlatformGpioSetting_SW); =20 break; } diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPo= stMem/BoardGpios.h index 193f347ec..1bf848995 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Gpios.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Gpios.h @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef _BOARDGPIOS_H_ -#define _BOARDGPIOS_H_ +#ifndef _MINNOW3_BOARDGPIOS_H_ +#define _MINNOW3_BOARDGPIOS_H_ =20 #include #include"ChipsetAccess.h" @@ -58,7 +58,7 @@ Wake_Enabled: // // North Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_N[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -142,7 +142,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] =3D // // North West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_NW [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -234,7 +234,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_NW [] =3D // // West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_W [] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,= GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L, Inverted,GPI_ROUT,IOSstae, IO= STerm, MMIO_Offset , Community @@ -287,7 +287,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_W [] =3D // // South West Community // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_SW[]=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, = IOSTerm, MMIO_Offset , Community @@ -326,7 +326,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_SW[]=3D BXT_GPIO_PAD_CONF(L"SMB_ALERTB", M1, NA , NA = , NA , NA ,Wake_Disabled, P_20K_H, NA , NA ,IOS_Maske= d, SAME, GPIO_PADBAR+ 0x00F8 , SOUTHWEST),//Feature: SMB_ALERTB }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_Audio_SSP6 []=3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostS= w,GPO_STATE,INT_Trigger,Wake_Enabled, Term_H_L,Inverted,GPI_ROUT,IOSstae, I= OSTerm,MMIO_Offset, Community @@ -340,7 +340,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []=3D BXT_GPIO_PAD_CONF(L"GPIO_192 DBI_SCL", M0 , HI_Z ,GPIO_D, = HI , NA , Wake_Disabled, P_2K_H, NA , NA,NA , = NA , GPIO_PADBAR+0x0028, NORTHWEST),//Feature: Codec Power Down PD Net = in Sch: SOC_CODEC_PD_N }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_FAB2[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -353,7 +353,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] =3D // // GPIO 191 is only used if EPI reworks are applied on the board. This GPI= O switches between SD Card data (if set to 1) and EPI data (if set to 0). // -BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_EPI_Override[] =3D { // // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,G= PO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, = IOSTerm, MMIO_Offset ,Community @@ -361,7 +361,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_EPI_Override[] =3D BXT_GPIO_PAD_CONF(L"GPIO_191 DBI_SDA", M0, GPO, GPIO_D,L= O, NA, Wake_Disabled,P_20K_L, NA, NA, NA, = NA, GPIO_PADBAR + 0x0020, NORTHWEST),//Feature: SD_I2C MUX SEL = Net in Sch: INA_MUX_SEL }; =20 -BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D +BXT_GPIO_PAD_INIT mMinnow3_GpioInitData_LPSS_I2C[] =3D { BXT_GPIO_PAD_CONF(L"GPIO_134 LPSS_I2C5_SDA", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0050, WEST), BXT_GPIO_PAD_CONF(L"GPIO_135 LPSS_I2C5_SCL", M1 , NA , NA ,= NA , NA , Wake_Disabled, P_20K_H, NA , NA, HizRx0I, = EnPd, GPIO_PADBAR+0x0058, WEST), @@ -370,7 +370,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_LPSS_I2C[] =3D }; =20 =20 -BXT_GPIO_PAD_INIT LomDisableGpio[] =3D +BXT_GPIO_PAD_INIT Minnow3LomDisableGpio[] =3D { // // LAN diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPos= tMem/BoardInit.c index 114c3c9ac..ac6bf58c1 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.c @@ -81,7 +81,7 @@ MinnowBoard3PostMemInitCallback ( // // Set init function PCD // - PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) MultiPlatformInfoIni= t); + PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) Minnow3MultiPlatform= InfoInit); =20 // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPos= tMem/BoardInit.h index fa3919e3c..b00f53e5f 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _MINNOW3_BOARDINIT_H_ +#define _MINNOW3_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID Minnow3GpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardIn= itPostMem/BoardInitMiscs.c index 0d40777b6..dc63725f6 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitMiscs.c @@ -25,11 +25,11 @@ =20 **/ VOID -GpioGroupTierInit ( +Minnow3GpioGroupTierInit ( IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { - DEBUG ((DEBUG_INFO, "GpioGroupTierInit Start\n")); + DEBUG ((DEBUG_INFO, "Minnow3GpioGroupTierInit Start\n")); switch (PlatformInfoHob->BoardId) { default: GpioSetGroupToGpeDwX (GPIO_BXTP_GROUP_7, // map group 7 to GPE 0 ~ = 31 @@ -38,13 +38,13 @@ GpioGroupTierInit ( break; } =20 - DEBUG ((DEBUG_INFO, "GpioGroupTierInit End\n")); + DEBUG ((DEBUG_INFO, "Minnow3GpioGroupTierInit End\n")); } =20 =20 EFI_STATUS EFIAPI -MultiPlatformInfoInit ( +Minnow3MultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -110,30 +110,30 @@ MultiPlatformInfoInit ( // // Get GPIO table // - Status =3D MultiPlatformGpioTableInit (PeiServices, PlatformInfoHob); + Status =3D Minnow3MultiPlatformGpioTableInit (PeiServices, PlatformInfoH= ob); ASSERT_EFI_ERROR (Status); =20 // // Program GPIO // - Status =3D MultiPlatformGpioProgram (PeiServices, PlatformInfoHob); + Status =3D Minnow3MultiPlatformGpioProgram (PeiServices, PlatformInfoHob= ); =20 if (GetBxtSeries () =3D=3D BxtP) { - GpioGroupTierInit (PlatformInfoHob); + Minnow3GpioGroupTierInit (PlatformInfoHob); } =20 // // Update OemId // - Status =3D InitializeBoardOemId (PeiServices, PlatformInfoHob); - Status =3D InitializeBoardSsidSvid (PeiServices, PlatformInfoHob); + Status =3D Minnow3InitializeBoardOemId (PeiServices, PlatformInfoHob); + Status =3D Minnow3InitializeBoardSsidSvid (PeiServices, PlatformInfoHob); =20 return EFI_SUCCESS; } =20 =20 EFI_STATUS -InitializeBoardOemId ( +Minnow3InitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) @@ -158,7 +158,7 @@ InitializeBoardOemId ( } =20 EFI_STATUS -InitializeBoardSsidSvid ( +Minnow3InitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardIn= itPostMem/BoardInitMiscs.h index 8ae5f7c3d..2c8c7eb80 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitMiscs.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitMiscs.h @@ -2,7 +2,7 @@ Multiplatform initialization header file. This file includes package header files, library classes. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _MINNOW_MULTIPLATFORM_LIB_H_ +#define _MINNOW_MULTIPLATFORM_LIB_H_ =20 #define LEN_64M 0x4000000 // @@ -88,37 +88,37 @@ #define SUBSYSTEM_SVID_SSID (SUBSYSTEM_VENDOR_ID + (SUBSYSTEM_DEVICE_ID = << 16)) =20 EFI_STATUS -GetPlatformInfoHob ( +Minnow3GetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioTableInit ( +Minnow3MultiPlatformGpioTableInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformGpioProgram ( +Minnow3MultiPlatformGpioProgram ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -MultiPlatformInfoInit ( +Minnow3MultiPlatformInfoInit ( IN CONST EFI_PEI_SERVICES **PeiServices, IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardOemId ( +Minnow3InitializeBoardOemId ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 EFI_STATUS -InitializeBoardSsidSvid ( +Minnow3InitializeBoardSsidSvid ( IN CONST EFI_PEI_SERVICES **PeiServices, IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/PlatformInfoHob.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardI= nitPostMem/PlatformInfoHob.c index 8dac0ba28..871e2206d 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Platf= ormInfoHob.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Platf= ormInfoHob.c @@ -1,7 +1,7 @@ /** @file This file does Multiplatform initialization. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -26,7 +26,7 @@ =20 **/ EFI_STATUS -GetPlatformInfoHob ( +Minnow3GetPlatformInfoHob ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT EFI_PLATFORM_INFO_HOB **PlatformInfoHob ) diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreM= em/BoardInit.c index bb82d4e2d..720d11add 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nit.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nit.c @@ -1,7 +1,7 @@ /** @file Board Init driver. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -31,14 +31,14 @@ MinnowBoard3PreMemInit ( IN PEI_BOARD_PRE_MEM_INIT_PPI *This ); =20 -static PEI_BOARD_PRE_MEM_INIT_PPI mPreMemInitPpiInstance =3D { +static PEI_BOARD_PRE_MEM_INIT_PPI mMinnow3PreMemInitPpiInstance =3D { MinnowBoard3PreMemInit }; =20 static EFI_PEI_PPI_DESCRIPTOR mMinnowBoard3PreMemInitPpi =3D { (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), &gBoardPreMemInitPpiGuid, - &mPreMemInitPpiInstance + &mMinnow3PreMemInitPpiInstance }; =20 static EFI_PEI_PPI_DESCRIPTOR mMinnowBoard3PreMemInitDonePpi =3D { @@ -77,7 +77,7 @@ MinnowBoard3PreMemInit ( // // Pre Mem Board Init // - Status =3D GetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabId); + Status =3D Minnow3GetEmbeddedBoardIdFabId (PeiServices, &BoardId, &FabId= ); =20 if (BoardId !=3D (UINT8) BOARD_ID_MINNOW) { DEBUG ((EFI_D_INFO, "Not a Minnow Board - skip\n")); diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /BoardInit.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreM= em/BoardInit.h index fa3919e3c..59c2d7f1f 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nit.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nit.h @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _BOARDINIT_H_ -#define _BOARDINIT_H_ +#ifndef _MINNOW_BOARDINIT_H_ +#define _MINNOW_BOARDINIT_H_ =20 #include #include @@ -23,7 +23,7 @@ #include #include =20 -VOID GpioTest (VOID); +VOID MinnowGpioTest (VOID); =20 #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /BoardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardIni= tPreMem/BoardInitMiscs.h index bb8c4aa96..813b023c9 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nitMiscs.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/BoardI= nitMiscs.h @@ -2,7 +2,7 @@ Multiplatform initialization header file. This file includes package header files, library classes. =20 - Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -14,8 +14,8 @@ =20 **/ =20 -#ifndef _MULTIPLATFORM_LIB_H_ -#define _MULTIPLATFORM_LIB_H_ +#ifndef _MINNOW_MULTIPLATFORM_LIB_H_ +#define _MINNOW_MULTIPLATFORM_LIB_H_ =20 #include #include diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /PlatformId.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPre= Mem/PlatformId.c index bacdab1f2..5b9da16d5 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.c @@ -22,7 +22,7 @@ =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId( +Minnow3GetEmbeddedBoardIdFabId( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -89,7 +89,7 @@ GetEmbeddedBoardIdFabId( (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00C8) + B= XT_GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ (((GpioPadRead (GetCommOffset (NORTH, 0x01E0) + BXT_G= PIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 - DEBUG ((DEBUG_INFO, "BoardId from PMIC strap: %02X\n", *BoardId)); + DEBUG ((DEBUG_INFO, "BoardId: %02X\n", *BoardId)); =20 // // Fab_ID0: PMIC_I2C_SDA @@ -147,7 +147,7 @@ GetEmbeddedBoardIdFabId( (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00D8) + BXT= _GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 2) | \ (((GpioPadRead (GetCommOffset (NORTHWEST, 0x00E0) + BXT= _GPIO_PAD_CONF0_OFFSET) & BIT1) >> 1) << 3)); =20 - DEBUG ((EFI_D_INFO, "FabId from PMIC strap: %02X\n", *FabId)); + DEBUG ((EFI_D_INFO, "FabId: %02X\n", *FabId)); =20 =20 return EFI_SUCCESS; @@ -156,7 +156,7 @@ GetEmbeddedBoardIdFabId( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +MinnowGetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem= /PlatformId.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPre= Mem/PlatformId.h index 3999aaa72..fa6570be0 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPreMem/Platfo= rmId.h @@ -1,7 +1,7 @@ /** @file Header file for the Platform ID code. =20 - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -13,8 +13,8 @@ =20 **/ =20 -#ifndef __PLATFORM_ID_H__ -#define __PLATFORM_ID_H__ +#ifndef __MINNOWBOARD_PLATFORM_ID_H__ +#define __MINNOWBOARD_PLATFORM_ID_H__ =20 // // Strap Fw Cfg ID define @@ -27,14 +27,14 @@ =20 EFI_STATUS EFIAPI -GetFwCfgId ( +Minnow3GetFwCfgId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *FwCfgId ); =20 EFI_STATUS EFIAPI -GetBoardIdFabId ( +Minnow3GetBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -42,7 +42,7 @@ GetBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetEmbeddedBoardIdFabId ( +Minnow3GetEmbeddedBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -50,7 +50,7 @@ GetEmbeddedBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetIVIBoardIdFabId ( +Minnow3GetIVIBoardIdFabId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BoardId, OUT UINT8 *FabId @@ -58,21 +58,21 @@ GetIVIBoardIdFabId ( =20 EFI_STATUS EFIAPI -GetDockId ( +Minnow3GetDockId ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *DockId ); =20 EFI_STATUS EFIAPI -GetOsSelPss ( +Minnow3GetOsSelPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *OsSelPss ); =20 EFI_STATUS EFIAPI -GetBomIdPss ( +Minnow3GetBomIdPss ( IN CONST EFI_PEI_SERVICES **PeiServices, OUT UINT8 *BomIdPss ); --=20 2.11.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel