From nobody Thu Dec 26 14:17:08 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1502937337915753.0334265394624; Wed, 16 Aug 2017 19:35:37 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B192E21E2DA4A; Wed, 16 Aug 2017 19:33:08 -0700 (PDT) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0E4D021D18243 for ; Wed, 16 Aug 2017 19:33:08 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Aug 2017 19:35:34 -0700 Received: from mdkinney-mobl1.amr.corp.intel.com ([10.241.98.166]) by orsmga003.jf.intel.com with ESMTP; 16 Aug 2017 19:35:33 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,385,1498546800"; d="scan'208";a="1004628248" From: Michael D Kinney To: edk2-devel@lists.01.org Date: Wed, 16 Aug 2017 19:35:32 -0700 Message-Id: <20170817023532.5380-1-michael.d.kinney@intel.com> X-Mailer: git-send-email 2.13.1.windows.2 Subject: [edk2] [Patch] UefiCpuPkg/PiSmmCpuDxeSmm: Add CPUID MCA support check X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael Kinney , Eric Dong MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" https://bugzilla.tianocore.org/show_bug.cgi?id=3D674 Add CPUID check to see if the CPU supports the Machine Check Architecture before accessing the Machine Check Architecture related MSRs. Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael Kinney Reviewed-by: Eric Dong --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index 6b66c49085..f086b97c30 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -27,6 +27,7 @@ SMM_CPU_SEMAPHORES mSmmCpuSemaph= ores; UINTN mSemaphoreSize; SPIN_LOCK *mPFLock =3D NULL; SMM_CPU_SYNC_MODE mCpuSmmSyncMode; +BOOLEAN mMachineCheckSupported =3D FAL= SE; =20 /** Performs an atomic compare exchange operation to get semaphore. @@ -264,8 +265,12 @@ SmmWaitForApArrival ( =20 ASSERT (*mSmmMpSyncData->Counter <=3D mNumberOfCpus); =20 - LmceEn =3D IsLmceOsEnabled (); - LmceSignal =3D IsLmceSignaled(); + LmceEn =3D FALSE; + LmceSignal =3D FALSE; + if (mMachineCheckSupported) { + LmceEn =3D IsLmceOsEnabled (); + LmceSignal =3D IsLmceSignaled(); + } =20 // // Platform implementor should choose a timeout value appropriately: @@ -1366,6 +1371,13 @@ InitializeMpServiceData ( UINTN Index; UINT8 *GdtTssTables; UINTN GdtTableStepSize; + CPUID_VERSION_INFO_EDX RegEdx; + + // + // Determine if this CPU supports machine check + // + AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx.Uint32); + mMachineCheckSupported =3D (BOOLEAN)(RegEdx.Bits.MCA =3D=3D 1); =20 // // Allocate memory for all locks and semaphores --=20 2.13.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel