From nobody Fri Dec 27 02:15:54 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1503651455749292.94785796343274; Fri, 25 Aug 2017 01:57:35 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id DC33821D1E2E4; Fri, 25 Aug 2017 01:54:54 -0700 (PDT) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 28A0721D1E2C4 for ; Fri, 25 Aug 2017 01:54:53 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Aug 2017 01:57:28 -0700 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.2]) by orsmga004.jf.intel.com with ESMTP; 25 Aug 2017 01:57:26 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,424,1498546800"; d="scan'208";a="122500768" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Fri, 25 Aug 2017 16:57:19 +0800 Message-Id: <20170825085723.396044-2-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.12.2.windows.2 In-Reply-To: <20170825085723.396044-1-ruiyu.ni@intel.com> References: <20170825085723.396044-1-ruiyu.ni@intel.com> Subject: [edk2] [PATCH v2 1/5] MdePkg/PciSegmentLib: Fix typo in function header comments X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Cc: Liming Gao --- MdePkg/Include/Library/PciSegmentLib.h | 102 +++++------ .../Library/BasePciSegmentLibPci/PciSegmentLib.c | 136 +++++++-------- .../PeiPciSegmentLibPciCfg2/PciSegmentLib.c | 187 ++++++++++-------= ---- .../PciSegmentLib.c | 180 ++++++++++-------= --- 4 files changed, 308 insertions(+), 297 deletions(-) diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Librar= y/PciSegmentLib.h index 5175e07606..6e4fecb0b1 100644 --- a/MdePkg/Include/Library/PciSegmentLib.h +++ b/MdePkg/Include/Library/PciSegmentLib.h @@ -23,7 +23,7 @@ access method. Modules will typically use the PCI Segment Library for i= ts PCI configuration=20 accesses when PCI Segments other than Segment #0 must be accessed. =20 =20 -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -99,9 +99,9 @@ PciSegmentRegisterForRuntimeAccess ( =20 Reads and returns the 8-bit PCI configuration register specified by Addr= ess. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). - =20 + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 8-bit PCI configuration register specified by Address. @@ -118,7 +118,7 @@ PciSegmentRead8 ( =20 Writes the 8-bit PCI configuration register specified by Address with th= e value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @@ -142,7 +142,7 @@ PciSegmentWrite8 ( and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @@ -184,18 +184,18 @@ PciSegmentAnd8 ( /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-= bit value, followed a bitwise OR with another 8-bit value. - =20 + Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. - @param AndData The value to AND with the PCI configuration register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -345,8 +345,7 @@ PciSegmentBitFieldAnd8 ( =20 /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise OR, and writes the result back to the bit field in the - 8-bit port. + bitwise OR, and writes the result back to the bit field in the 8-bit por= t. =20 Reads the 8-bit PCI configuration register specified by Address, perform= s a bitwise AND followed by a bitwise OR between the read result and @@ -389,10 +388,10 @@ PciSegmentBitFieldAndThenOr8 ( =20 Reads and returns the 16-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 16-bit PCI configuration register specified by Address. @@ -409,7 +408,7 @@ PciSegmentRead16 ( =20 Writes the 16-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 @@ -431,11 +430,10 @@ PciSegmentWrite16 ( a 16-bit value. =20 Reads the 16-bit PCI configuration register specified by Address, perfor= ms a - bitwise OR between the read result and the value specified by - OrData, and writes the result to the 16-bit PCI configuration register - specified by Address. The value written to the PCI configuration registe= r is - returned. This function must guarantee that all PCI read and write opera= tions - are serialized. + bitwise OR between the read result and the value specified by OrData, and + writes the result to the 16-bit PCI configuration register specified by = Address. + The value written to the PCI configuration register is returned. This fu= nction + must guarantee that all PCI read and write operations are serialized. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @@ -462,10 +460,10 @@ PciSegmentOr16 ( and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @@ -482,19 +480,19 @@ PciSegmentAnd16 ( /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-= bit value, followed a bitwise OR with another 16-bit value. - =20 + Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. - @param AndData The value to AND with the PCI configuration register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -573,9 +571,15 @@ PciSegmentBitFieldWrite16 ( ); =20 /** - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address.=20 + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, = writes + the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration registe= r is + returned. This function must guarantee that all PCI read and write opera= tions + are serialized. Extra left bits in OrData are stripped. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @@ -604,31 +608,31 @@ PciSegmentBitFieldOr16 ( ); =20 /** - Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, - and writes the result back to the bit field in the 16-bit port. + Reads a bit field in a 16-bit PCI configuration register, performs a bit= wise + AND, writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise AND between the read result and the value specified by AndData, = and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. =20 - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address. - The value written to the PCI configuration register is returned. - This function must guarantee that all PCI read and write operations are = serialized. - Extra left bits in OrData are stripped. - =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - If StartBit is greater than 7, then ASSERT(). - If EndBit is greater than 7, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. - The ordinal of the least significant bit in a byte is = bit 0. + Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. - The ordinal of the most significant bit in a byte is b= it 7. - @param AndData The value to AND with the read value from the PCI conf= iguration register. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. =20 - @return The value written to the PCI configuration register. + @return The value written back to the PCI configuration register. =20 **/ UINT16 @@ -686,7 +690,7 @@ PciSegmentBitFieldAndThenOr16 ( =20 Reads and returns the 32-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 @@ -706,7 +710,7 @@ PciSegmentRead32 ( =20 Writes the 32-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 @@ -731,7 +735,7 @@ PciSegmentWrite32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 @@ -756,7 +760,7 @@ PciSegmentOr32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 @@ -776,14 +780,14 @@ PciSegmentAnd32 ( /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-= bit value, followed a bitwise OR with another 32-bit value. - =20 + Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 @@ -906,7 +910,7 @@ PciSegmentBitFieldOr32 ( Reads a bit field in a 32-bit PCI configuration register, performs a bit= wise AND, and writes the result back to the bit field in the 32-bit register. =20 - =20 + Reads the 32-bit PCI configuration register specified by Address, perfor= ms a bitwise AND between the read result and the value specified by AndData, and writ= es the result to the 32-bit PCI configuration register specified by Address. The value= written to @@ -919,7 +923,7 @@ PciSegmentBitFieldOr32 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address PCI configuration register to write. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. diff --git a/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c b/MdePkg/L= ibrary/BasePciSegmentLibPci/PciSegmentLib.c index dc2745bf3a..8396c44ed7 100644 --- a/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c +++ b/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c @@ -2,7 +2,7 @@ PCI Segment Library that layers on top of the PCI Library which only supports segment 0 PCI configuration access. =20 - Copyright (c) 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full @@ -75,7 +75,7 @@ PciSegmentRegisterForRuntimeAccess ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 8-bit PCI configuration register specified by Address. =20 @@ -99,7 +99,7 @@ PciSegmentRead8 ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The value written to the PCI configuration register. @@ -128,7 +128,7 @@ PciSegmentWrite8 ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -154,7 +154,7 @@ PciSegmentOr8 ( This function must guarantee that all PCI read and write operations are = serialized. If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -183,8 +183,8 @@ PciSegmentAnd8 ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. - @param AndData The value to AND with the PCI configuration register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -213,7 +213,7 @@ PciSegmentAndThenOr8 ( If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -247,12 +247,12 @@ PciSegmentBitFieldRead8 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..7. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -289,7 +289,7 @@ PciSegmentBitFieldWrite8 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -331,7 +331,7 @@ PciSegmentBitFieldOr8 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -358,8 +358,7 @@ PciSegmentBitFieldAnd8 ( =20 /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise OR, and writes the result back to the bit field in the - 8-bit port. + bitwise OR, and writes the result back to the bit field in the 8-bit por= t. =20 Reads the 8-bit PCI configuration register specified by Address, perform= s a bitwise AND followed by a bitwise OR between the read result and @@ -376,7 +375,7 @@ PciSegmentBitFieldAnd8 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -412,7 +411,7 @@ PciSegmentBitFieldAndThenOr8 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 16-bit PCI configuration register specified by Address. =20 @@ -437,7 +436,7 @@ PciSegmentRead16 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -460,16 +459,15 @@ PciSegmentWrite16 ( a 16-bit value. =20 Reads the 16-bit PCI configuration register specified by Address, perfor= ms a - bitwise OR between the read result and the value specified by - OrData, and writes the result to the 16-bit PCI configuration register - specified by Address. The value written to the PCI configuration registe= r is - returned. This function must guarantee that all PCI read and write opera= tions - are serialized. + bitwise OR between the read result and the value specified by OrData, and + writes the result to the 16-bit PCI configuration register specified by = Address. + The value written to the PCI configuration register is returned. This fu= nction + must guarantee that all PCI read and write operations are serialized. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device, F= unction and + @param Address Address that encodes the PCI Segment, Bus, Device, Funct= ion and Register. @param OrData The value to OR with the PCI configuration register. =20 @@ -498,7 +496,7 @@ PciSegmentOr16 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -528,8 +526,8 @@ PciSegmentAnd16 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. - @param AndData The value to AND with the PCI configuration register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -559,7 +557,7 @@ PciSegmentAndThenOr16 ( If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -594,12 +592,12 @@ PciSegmentBitFieldRead16 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..15. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -620,9 +618,15 @@ PciSegmentBitFieldWrite16 ( } =20 /** - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address. + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, = writes + the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration registe= r is + returned. This function must guarantee that all PCI read and write opera= tions + are serialized. Extra left bits in OrData are stripped. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @@ -631,7 +635,7 @@ PciSegmentBitFieldWrite16 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -657,31 +661,31 @@ PciSegmentBitFieldOr16 ( } =20 /** - Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, - and writes the result back to the bit field in the 16-bit port. + Reads a bit field in a 16-bit PCI configuration register, performs a bit= wise + AND, writes the result back to the bit field in the 16-bit register. =20 - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address. - The value written to the PCI configuration register is returned. - This function must guarantee that all PCI read and write operations are = serialized. - Extra left bits in OrData are stripped. + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise AND between the read result and the value specified by AndData, = and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - If StartBit is greater than 7, then ASSERT(). - If EndBit is greater than 7, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. - The ordinal of the least significant bit in a byte is = bit 0. + Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. - The ordinal of the most significant bit in a byte is b= it 7. - @param AndData The value to AND with the read value from the PCI conf= iguration register. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. =20 - @return The value written to the PCI configuration register. + @return The value written back to the PCI configuration register. =20 **/ UINT16 @@ -719,7 +723,7 @@ PciSegmentBitFieldAnd16 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -755,7 +759,7 @@ PciSegmentBitFieldAndThenOr16 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 32-bit PCI configuration register specified by Address. =20 @@ -780,7 +784,7 @@ PciSegmentRead32 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -810,7 +814,7 @@ PciSegmentWrite32 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -838,7 +842,7 @@ PciSegmentOr32 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -868,7 +872,7 @@ PciSegmentAnd32 ( If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @@ -899,7 +903,7 @@ PciSegmentAndThenOr32 ( If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -934,12 +938,12 @@ PciSegmentBitFieldRead32 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..31. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -976,7 +980,7 @@ PciSegmentBitFieldWrite32 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1018,7 +1022,7 @@ PciSegmentBitFieldOr32 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1063,7 +1067,7 @@ PciSegmentBitFieldAnd32 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1105,10 +1109,10 @@ PciSegmentBitFieldAndThenOr32 ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus, Device, + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer receiving the data read. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. =20 @return Size =20 @@ -1203,10 +1207,10 @@ PciSegmentReadBuffer ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus, Device, + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer containing the data to wri= te. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. =20 @return The parameter of Size. =20 diff --git a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c b/MdePk= g/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c index 93f63df389..8af168d7f9 100644 --- a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c +++ b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c @@ -1,7 +1,7 @@ /** @file PCI Segment Library implementation using PCI CFG2 PPI. =20 - Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.
+ Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full @@ -168,7 +168,7 @@ PeiPciSegmentLibPciCfg2WriteWorker ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Bus, Device, Function a= nd + @param Address Address that encodes the PCI Bus, Device, Function and Register. =20 @retval RETURN_SUCCESS The PCI device was registered for runti= me access. @@ -195,11 +195,10 @@ PciSegmentRegisterForRuntimeAccess ( =20 Reads and returns the 8-bit PCI configuration register specified by Addr= ess. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function,=20 - and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 8-bit PCI configuration register specified by Address. =20 @@ -220,10 +219,10 @@ PciSegmentRead8 ( =20 Writes the 8-bit PCI configuration register specified by Address with th= e value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The value written to the PCI configuration register. @@ -249,10 +248,10 @@ PciSegmentWrite8 ( and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -278,7 +277,7 @@ PciSegmentOr8 ( This function must guarantee that all PCI read and write operations are = serialized. If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -297,18 +296,18 @@ PciSegmentAnd8 ( /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-= bit value, followed a bitwise OR with another 8-bit value. - =20 + Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. - @param AndData The value to AND with the PCI configuration register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -337,7 +336,7 @@ PciSegmentAndThenOr8 ( If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -371,12 +370,12 @@ PciSegmentBitFieldRead8 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..7. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -413,7 +412,7 @@ PciSegmentBitFieldWrite8 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -455,7 +454,7 @@ PciSegmentBitFieldOr8 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -482,8 +481,7 @@ PciSegmentBitFieldAnd8 ( =20 /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise OR, and writes the result back to the bit field in the - 8-bit port. + bitwise OR, and writes the result back to the bit field in the 8-bit por= t. =20 Reads the 8-bit PCI configuration register specified by Address, perform= s a bitwise AND followed by a bitwise OR between the read result and @@ -500,7 +498,7 @@ PciSegmentBitFieldAnd8 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -532,11 +530,11 @@ PciSegmentBitFieldAndThenOr8 ( =20 Reads and returns the 16-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 16-bit PCI configuration register specified by Address. =20 @@ -557,11 +555,11 @@ PciSegmentRead16 ( =20 Writes the 16-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -584,16 +582,15 @@ PciSegmentWrite16 ( a 16-bit value. =20 Reads the 16-bit PCI configuration register specified by Address, perfor= ms a - bitwise OR between the read result and the value specified by - OrData, and writes the result to the 16-bit PCI configuration register - specified by Address. The value written to the PCI configuration registe= r is - returned. This function must guarantee that all PCI read and write opera= tions - are serialized. + bitwise OR between the read result and the value specified by OrData, and + writes the result to the 16-bit PCI configuration register specified by = Address. + The value written to the PCI configuration register is returned. This fu= nction + must guarantee that all PCI read and write operations are serialized. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device, F= unction and + @param Address Address that encodes the PCI Segment, Bus, Device, Funct= ion and Register. @param OrData The value to OR with the PCI configuration register. =20 @@ -618,11 +615,11 @@ PciSegmentOr16 ( and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -641,18 +638,18 @@ PciSegmentAnd16 ( /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-= bit value, followed a bitwise OR with another 16-bit value. - =20 + Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @@ -683,7 +680,7 @@ PciSegmentAndThenOr16 ( If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -718,12 +715,12 @@ PciSegmentBitFieldRead16 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..15. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -744,9 +741,15 @@ PciSegmentBitFieldWrite16 ( } =20 /** - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address.=20 + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, = writes + the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration registe= r is + returned. This function must guarantee that all PCI read and write opera= tions + are serialized. Extra left bits in OrData are stripped. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @@ -755,7 +758,7 @@ PciSegmentBitFieldWrite16 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -781,31 +784,31 @@ PciSegmentBitFieldOr16 ( } =20 /** - Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, - and writes the result back to the bit field in the 16-bit port. + Reads a bit field in a 16-bit PCI configuration register, performs a bit= wise + AND, writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise AND between the read result and the value specified by AndData, = and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. =20 - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address. - The value written to the PCI configuration register is returned. - This function must guarantee that all PCI read and write operations are = serialized. - Extra left bits in OrData are stripped. - =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - If StartBit is greater than 7, then ASSERT(). - If EndBit is greater than 7, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. - The ordinal of the least significant bit in a byte is = bit 0. + Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. - The ordinal of the most significant bit in a byte is b= it 7. - @param AndData The value to AND with the read value from the PCI conf= iguration register. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. =20 - @return The value written to the PCI configuration register. + @return The value written back to the PCI configuration register. =20 **/ UINT16 @@ -843,7 +846,7 @@ PciSegmentBitFieldAnd16 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -875,12 +878,11 @@ PciSegmentBitFieldAndThenOr16 ( =20 Reads and returns the 32-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function,=20 - and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 32-bit PCI configuration register specified by Address. =20 @@ -901,12 +903,11 @@ PciSegmentRead32 ( =20 Writes the 32-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e,=20 - Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -932,11 +933,11 @@ PciSegmentWrite32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -960,12 +961,11 @@ PciSegmentOr32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function,=20 - and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -984,19 +984,18 @@ PciSegmentAnd32 ( /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-= bit value, followed a bitwise OR with another 32-bit value. - =20 + Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, - and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @@ -1027,7 +1026,7 @@ PciSegmentAndThenOr32 ( If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1062,12 +1061,12 @@ PciSegmentBitFieldRead32 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..31. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -1104,7 +1103,7 @@ PciSegmentBitFieldWrite32 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1133,7 +1132,7 @@ PciSegmentBitFieldOr32 ( Reads a bit field in a 32-bit PCI configuration register, performs a bit= wise AND, and writes the result back to the bit field in the 32-bit register. =20 - =20 + Reads the 32-bit PCI configuration register specified by Address, perfor= ms a bitwise AND between the read result and the value specified by AndData, and writ= es the result to the 32-bit PCI configuration register specified by Address. The value= written to @@ -1146,7 +1145,7 @@ PciSegmentBitFieldOr32 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1191,7 +1190,7 @@ PciSegmentBitFieldAnd32 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1233,10 +1232,10 @@ PciSegmentBitFieldAndThenOr32 ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus,=20 - Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer receiving the data read. + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. =20 @return Size =20 @@ -1332,10 +1331,10 @@ PciSegmentReadBuffer ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus,=20 - Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer containing the data to wri= te. + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, + Function and Register. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. =20 @return The parameter of Size. =20 diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.= c b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c index 5b286b057f..7e57ec21f9 100644 --- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c +++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.c @@ -1,7 +1,7 @@ /** @file PCI Segment Library implementation using PCI Root Bridge I/O Protocol. =20 - Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.
+ Copyright (c) 2007 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full @@ -246,7 +246,7 @@ DxePciSegmentLibPciRootBridgeIoWriteWorker ( =20 If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Bus, Device, Function a= nd + @param Address Address that encodes the PCI Bus, Device, Function and Register. =20 @retval RETURN_SUCCESS The PCI device was registered for runti= me access. @@ -273,10 +273,10 @@ PciSegmentRegisterForRuntimeAccess ( =20 Reads and returns the 8-bit PCI configuration register specified by Addr= ess. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 8-bit PCI configuration register specified by Address. =20 @@ -297,10 +297,10 @@ PciSegmentRead8 ( =20 Writes the 8-bit PCI configuration register specified by Address with th= e value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The value written to the PCI configuration register. @@ -326,10 +326,10 @@ PciSegmentWrite8 ( and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -355,7 +355,7 @@ PciSegmentOr8 ( This function must guarantee that all PCI read and write operations are = serialized. If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -374,18 +374,18 @@ PciSegmentAnd8 ( /** Performs a bitwise AND of an 8-bit PCI configuration register with an 8-= bit value, followed a bitwise OR with another 8-bit value. - =20 + Reads the 8-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 8-bit PCI configuration register specified = by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. - @param AndData The value to AND with the PCI configuration register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -414,7 +414,7 @@ PciSegmentAndThenOr8 ( If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -448,12 +448,12 @@ PciSegmentBitFieldRead8 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..7. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -490,7 +490,7 @@ PciSegmentBitFieldWrite8 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -532,7 +532,7 @@ PciSegmentBitFieldOr8 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -559,8 +559,7 @@ PciSegmentBitFieldAnd8 ( =20 /** Reads a bit field in an 8-bit port, performs a bitwise AND followed by a - bitwise OR, and writes the result back to the bit field in the - 8-bit port. + bitwise OR, and writes the result back to the bit field in the 8-bit por= t. =20 Reads the 8-bit PCI configuration register specified by Address, perform= s a bitwise AND followed by a bitwise OR between the read result and @@ -577,7 +576,7 @@ PciSegmentBitFieldAnd8 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..7. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -609,11 +608,11 @@ PciSegmentBitFieldAndThenOr8 ( =20 Reads and returns the 16-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 16-bit PCI configuration register specified by Address. =20 @@ -634,11 +633,11 @@ PciSegmentRead16 ( =20 Writes the 16-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -661,16 +660,15 @@ PciSegmentWrite16 ( a 16-bit value. =20 Reads the 16-bit PCI configuration register specified by Address, perfor= ms a - bitwise OR between the read result and the value specified by - OrData, and writes the result to the 16-bit PCI configuration register - specified by Address. The value written to the PCI configuration registe= r is - returned. This function must guarantee that all PCI read and write opera= tions - are serialized. + bitwise OR between the read result and the value specified by OrData, and + writes the result to the 16-bit PCI configuration register specified by = Address. + The value written to the PCI configuration register is returned. This fu= nction + must guarantee that all PCI read and write operations are serialized. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device, F= unction and + @param Address Address that encodes the PCI Segment, Bus, Device, Funct= ion and Register. @param OrData The value to OR with the PCI configuration register. =20 @@ -695,11 +693,11 @@ PciSegmentOr16 ( and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -718,19 +716,19 @@ PciSegmentAnd16 ( /** Performs a bitwise AND of a 16-bit PCI configuration register with a 16-= bit value, followed a bitwise OR with another 16-bit value. - =20 + Reads the 16-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 16-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. - @param AndData The value to AND with the PCI configuration register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. + @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -760,7 +758,7 @@ PciSegmentAndThenOr16 ( If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -795,12 +793,12 @@ PciSegmentBitFieldRead16 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..15. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -821,9 +819,15 @@ PciSegmentBitFieldWrite16 ( } =20 /** - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address.=20 + Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, = writes + the result back to the bit field in the 16-bit port. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise OR between the read result and the value specified by + OrData, and writes the result to the 16-bit PCI configuration register + specified by Address. The value written to the PCI configuration registe= r is + returned. This function must guarantee that all PCI read and write opera= tions + are serialized. Extra left bits in OrData are stripped. =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). @@ -832,7 +836,7 @@ PciSegmentBitFieldWrite16 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -858,31 +862,31 @@ PciSegmentBitFieldOr16 ( } =20 /** - Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, - and writes the result back to the bit field in the 16-bit port. + Reads a bit field in a 16-bit PCI configuration register, performs a bit= wise + AND, writes the result back to the bit field in the 16-bit register. + + Reads the 16-bit PCI configuration register specified by Address, perfor= ms a + bitwise AND between the read result and the value specified by AndData, = and + writes the result to the 16-bit PCI configuration register specified by + Address. The value written to the PCI configuration register is returned. + This function must guarantee that all PCI read and write operations are + serialized. Extra left bits in AndData are stripped. =20 - Reads the 16-bit PCI configuration register specified by Address, - performs a bitwise OR between the read result and the value specified by= OrData, - and writes the result to the 16-bit PCI configuration register specified= by Address. - The value written to the PCI configuration register is returned. - This function must guarantee that all PCI read and write operations are = serialized. - Extra left bits in OrData are stripped. - =20 If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). - If StartBit is greater than 7, then ASSERT(). - If EndBit is greater than 7, then ASSERT(). + If StartBit is greater than 15, then ASSERT(). + If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. - The ordinal of the least significant bit in a byte is = bit 0. + Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. - The ordinal of the most significant bit in a byte is b= it 7. - @param AndData The value to AND with the read value from the PCI conf= iguration register. + Range 0..15. + @param AndData The value to AND with the PCI configuration register. =20 - @return The value written to the PCI configuration register. + @return The value written back to the PCI configuration register. =20 **/ UINT16 @@ -920,7 +924,7 @@ PciSegmentBitFieldAnd16 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..15. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -952,11 +956,11 @@ PciSegmentBitFieldAndThenOr16 ( =20 Reads and returns the 32-bit PCI configuration register specified by Add= ress. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. =20 @return The 32-bit PCI configuration register specified by Address. =20 @@ -977,11 +981,11 @@ PciSegmentRead32 ( =20 Writes the 32-bit PCI configuration register specified by Address with t= he value specified by Value. Value is returned. This function must guarantee that all PCI read and w= rite operations are serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Devic= e, Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, F= unction, and Register. @param Value The value to write. =20 @return The parameter of Value. @@ -1007,11 +1011,11 @@ PciSegmentWrite32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param OrData The value to OR with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -1035,11 +1039,11 @@ PciSegmentOr32 ( and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. =20 @return The value written to the PCI configuration register. @@ -1058,18 +1062,18 @@ PciSegmentAnd32 ( /** Performs a bitwise AND of a 32-bit PCI configuration register with a 32-= bit value, followed a bitwise OR with another 32-bit value. - =20 + Reads the 32-bit PCI configuration register specified by Address, performs a bitwise AND between the read result and the value specified b= y AndData, performs a bitwise OR between the result of the AND operation and the va= lue specified by OrData, and writes the result to the 32-bit PCI configuration register specified= by Address. The value written to the PCI configuration register is returned. This function must guarantee that all PCI read and write operations are = serialized. - =20 + If any reserved bits in Address are set, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). =20 - @param Address The address that encodes the PCI Segment, Bus, Device,= Function, and Register. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param AndData The value to AND with the PCI configuration register. @param OrData The value to OR with the PCI configuration register. =20 @@ -1100,7 +1104,7 @@ PciSegmentAndThenOr32 ( If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). =20 - @param Address The PCI configuration register to read. + @param Address PCI configuration register to read. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1135,12 +1139,12 @@ PciSegmentBitFieldRead32 ( If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit an= d EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. Range 0..31. - @param Value The new value of the bit field. + @param Value New value of the bit field. =20 @return The value written back to the PCI configuration register. =20 @@ -1177,7 +1181,7 @@ PciSegmentBitFieldWrite32 ( If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1206,7 +1210,7 @@ PciSegmentBitFieldOr32 ( Reads a bit field in a 32-bit PCI configuration register, performs a bit= wise AND, and writes the result back to the bit field in the 32-bit register. =20 - =20 + Reads the 32-bit PCI configuration register specified by Address, perfor= ms a bitwise AND between the read result and the value specified by AndData, and writ= es the result to the 32-bit PCI configuration register specified by Address. The value= written to @@ -1219,7 +1223,7 @@ PciSegmentBitFieldOr32 ( If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address Address that encodes the PCI Segment, Bus, Device, Fun= ction, and Register. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1264,7 +1268,7 @@ PciSegmentBitFieldAnd32 ( If AndData is larger than the bitmask value range specified by StartBit = and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit a= nd EndBit, then ASSERT(). =20 - @param Address The PCI configuration register to write. + @param Address PCI configuration register to write. @param StartBit The ordinal of the least significant bit in the bit fi= eld. Range 0..31. @param EndBit The ordinal of the most significant bit in the bit fie= ld. @@ -1306,10 +1310,10 @@ PciSegmentBitFieldAndThenOr32 ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus, Device, + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer receiving the data read. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer receiving the data read. =20 @return Size =20 @@ -1404,10 +1408,10 @@ PciSegmentReadBuffer ( If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). =20 - @param StartAddress The starting address that encodes the PCI Segment,= Bus, Device, + @param StartAddress Starting address that encodes the PCI Segment, Bus= , Device, Function and Register. - @param Size The size in bytes of the transfer. - @param Buffer The pointer to a buffer containing the data to wri= te. + @param Size Size in bytes of the transfer. + @param Buffer Pointer to a buffer containing the data to write. =20 @return The parameter of Size. =20 --=20 2.12.2.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel