From nobody Fri Dec 27 02:01:36 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1504081290483567.8955291159422; Wed, 30 Aug 2017 01:21:30 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 785D621E95E1F; Wed, 30 Aug 2017 01:18:43 -0700 (PDT) Received: from mail-wm0-x22a.google.com (mail-wm0-x22a.google.com [IPv6:2a00:1450:400c:c09::22a]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8066921CE748D for ; Wed, 30 Aug 2017 01:18:42 -0700 (PDT) Received: by mail-wm0-x22a.google.com with SMTP id e62so41193wma.0 for ; Wed, 30 Aug 2017 01:21:23 -0700 (PDT) Received: from localhost.localdomain ([105.133.189.215]) by smtp.gmail.com with ESMTPSA id h8sm3051642wma.46.2017.08.30.01.21.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 30 Aug 2017 01:21:20 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=w+mcBc8HJUBKAOGbwM5mTjs+aOMJTAFuhmnMjx7c4Yw=; b=NF9aVs0KvJRmM4EU2ZBsvV82CBqtFsU0ShXPiePlRgBZ18qfpL+EwHEHz7oJGaNnqD gxnuDW27hsZRH+w4XpI/zXBcaYGYtytmP/ANSAJ0NlJ+X4EocHJLrRjhFdPpu2tZ5z07 /TABMe8R92ZiZ7iHx1CQI8XHqFst46ANgiYD0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=w+mcBc8HJUBKAOGbwM5mTjs+aOMJTAFuhmnMjx7c4Yw=; b=NDCkfSzj6fFskwGxKeR8Fic4TJurL8OXq2wkkOFLJa8cJTVClCU9DB4EO1SKHn3HUb FGpZSDvIPgPtCgTw9pa1iL++Yrga9NRLLsBIuA9WgwhOfkFF+8d78CcnZTZ8VFc45a+d xbHeLNevAHwuikY99ComNlh+ExqKM6dhaBDRH2o1ukif/fg4QNLmrl2wy0roUihUpPvO jJu27/CvWEW4E0XtqnrpDJaUG26NAKtI7h9yxdaaNmTxhwis8EydkjmuSreQ0Cruy48J lAO+uEpV16wk/NmcOpsSDicwO2LiHuSTIQRBgLSoWJMNoXbepTtt8Pb2kfN0YtKNDUFo W+Og== X-Gm-Message-State: AHYfb5i86IylfX9Ntc8V9e/2AlxmrdoVeo94OlK50fQITn2wc39tP1m0 n7nVz9ABgQqGMvBUjFMPsQ== X-Received: by 10.28.129.67 with SMTP id c64mr883699wmd.79.1504081282015; Wed, 30 Aug 2017 01:21:22 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Date: Wed, 30 Aug 2017 09:21:05 +0100 Message-Id: <20170830082108.7470-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170830082108.7470-1-ard.biesheuvel@linaro.org> References: <20170830082108.7470-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH 3/6] EmbeddedPkg: implement NonCoherentDmaLib based on ArmDmaLib X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The non-coherent DmaLib implementation in ArmDmaLib no longer relies on anything in ArmPkg. So clone it into EmbeddedPkg, and rename it to NonCoherentDmaLib. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- EmbeddedPkg/EmbeddedPkg.dsc | 1 + EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c | 491 ++++++++= ++++++++++++ EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf | 50 ++ 3 files changed, 542 insertions(+) diff --git a/EmbeddedPkg/EmbeddedPkg.dsc b/EmbeddedPkg/EmbeddedPkg.dsc index 84c5a842e37e..012721a332f4 100644 --- a/EmbeddedPkg/EmbeddedPkg.dsc +++ b/EmbeddedPkg/EmbeddedPkg.dsc @@ -251,6 +251,7 @@ [Components.common] EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf EmbeddedPkg/Library/LzmaHobCustomDecompressLib/LzmaHobCustomDecompressLi= b.inf EmbeddedPkg/Library/CoherentDmaLib/CoherentDmaLib.inf + EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf EmbeddedPkg/Library/DxeDtPlatformDtbLoaderLibDefault/DxeDtPlatformDtbLoa= derLibDefault.inf =20 EmbeddedPkg/Ebl/Ebl.inf diff --git a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c b/Em= beddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c new file mode 100644 index 000000000000..08b9c017f426 --- /dev/null +++ b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.c @@ -0,0 +1,491 @@ +/** @file + + Generic non-coherent implementation of DmaLib.h + + Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+ Copyright (c) 2015 - 2017, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made + available under the terms and conditions of the BSD License which + accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR + IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +typedef struct { + EFI_PHYSICAL_ADDRESS HostAddress; + VOID *BufferAddress; + UINTN NumberOfBytes; + DMA_MAP_OPERATION Operation; + BOOLEAN DoubleBuffer; +} MAP_INFO_INSTANCE; + + +typedef struct { + LIST_ENTRY Link; + VOID *HostAddress; + UINTN NumPages; + UINT64 Attributes; +} UNCACHED_ALLOCATION; + +STATIC EFI_CPU_ARCH_PROTOCOL *mCpu; +STATIC LIST_ENTRY UncachedAllocationList; + +STATIC +PHYSICAL_ADDRESS +HostToDeviceAddress ( + IN VOID *Address + ) +{ + return (PHYSICAL_ADDRESS)(UINTN)Address + PcdGet64 (PcdDmaDeviceOffset); +} + +/** + Provides the DMA controller-specific addresses needed to access system m= emory. + + Operation is relative to the DMA bus master. + + @param Operation Indicates if the bus master is going to re= ad or + write to system memory. + @param HostAddress The system memory address to map to the DMA + controller. + @param NumberOfBytes On input the number of bytes to map. On ou= tput + the number of bytes that were mapped. + @param DeviceAddress The resulting map address for the bus mast= er + controller to use to access the host's + HostAddress. + @param Mapping A resulting value to pass to Unmap(). + + @retval EFI_SUCCESS The range was mapped for the returned + NumberOfBytes. + @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a comm= on + buffer. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The request could not be completed due to = a lack + of resources. + @retval EFI_DEVICE_ERROR The system hardware could not map the requ= ested + address. + +**/ +EFI_STATUS +EFIAPI +DmaMap ( + IN DMA_MAP_OPERATION Operation, + IN VOID *HostAddress, + IN OUT UINTN *NumberOfBytes, + OUT PHYSICAL_ADDRESS *DeviceAddress, + OUT VOID **Mapping + ) +{ + EFI_STATUS Status; + MAP_INFO_INSTANCE *Map; + VOID *Buffer; + EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor; + UINTN AllocSize; + + if (HostAddress =3D=3D NULL || + NumberOfBytes =3D=3D NULL || + DeviceAddress =3D=3D NULL || + Mapping =3D=3D NULL ) { + return EFI_INVALID_PARAMETER; + } + + if (Operation >=3D MapOperationMaximum) { + return EFI_INVALID_PARAMETER; + } + + *DeviceAddress =3D HostToDeviceAddress (HostAddress); + + // Remember range so we can flush on the other side + Map =3D AllocatePool (sizeof (MAP_INFO_INSTANCE)); + if (Map =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + if (Operation !=3D MapOperationBusMasterRead && + ((((UINTN)HostAddress & (mCpu->DmaBufferAlignment - 1)) !=3D 0) || + ((*NumberOfBytes & (mCpu->DmaBufferAlignment - 1)) !=3D 0))) { + + // Get the cacheability of the region + Status =3D gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDesc= riptor); + if (EFI_ERROR(Status)) { + goto FreeMapInfo; + } + + // If the mapped buffer is not an uncached buffer + if ((GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) !=3D = 0) { + // + // Operations of type MapOperationBusMasterCommonBuffer are only all= owed + // on uncached buffers. + // + if (Operation =3D=3D MapOperationBusMasterCommonBuffer) { + DEBUG ((DEBUG_ERROR, + "%a: Operation type 'MapOperationBusMasterCommonBuffer' is only " + "supported\non memory regions that were allocated using " + "DmaAllocateBuffer ()\n", __FUNCTION__)); + Status =3D EFI_UNSUPPORTED; + goto FreeMapInfo; + } + + // + // If the buffer does not fill entire cache lines we must double buf= fer + // into a suitably aligned allocation that allows us to invalidate t= he + // cache without running the risk of corrupting adjacent unrelated d= ata. + // Note that pool allocations are guaranteed to be 8 byte aligned, so + // we only have to add (alignment - 8) worth of padding. + // + Map->DoubleBuffer =3D TRUE; + AllocSize =3D ALIGN_VALUE (*NumberOfBytes, mCpu->DmaBufferAlignment)= + + (mCpu->DmaBufferAlignment - 8); + Map->BufferAddress =3D AllocatePool (AllocSize); + if (Map->BufferAddress =3D=3D NULL) { + Status =3D EFI_OUT_OF_RESOURCES; + goto FreeMapInfo; + } + + Buffer =3D ALIGN_POINTER (Map->BufferAddress, mCpu->DmaBufferAlignme= nt); + *DeviceAddress =3D HostToDeviceAddress (Buffer); + + // + // Get rid of any dirty cachelines covering the double buffer. This + // prevents them from being written back unexpectedly, potentially + // overwriting the data we receive from the device. + // + mCpu->FlushDataCache (mCpu, (UINTN)Buffer, *NumberOfBytes, + EfiCpuFlushTypeWriteBack); + } else { + Map->DoubleBuffer =3D FALSE; + } + } else { + Map->DoubleBuffer =3D FALSE; + + DEBUG_CODE_BEGIN (); + + // + // The operation type check above only executes if the buffer happens = to be + // misaligned with respect to CWG, but even if it is aligned, we shoul= d not + // allow arbitrary buffers to be used for creating consistent mappings. + // So duplicate the check here when running in DEBUG mode, just to ass= ert + // that we are not trying to create a consistent mapping for cached me= mory. + // + Status =3D gDS->GetMemorySpaceDescriptor ((UINTN)HostAddress, &GcdDesc= riptor); + ASSERT_EFI_ERROR(Status); + + ASSERT (Operation !=3D MapOperationBusMasterCommonBuffer || + (GcdDescriptor.Attributes & (EFI_MEMORY_WB | EFI_MEMORY_WT)) = =3D=3D 0); + + DEBUG_CODE_END (); + + // Flush the Data Cache (should not have any effect if the memory regi= on is + // uncached) + mCpu->FlushDataCache (mCpu, (UINTN)HostAddress, *NumberOfBytes, + EfiCpuFlushTypeWriteBackInvalidate); + } + + Map->HostAddress =3D (UINTN)HostAddress; + Map->NumberOfBytes =3D *NumberOfBytes; + Map->Operation =3D Operation; + + *Mapping =3D Map; + + return EFI_SUCCESS; + +FreeMapInfo: + FreePool (Map); + + return Status; +} + + +/** + Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or + DmaMapBusMasterCommonBuffer() operation and releases any corresponding + resources. + + @param Mapping The mapping value returned from DmaMap*(). + + @retval EFI_SUCCESS The range was unmapped. + @retval EFI_DEVICE_ERROR The data was not committed to the target s= ystem + memory. + @retval EFI_INVALID_PARAMETER An inconsistency was detected between the + mapping type and the DoubleBuffer field + +**/ +EFI_STATUS +EFIAPI +DmaUnmap ( + IN VOID *Mapping + ) +{ + MAP_INFO_INSTANCE *Map; + EFI_STATUS Status; + VOID *Buffer; + + if (Mapping =3D=3D NULL) { + ASSERT (FALSE); + return EFI_INVALID_PARAMETER; + } + + Map =3D (MAP_INFO_INSTANCE *)Mapping; + + Status =3D EFI_SUCCESS; + if (Map->DoubleBuffer) { + ASSERT (Map->Operation =3D=3D MapOperationBusMasterWrite); + + if (Map->Operation !=3D MapOperationBusMasterWrite) { + Status =3D EFI_INVALID_PARAMETER; + } else { + Buffer =3D ALIGN_POINTER (Map->BufferAddress, mCpu->DmaBufferAlignme= nt); + + mCpu->FlushDataCache (mCpu, (UINTN)Buffer, Map->NumberOfBytes, + EfiCpuFlushTypeInvalidate); + + CopyMem ((VOID *)(UINTN)Map->HostAddress, Buffer, Map->NumberOfBytes= ); + + FreePool (Map->BufferAddress); + } + } else { + if (Map->Operation =3D=3D MapOperationBusMasterWrite) { + // + // Make sure we read buffer from uncached memory and not the cache + // + mCpu->FlushDataCache (mCpu, Map->HostAddress, Map->NumberOfBytes, + EfiCpuFlushTypeInvalidate); + } + } + + FreePool (Map); + + return Status; +} + +/** + Allocates pages that are suitable for an DmaMap() of type + MapOperationBusMasterCommonBuffer mapping. + + @param MemoryType The type of memory to allocate, + EfiBootServicesData or EfiRuntimeServicesD= ata. + @param Pages The number of pages to allocate. + @param HostAddress A pointer to store the base system memory + address of the allocated range. + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +EFI_STATUS +EFIAPI +DmaAllocateBuffer ( + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + OUT VOID **HostAddress + ) +{ + return DmaAllocateAlignedBuffer (MemoryType, Pages, 0, HostAddress); +} + +/** + Allocates pages that are suitable for an DmaMap() of type + MapOperationBusMasterCommonBuffer mapping, at the requested alignment. + + @param MemoryType The type of memory to allocate, + EfiBootServicesData or EfiRuntimeServicesD= ata. + @param Pages The number of pages to allocate. + @param Alignment Alignment in bytes of the base of the retu= rned + buffer (must be a power of 2) + @param HostAddress A pointer to store the base system memory + address of the allocated range. + + @retval EFI_SUCCESS The requested memory pages were allocated. + @retval EFI_INVALID_PARAMETER One or more parameters are invalid. + @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. + +**/ +EFI_STATUS +EFIAPI +DmaAllocateAlignedBuffer ( + IN EFI_MEMORY_TYPE MemoryType, + IN UINTN Pages, + IN UINTN Alignment, + OUT VOID **HostAddress + ) +{ + EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor; + VOID *Allocation; + UINT64 MemType; + UNCACHED_ALLOCATION *Alloc; + EFI_STATUS Status; + + if (Alignment =3D=3D 0) { + Alignment =3D EFI_PAGE_SIZE; + } + + if (HostAddress =3D=3D NULL || + (Alignment & (Alignment - 1)) !=3D 0) { + return EFI_INVALID_PARAMETER; + } + + if (MemoryType =3D=3D EfiBootServicesData) { + Allocation =3D AllocateAlignedPages (Pages, Alignment); + } else if (MemoryType =3D=3D EfiRuntimeServicesData) { + Allocation =3D AllocateAlignedRuntimePages (Pages, Alignment); + } else { + return EFI_INVALID_PARAMETER; + } + + if (Allocation =3D=3D NULL) { + return EFI_OUT_OF_RESOURCES; + } + + // Get the cacheability of the region + Status =3D gDS->GetMemorySpaceDescriptor ((UINTN)Allocation, &GcdDescrip= tor); + if (EFI_ERROR(Status)) { + goto FreeBuffer; + } + + // Choose a suitable uncached memory type that is supported by the region + if (GcdDescriptor.Capabilities & EFI_MEMORY_WC) { + MemType =3D EFI_MEMORY_WC; + } else if (GcdDescriptor.Capabilities & EFI_MEMORY_UC) { + MemType =3D EFI_MEMORY_UC; + } else { + Status =3D EFI_UNSUPPORTED; + goto FreeBuffer; + } + + Alloc =3D AllocatePool (sizeof *Alloc); + if (Alloc =3D=3D NULL) { + goto FreeBuffer; + } + + Alloc->HostAddress =3D Allocation; + Alloc->NumPages =3D Pages; + Alloc->Attributes =3D GcdDescriptor.Attributes; + + InsertHeadList (&UncachedAllocationList, &Alloc->Link); + + // Remap the region with the new attributes + Status =3D gDS->SetMemorySpaceAttributes ((PHYSICAL_ADDRESS)(UINTN)Alloc= ation, + EFI_PAGES_TO_SIZE (Pages), + MemType); + if (EFI_ERROR (Status)) { + goto FreeAlloc; + } + + Status =3D mCpu->FlushDataCache (mCpu, + (PHYSICAL_ADDRESS)(UINTN)Allocation, + EFI_PAGES_TO_SIZE (Pages), + EfiCpuFlushTypeInvalidate); + if (EFI_ERROR (Status)) { + goto FreeAlloc; + } + + *HostAddress =3D Allocation; + + return EFI_SUCCESS; + +FreeAlloc: + RemoveEntryList (&Alloc->Link); + FreePool (Alloc); + +FreeBuffer: + FreePages (Allocation, Pages); + return Status; +} + + +/** + Frees memory that was allocated with DmaAllocateBuffer(). + + @param Pages The number of pages to free. + @param HostAddress The base system memory address of the allo= cated + range. + + @retval EFI_SUCCESS The requested memory pages were freed. + @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress = and + Pages was not allocated with + DmaAllocateBuffer(). + +**/ +EFI_STATUS +EFIAPI +DmaFreeBuffer ( + IN UINTN Pages, + IN VOID *HostAddress + ) +{ + LIST_ENTRY *Link; + UNCACHED_ALLOCATION *Alloc; + BOOLEAN Found; + EFI_STATUS Status; + + if (HostAddress =3D=3D NULL) { + return EFI_INVALID_PARAMETER; + } + + for (Link =3D GetFirstNode (&UncachedAllocationList), Found =3D FALSE; + !IsNull (&UncachedAllocationList, Link); + Link =3D GetNextNode (&UncachedAllocationList, Link)) { + + Alloc =3D BASE_CR (Link, UNCACHED_ALLOCATION, Link); + if (Alloc->HostAddress =3D=3D HostAddress && Alloc->NumPages =3D=3D Pa= ges) { + Found =3D TRUE; + break; + } + } + + if (!Found) { + ASSERT (FALSE); + return EFI_INVALID_PARAMETER; + } + + RemoveEntryList (&Alloc->Link); + + Status =3D gDS->SetMemorySpaceAttributes ((PHYSICAL_ADDRESS)(UINTN)HostA= ddress, + EFI_PAGES_TO_SIZE (Pages), + Alloc->Attributes); + if (EFI_ERROR (Status)) { + goto FreeAlloc; + } + + // + // If we fail to restore the original attributes, it is better to leak t= he + // memory than to return it to the heap + // + FreePages (HostAddress, Pages); + +FreeAlloc: + FreePool (Alloc); + return Status; +} + + +EFI_STATUS +EFIAPI +NonCoherentDmaLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + InitializeListHead (&UncachedAllocationList); + + // Get the Cpu protocol for later use + return gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&mC= pu); +} diff --git a/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf b/= EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf new file mode 100644 index 000000000000..9f430d6c3721 --- /dev/null +++ b/EmbeddedPkg/Library/NonCoherentDmaLib/NonCoherentDmaLib.inf @@ -0,0 +1,50 @@ +#/** @file +# +# Generic non-coherent implementation of DmaLib.h +# +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+# Copyright (c) 2015 - 2017, Linaro, Ltd. All rights reserved.
+# +# This program and the accompanying materials are licensed and made +# available under the terms and conditions of the BSD License which +# accompanies this distribution. The full text of the license may be +# found at http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR +# IMPLIED. +# +#**/ + +[Defines] + INF_VERSION =3D 0x00010019 + BASE_NAME =3D NonCoherentDmaLib + FILE_GUID =3D 43ad4920-db15-4e24-9889-2db568431fbd + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D DmaLib + CONSTRUCTOR =3D NonCoherentDmaLibConstructor + +[Sources] + NonCoherentDmaLib.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + DxeServicesTableLib + IoLib + MemoryAllocationLib + UefiBootServicesTableLib + +[Protocols] + gEfiCpuArchProtocolGuid + +[Pcd] + gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset + +[Depex] + gEfiCpuArchProtocolGuid --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel