On Thu, Aug 31, 2017 at 02:08:29PM +0100, Ard Biesheuvel wrote:
> The CPU affinity for the vGIC maintenance interrupt was set to
> CPUs #0 .. #3 for no good reason. So set it to all CPUs instead.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/AMD/OverdriveBoard/OverdriveBoardDeviceTree/OverdriveBoardDeviceTree.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Platform/AMD/OverdriveBoard/OverdriveBoardDeviceTree/OverdriveBoardDeviceTree.dts b/Platform/AMD/OverdriveBoard/OverdriveBoardDeviceTree/OverdriveBoardDeviceTree.dts
> index 81477fe43cdd..e57e702029ba 100644
> --- a/Platform/AMD/OverdriveBoard/OverdriveBoardDeviceTree/OverdriveBoardDeviceTree.dts
> +++ b/Platform/AMD/OverdriveBoard/OverdriveBoardDeviceTree/OverdriveBoardDeviceTree.dts
> @@ -45,7 +45,7 @@
> <0x0 0xe112f000 0x0 0x2000>,
> <0x0 0xe1140000 0x0 0x2000>,
> <0x0 0xe1160000 0x0 0x2000>;
> - interrupts = <GIC_PPI 0x9 (IRQ_TYPE_LEVEL_HIGH | GIC_CPU_MASK(4))>;
> + interrupts = <GIC_PPI 0x9 (IRQ_TYPE_LEVEL_HIGH | GIC_CPU_MASK(8))>;
> ranges = <0x0 0x0 0x0 0xe1100000 0x0 0x100000>;
>
> msi: v2m@e0080000 {
> --
> 2.11.0
>
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