From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369517829303.11355617237484; Mon, 25 Sep 2017 12:58:37 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 25C952095E50E; Mon, 25 Sep 2017 12:55:25 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 582C520945BDD for ; Mon, 25 Sep 2017 12:55:22 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9356B81DFF; Mon, 25 Sep 2017 19:58:33 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id EC23D60176; Mon, 25 Sep 2017 19:58:31 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9356B81DFF Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:18 +0200 Message-Id: <20170925195824.10866-2-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 25 Sep 2017 19:58:33 +0000 (UTC) Subject: [edk2] [PATCH 1/7] MdePkg/IndustryStandard/Pci23: add vendor-specific capability header X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Michael D Kinney , Ruiyu Ni , Liming Gao MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Revision 2.2 of the PCI Spec defines Capability IDs 0 through 6, inclusive, in Appendix H. It reserves IDs 7 through 255. Revision 2.3 of the PCI Spec adds Capability IDs 7 through 0xC, inclusive, in Appendix H. Capability ID 9 stands for "Vendor Specific". Add the EFI_PCI_CAPABILITY_ID_VENDOR macro and the EFI_PCI_CAPABILITY_VENDOR_HDR structure type to MdePkg/IndustryStandard, in order to describe this capability header. Cc: Jordan Justen Cc: Liming Gao Cc: Marcel Apfelbaum Cc: Michael D Kinney Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek Reviewed-by: Liming Gao --- MdePkg/Include/IndustryStandard/Pci23.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/MdePkg/Include/IndustryStandard/Pci23.h b/MdePkg/Include/Indus= tryStandard/Pci23.h index 467354429e06..87bd16375c02 100644 --- a/MdePkg/Include/IndustryStandard/Pci23.h +++ b/MdePkg/Include/IndustryStandard/Pci23.h @@ -91,8 +91,9 @@ /// /// PCI Capability List IDs and records. /// #define EFI_PCI_CAPABILITY_ID_PCIX 0x07 +#define EFI_PCI_CAPABILITY_ID_VENDOR 0x09 =20 #pragma pack(1) /// /// PCI-X Capabilities List,=20 @@ -115,8 +116,17 @@ typedef struct { UINT32 SplitTransCtrlRegUp; UINT32 SplitTransCtrlRegDn; } EFI_PCI_CAPABILITY_PCIX_BRDG; =20 +/// +/// Vendor Specific Capability Header +/// Table H-1: Capability IDs, PCI Local Bus Specification, 2.3 +/// +typedef struct { + EFI_PCI_CAPABILITY_HDR Hdr; + UINT8 Length; +} EFI_PCI_CAPABILITY_VENDOR_HDR; + #pragma pack() =20 #define PCI_CODE_TYPE_EFI_IMAGE 0x03 =20 --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 150636951988853.03741039704596; Mon, 25 Sep 2017 12:58:39 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6CBC42095E512; Mon, 25 Sep 2017 12:55:25 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DE0F120945BD5 for ; Mon, 25 Sep 2017 12:55:23 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 32115C047B7F; Mon, 25 Sep 2017 19:58:35 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id EDFF060184; Mon, 25 Sep 2017 19:58:33 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 32115C047B7F Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:19 +0200 Message-Id: <20170925195824.10866-3-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Mon, 25 Sep 2017 19:58:35 +0000 (UTC) Subject: [edk2] [PATCH 2/7] OvmfPkg/IndustryStandard: define PCI Capabilities for QEMU's PCI Bridges X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" QEMU has recently gained the ability to provide various hints about its PCI bridges. The hints take the form of vendor-specific PCI capabilities. Define macros and types under "OvmfPkg/Include/IndustryStandard" to describe these capabilities. The definitions correspond to "docs/pcie_pci_bridge.txt" in the QEMU tree. Said documentation was added in the last commit of the following series: a35fe226558a hw/pci: introduce pcie-pci-bridge device 70e1ee59bb94 hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware 226263fb5cda hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port c1800a162765 docs: update documentation considering PCIE-PCI bridge We are going to parse the Resource Reservation Capability in OvmfPkg/PciHotPlugInitDxe, and return the reservation requests to PciBusDxe. Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h | 60 ++++++++= ++++++++++++ 1 file changed, 60 insertions(+) diff --git a/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h b= /OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h new file mode 100644 index 000000000000..bf2373c556c4 --- /dev/null +++ b/OvmfPkg/Include/IndustryStandard/QemuPciBridgeCapabilities.h @@ -0,0 +1,60 @@ +/** @file + Macro and type definitions for QEMU's Red Hat vendor-specific PCI + capabilities that provide various hints about PCI Bridges. + + Refer to "docs/pcie_pci_bridge.txt" in the QEMU source directory. + + Copyright (C) 2017, Red Hat, Inc. + + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WI= THOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ + +#ifndef __QEMU_PCI_BRIDGE_CAPABILITIES_H__ +#define __QEMU_PCI_BRIDGE_CAPABILITIES_H__ + +#include + +// +// The hints apply to PCI Bridges whose PCI_DEVICE_INDEPENDENT_REGION.Vend= orId +// equals the following value. +// +#define QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT 0x1B36 + +// +// Common capability header for all hints. +// +#pragma pack (1) +typedef struct { + EFI_PCI_CAPABILITY_VENDOR_HDR VendorHdr; + UINT8 Type; +} QEMU_PCI_BRIDGE_CAPABILITY_HDR; +#pragma pack () + +// +// Values defined for QEMU_PCI_BRIDGE_CAPABILITY_HDR.Type. +// +#define QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION 0x01 + +// +// PCI Resource Reservation structure for when +// QEMU_PCI_BRIDGE_CAPABILITY_HDR.Type equals +// QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION. +// +#pragma pack (1) +typedef struct { + QEMU_PCI_BRIDGE_CAPABILITY_HDR BridgeHdr; + UINT32 BusNumbers; + UINT64 Io; + UINT32 NonPrefetchable32BitMmio; + UINT32 Prefetchable32BitMmio; + UINT64 Prefetchable64BitMmio; +} QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION; +#pragma pack () + +#endif --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369522264744.1285683247556; Mon, 25 Sep 2017 12:58:42 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id AE5282095E518; Mon, 25 Sep 2017 12:55:28 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 83A642095E518 for ; Mon, 25 Sep 2017 12:55:25 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C6C847EA8E; Mon, 25 Sep 2017 19:58:36 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8D43460184; Mon, 25 Sep 2017 19:58:35 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com C6C847EA8E Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:20 +0200 Message-Id: <20170925195824.10866-4-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 25 Sep 2017 19:58:36 +0000 (UTC) Subject: [edk2] [PATCH 3/7] OvmfPkg/PciHotPlugInitDxe: clean up protocol usage comment X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The driver always produces an instance of the EFI_PCI_HOT_PLUG_INIT_PROTOCOL. The "SOMETIMES_PRODUCES" remark is an oversight from the original v1->v2 patch update; v2 should have stated "ALWAYS_PRODUCES": http://mid.mail-archive.com/1468242274-12686-5-git-send-email-lersek@redhat= .com > Notes: > v2: > - drop the PcdPciBusHotplugDeviceSupport check, and the PcdLib > dependency with it [Jordan] Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Fixes: 8aba40b79267df761bd24d6874ae87f47a7bd3de Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf b/OvmfPkg/PciHotP= lugInitDxe/PciHotPlugInit.inf index 641ee2cad995..ea19206219b7 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf @@ -35,8 +35,8 @@ [LibraryClasses] UefiBootServicesTableLib UefiDriverEntryPoint =20 [Protocols] - gEfiPciHotPlugInitProtocolGuid ## SOMETIMES_PRODUCES + gEfiPciHotPlugInitProtocolGuid ## ALWAYS_PRODUCES =20 [Depex] TRUE --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369525067106.99015715742667; Mon, 25 Sep 2017 12:58:45 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id EDA782095E51D; Mon, 25 Sep 2017 12:55:28 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2073121D046AA for ; Mon, 25 Sep 2017 12:55:27 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 65ECE883D8; Mon, 25 Sep 2017 19:58:38 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2CE5760176; Mon, 25 Sep 2017 19:58:36 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 65ECE883D8 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:21 +0200 Message-Id: <20170925195824.10866-5-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 25 Sep 2017 19:58:38 +0000 (UTC) Subject: [edk2] [PATCH 4/7] OvmfPkg/PciHotPlugInitDxe: clean up addr. range for non-prefetchable MMIO X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The non-prefetchable MMIO aperture of a bridge can never fall outside of the 32-bit address space. Namely, the MemoryBase and MemoryLimit fields in PCI_BRIDGE_CONTROL_REGISTER have type UINT16, and based on the PCI-to-PCI Bridge Architecture Spec, Chapter 3.2, the actual MMIO aperture is determined as in: NonPrefetchMemoryBase =3D (((MemoryBase & 0xFFF0u) >> 4) << 20) | 0x00000 NonPrefetchMemoryLimit =3D (((MemoryLimit & 0xFFF0u) >> 4) << 20) | 0xFFFFF In "OvmfPkg/PciHotPlugInitDxe", the "mPadding.MmioPadding.AddrSpaceGranularity" field is currently initialized to 64. According to the above, this is useless generality: a non-prefetchable MMIO reservation may only be satisfied from 32-bit address space. Update the field to 32. In practice this change makes no difference, because PciBusDxe already enforces the 32-bit limitation when it sees "non-prefetchable" from (SpecificFlag=3D=3D0). Quoting commit 8aba40b79267 ("OvmfPkg: add PciHotPlugInitDxe", 2016-06-30): "regardless of our request for 64-bit MMIO reservation, it is downgraded to 32-bit". (See the Platform Init Spec 1.6, Volume 5, - Table 8. "ACPI 2.0 & 3.0 QWORD Address Space Descriptor Usage", and - Table 11. "Memory Resource Flag (Resource Type =3D 0) Usage", for an explanation of the "mPadding.MmioPadding" fields.) Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Fixes: 8aba40b79267df761bd24d6874ae87f47a7bd3de Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c b/OvmfPkg/PciHotPlu= gInitDxe/PciHotPlugInit.c index 2265b8c7e12a..5c98f806def6 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c @@ -67,10 +67,10 @@ STATIC CONST RESOURCE_PADDING mPadding =3D { 0, // GenFlag: // ignored 0, // SpecificFlag: // non-prefetchable - 64, // AddrSpaceGranularity: - // reserve 64-bit aperture + 32, // AddrSpaceGranularity: + // reserve 32-bit aperture 0, // AddrRangeMin: // ignored SIZE_2MB - 1, // AddrRangeMax: // align at 2MB --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369527715940.3843464736051; Mon, 25 Sep 2017 12:58:47 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 41B3A2095E524; Mon, 25 Sep 2017 12:55:31 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B59B42095E51D for ; Mon, 25 Sep 2017 12:55:28 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 081A75D697; Mon, 25 Sep 2017 19:58:40 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id C21B460184; Mon, 25 Sep 2017 19:58:38 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 081A75D697 Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:22 +0200 Message-Id: <20170925195824.10866-6-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Mon, 25 Sep 2017 19:58:40 +0000 (UTC) Subject: [edk2] [PATCH 5/7] OvmfPkg/PciHotPlugInitDxe: generalize RESOURCE_PADDING composition X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" PciHotPlugInitDxe has a static variable called "mPadding" (of type RESOURCE_PADDING), which describes two constant resource reservations: - MmioPadding: 2MB of non-prefetchable (hence 32-bit) MMIO space, - IoPadding: 512B of IO space. In the GetResourcePadding() member function of EFI_PCI_HOT_PLUG_INIT_PROTOCOL, the driver outputs a dynamically allocated verbatim copy of "mPadding", for PciBusDxe to consume in its ApplyResourcePadding() function. In a later patch, we're going to compose the set of resource reservations dynamically, based on QEMU hints. Generalize the RESOURCE_PADDING structure so that we may generate (or not generate) each resource type individually: - Replace the named "MmioPadding" and "IoPadding" fields in RESOURCE_PADDING with an array of descriptors, - remove "mPadding", - in GetResourcePadding(), request the same (default) reservations as before, as if we attempted and failed to fetch the QEMU hints. Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf | 1 + OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 163 ++++++++++++-------- 2 files changed, 99 insertions(+), 65 deletions(-) diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf b/OvmfPkg/PciHotP= lugInitDxe/PciHotPlugInit.inf index ea19206219b7..91729ae1ed04 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf @@ -28,8 +28,9 @@ [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec =20 [LibraryClasses] + BaseMemoryLib DebugLib DevicePathLib MemoryAllocationLib UefiBootServicesTableLib diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c b/OvmfPkg/PciHotPlu= gInitDxe/PciHotPlugInit.c index 5c98f806def6..b1b2c5cd8ddc 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c @@ -14,8 +14,9 @@ **/ =20 #include =20 +#include #include #include #include #include @@ -41,83 +42,61 @@ STATIC EFI_PCI_HOT_PLUG_INIT_PROTOCOL mPciHotPlugInit; // // This structure is interpreted by the ApplyResourcePadding() function in= the // edk2 PCI Bus UEFI_DRIVER. // +// We can request padding for at most four resource types, each of which is +// optional, independently of the others: +// (a) bus numbers, +// (b) IO space, +// (c) non-prefetchable MMIO space (32-bit only), +// (d) prefetchable MMIO space (either 32-bit or 64-bit, never both). +// #pragma pack (1) typedef struct { - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR MmioPadding; - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR IoPadding; + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Padding[4]; EFI_ACPI_END_TAG_DESCRIPTOR EndDesc; } RESOURCE_PADDING; #pragma pack () =20 -STATIC CONST RESOURCE_PADDING mPadding =3D { - // - // MmioPadding - // - { - ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc - (UINT16)( // Len - sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - - OFFSET_OF ( - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR, - ResType - ) - ), - ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType - 0, // GenFlag: - // ignored - 0, // SpecificFlag: - // non-prefetchable - 32, // AddrSpaceGranularity: - // reserve 32-bit aperture - 0, // AddrRangeMin: - // ignored - SIZE_2MB - 1, // AddrRangeMax: - // align at 2MB - 0, // AddrTranslationOffset: - // ignored - SIZE_2MB // AddrLen: - // 2MB padding - }, =20 - // - // IoPadding - // - { - ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc - (UINT16)( // Len - sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - - OFFSET_OF ( - EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR, - ResType - ) - ), - ACPI_ADDRESS_SPACE_TYPE_IO,// ResType - 0, // GenFlag: - // ignored - 0, // SpecificFlag: - // ignored - 0, // AddrSpaceGranularity: - // ignored - 0, // AddrRangeMin: - // ignored - 512 - 1, // AddrRangeMax: - // align at 512 IO ports - 0, // AddrTranslationOffset: - // ignored - 512 // AddrLen: - // 512 IO ports - }, +/** + Initialize a RESOURCE_PADDING object. + + @param[out] ResourcePadding The caller-allocated RESOURCE_PADDING objec= t to + initialize. +**/ +STATIC +VOID +InitializeResourcePadding ( + OUT RESOURCE_PADDING *ResourcePadding + ) +{ + UINTN Index; + + ZeroMem (ResourcePadding, sizeof *ResourcePadding); =20 // - // EndDesc + // Fill in the Padding fields that don't vary across resource types. // - { - ACPI_END_TAG_DESCRIPTOR, // Desc - 0 // Checksum: to be ignored + for (Index =3D 0; Index < ARRAY_SIZE (ResourcePadding->Padding); ++Index= ) { + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor; + + Descriptor =3D ResourcePadding->Padding + Index; + Descriptor->Desc =3D ACPI_ADDRESS_SPACE_DESCRIPTOR; + Descriptor->Len =3D (UINT16)( + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - + OFFSET_OF ( + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR, + ResType + ) + ); } -}; + + // + // Fill in the End Tag. + // + ResourcePadding->EndDesc.Desc =3D ACPI_END_TAG_DESCRIPTOR; +} =20 =20 /** Returns a list of root Hot Plug Controllers (HPCs) that require @@ -274,8 +253,13 @@ GetResourcePadding ( OUT VOID **Padding, OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes ) { + BOOLEAN DefaultIo; + BOOLEAN DefaultMmio; + RESOURCE_PADDING ReservationRequest; + EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource; + DEBUG_CODE ( EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address; CHAR16 *DevicePathString; =20 @@ -294,9 +278,58 @@ GetResourcePadding ( if (HpcState =3D=3D NULL || Padding =3D=3D NULL || Attributes =3D=3D NUL= L) { return EFI_INVALID_PARAMETER; } =20 - *Padding =3D AllocateCopyPool (sizeof mPadding, &mPadding); + DefaultIo =3D TRUE; + DefaultMmio =3D TRUE; + + // + // Init ReservationRequest, and point FirstResource one past the last + // descriptor entry. We're going to build the entries backwards from + // ReservationRequest.EndDesc. + // + InitializeResourcePadding (&ReservationRequest); + FirstResource =3D ReservationRequest.Padding + + ARRAY_SIZE (ReservationRequest.Padding); + + // + // (b) Reserve IO space. + // + if (DefaultIo) { + // + // Request defaults. + // + --FirstResource; + FirstResource->ResType =3D ACPI_ADDRESS_SPACE_TYPE_IO; + FirstResource->AddrRangeMax =3D 512 - 1; // align at 512 IO ports + FirstResource->AddrLen =3D 512; // 512 IO ports + } + + // + // (c) Reserve non-prefetchable MMIO space (32-bit only). + // + if (DefaultMmio) { + // + // Request defaults. + // + --FirstResource; + FirstResource->ResType =3D ACPI_ADDRESS_SPACE_TYPE_MEM; + FirstResource->SpecificFlag =3D 0; // non-prefetcha= ble + FirstResource->AddrSpaceGranularity =3D 32; // 32-bit apertu= re + FirstResource->AddrRangeMax =3D SIZE_2MB - 1; // align at 2MB + FirstResource->AddrLen =3D SIZE_2MB; // 2MB padding + } + + // + // Output a copy of ReservationRequest from the lowest-address populated + // entry until the end of the structure (including + // ReservationRequest.EndDesc). If no reservations are necessary, we'll = only + // output the End Tag. + // + *Padding =3D AllocateCopyPool ( + (UINT8 *)(&ReservationRequest + 1) - (UINT8 *)FirstResource, + FirstResource + ); if (*Padding =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } =20 --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369530383505.47311966635266; Mon, 25 Sep 2017 12:58:50 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7CEC52095E52C; Mon, 25 Sep 2017 12:55:31 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5CB7E2095E526 for ; Mon, 25 Sep 2017 12:55:30 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9E75281DFE; Mon, 25 Sep 2017 19:58:41 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 66CCB60176; Mon, 25 Sep 2017 19:58:40 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9E75281DFE Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:23 +0200 Message-Id: <20170925195824.10866-7-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 25 Sep 2017 19:58:41 +0000 (UTC) Subject: [edk2] [PATCH 6/7] OvmfPkg/PciHotPlugInitDxe: add helper functions for setting up paddings X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Extract the SetIoPadding() and SetMmioPadding() functions, so that we can set EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR fields using parameter names and values that are more friendly than the original field names and their expected values. Introduce the HighBitSetRoundUp32() and HighBitSetRoundUp64() functions for calculating the last parameter ("SizeExponent") of SetIoPadding() and SetMmioPadding(). Put the new functions to use when requesting the default reservations. (In order to be consistent with a later patch, "SizeExponent" is calculated for SetIoPadding() with HighBitSetRoundUp64().) Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek --- OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf | 1 + OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 165 ++++++++++++++++++-- 2 files changed, 156 insertions(+), 10 deletions(-) diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf b/OvmfPkg/PciHotP= lugInitDxe/PciHotPlugInit.inf index 91729ae1ed04..e0ec9baae1c2 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf @@ -28,8 +28,9 @@ [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec =20 [LibraryClasses] + BaseLib BaseMemoryLib DebugLib DevicePathLib MemoryAllocationLib diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c b/OvmfPkg/PciHotPlu= gInitDxe/PciHotPlugInit.c index b1b2c5cd8ddc..39646973794b 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c @@ -14,8 +14,9 @@ **/ =20 #include =20 +#include #include #include #include #include @@ -97,8 +98,155 @@ InitializeResourcePadding ( ResourcePadding->EndDesc.Desc =3D ACPI_END_TAG_DESCRIPTOR; } =20 =20 +/** + Set up a descriptor entry for reserving IO space. + + @param[in,out] Descriptor The descriptor to configure. The caller shall= have + initialized Descriptor earlier, with + InitializeResourcePadding(). + + @param[in] SizeExponent The size and natural alignment of the reserva= tion + are determined by raising two to this power. +**/ +STATIC +VOID +SetIoPadding ( + IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor, + IN UINTN SizeExponent + ) +{ + Descriptor->ResType =3D ACPI_ADDRESS_SPACE_TYPE_IO; + Descriptor->AddrLen =3D LShiftU64 (1, SizeExponent); + Descriptor->AddrRangeMax =3D Descriptor->AddrLen - 1; +} + + +/** + Set up a descriptor entry for reserving MMIO space. + + @param[in,out] Descriptor The descriptor to configure. The caller sha= ll + have initialized Descriptor earlier, with + InitializeResourcePadding(). + + @param[in] Prefetchable TRUE if the descriptor should reserve + prefetchable MMIO space. Pass FALSE for + reserving non-prefetchable MMIO space. + + @param[in] ThirtyTwoBitOnly TRUE if the reservation should be limited to + 32-bit address space. FALSE if the reservat= ion + can be satisfied from 64-bit address space. + ThirtyTwoBitOnly is ignored if Prefetchable= is + FALSE; in that case ThirtyTwoBitOnly is alw= ays + considered TRUE. + + @param[in] SizeExponent The size and natural alignment of the + reservation are determined by raising two to + this power. +**/ +STATIC +VOID +SetMmioPadding ( + IN OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor, + IN BOOLEAN Prefetchable, + IN BOOLEAN ThirtyTwoBitOnly, + IN UINTN SizeExponent + ) +{ + Descriptor->ResType =3D ACPI_ADDRESS_SPACE_TYPE_MEM; + if (Prefetchable) { + Descriptor->SpecificFlag =3D + EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE; + Descriptor->AddrSpaceGranularity =3D ThirtyTwoBitOnly ? 32 : 64; + } else { + Descriptor->SpecificFlag =3D + EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE; + Descriptor->AddrSpaceGranularity =3D 32; + } + Descriptor->AddrLen =3D LShiftU64 (1, SizeExponent); + Descriptor->AddrRangeMax =3D Descriptor->AddrLen - 1; +} + + +/** + Round up a positive 32-bit value to the next whole power of two, and ret= urn + the bit position of the highest bit set in the result. Equivalent to + ceil(log2(x)). + + @param[in] Operand The 32-bit operand to evaluate. + + @retval -1 Operand is zero. + + @retval -1 Operand is positive, not a whole power of two, and roundi= ng it + up to the next power of two does not fit into 32 bits. + + @retval 0..31 Otherwise, return ceil(log2(Value)). +**/ +STATIC +INTN +HighBitSetRoundUp32 ( + IN UINT32 Operand + ) +{ + INTN HighBit; + + HighBit =3D HighBitSet32 (Operand); + if (HighBit =3D=3D -1) { + // + // Operand is zero. + // + return HighBit; + } + if ((Operand & (Operand - 1)) !=3D 0) { + // + // Operand is not a whole power of two. + // + ++HighBit; + } + return (HighBit < 32) ? HighBit : -1; +} + + +/** + Round up a positive 64-bit value to the next whole power of two, and ret= urn + the bit position of the highest bit set in the result. Equivalent to + ceil(log2(x)). + + @param[in] Operand The 64-bit operand to evaluate. + + @retval -1 Operand is zero. + + @retval -1 Operand is positive, not a whole power of two, and roundi= ng it + up to the next power of two does not fit into 64 bits. + + @retval 0..63 Otherwise, return ceil(log2(Value)). +**/ +STATIC +INTN +HighBitSetRoundUp64 ( + IN UINT64 Operand + ) +{ + INTN HighBit; + + HighBit =3D HighBitSet64 (Operand); + if (HighBit =3D=3D -1) { + // + // Operand is zero. + // + return HighBit; + } + if ((Operand & (Operand - 1)) !=3D 0) { + // + // Operand is not a whole power of two. + // + ++HighBit; + } + return (HighBit < 64) ? HighBit : -1; +} + + /** Returns a list of root Hot Plug Controllers (HPCs) that require initialization during the boot process. =20 @@ -297,12 +445,9 @@ GetResourcePadding ( if (DefaultIo) { // // Request defaults. // - --FirstResource; - FirstResource->ResType =3D ACPI_ADDRESS_SPACE_TYPE_IO; - FirstResource->AddrRangeMax =3D 512 - 1; // align at 512 IO ports - FirstResource->AddrLen =3D 512; // 512 IO ports + SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512)); } =20 // // (c) Reserve non-prefetchable MMIO space (32-bit only). @@ -310,14 +455,14 @@ GetResourcePadding ( if (DefaultMmio) { // // Request defaults. // - --FirstResource; - FirstResource->ResType =3D ACPI_ADDRESS_SPACE_TYPE_MEM; - FirstResource->SpecificFlag =3D 0; // non-prefetcha= ble - FirstResource->AddrSpaceGranularity =3D 32; // 32-bit apertu= re - FirstResource->AddrRangeMax =3D SIZE_2MB - 1; // align at 2MB - FirstResource->AddrLen =3D SIZE_2MB; // 2MB padding + SetMmioPadding ( + --FirstResource, + FALSE, + TRUE, + (UINTN)HighBitSetRoundUp32 (SIZE_2MB) + ); } =20 // // Output a copy of ReservationRequest from the lowest-address populated --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Thu Dec 26 01:04:09 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1506369533005825.4067511220313; Mon, 25 Sep 2017 12:58:53 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id B99812095E50C; Mon, 25 Sep 2017 12:55:35 -0700 (PDT) Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2D7DC20945BDD for ; Mon, 25 Sep 2017 12:55:32 -0700 (PDT) Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7410481DFE; Mon, 25 Sep 2017 19:58:43 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-161.rdu2.redhat.com [10.10.120.161]) by smtp.corp.redhat.com (Postfix) with ESMTP id 06F3060176; Mon, 25 Sep 2017 19:58:41 +0000 (UTC) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7410481DFE Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lersek@redhat.com From: Laszlo Ersek To: edk2-devel-01 Date: Mon, 25 Sep 2017 21:58:24 +0200 Message-Id: <20170925195824.10866-8-lersek@redhat.com> In-Reply-To: <20170925195824.10866-1-lersek@redhat.com> References: <20170925195824.10866-1-lersek@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 25 Sep 2017 19:58:43 +0000 (UTC) Subject: [edk2] [PATCH 7/7] OvmfPkg/PciHotPlugInitDxe: translate QEMU's resource reservation hints X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Jordan Justen , Ruiyu Ni MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Parse QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION from the bridges' conventional config spaces. Translate the fields as follows: * BusNumbers: * 0 -- no reservation; * (-1) -- firmware default, i.e. no reservation; * otherwise -- reserve the requested value. (NB, bus number reservation is not supposed to work before is fixed.) * Io: * 0 -- no reservation; * (-1) -- keep our current default (512B); * otherwise -- round up the requested value and reserve that. * NonPrefetchable32BitMmio: * 0 -- no reservation; * (-1) -- keep our current default (2MB); * otherwise -- round up the requested value and reserve that. * Prefetchable32BitMmio: * 0 -- no reservation, proceed to Prefetchable64BitMmio; * (-1) -- firmware default, i.e. no reservation, proceed to Prefetchable64BitMmio; * otherwise -- round up the requested value and reserve that. (NB, if Prefetchable32BitMmio is reserved in addition to NonPrefetchable32BitMmio, then PciBusDxe currently runs into an assertion failure. Refer to .) * Prefetchable64BitMmio: * only reached if Prefetchable32BitMmio was not reserved; * 0 -- no reservation; * (-1) -- firmware default, i.e. no reservation; * otherwise -- round up the requested value and reserve that. If QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION is missing, plus any time the rounding fails, fall back to the current defaults. Cc: Jordan Justen Cc: Marcel Apfelbaum Cc: Ruiyu Ni Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek Reviewed-by: Jordan Justen --- OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf | 2 + OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c | 371 +++++++++++++++++++- 2 files changed, 367 insertions(+), 6 deletions(-) diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf b/OvmfPkg/PciHotP= lugInitDxe/PciHotPlugInit.inf index e0ec9baae1c2..38043986eb67 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.inf @@ -26,15 +26,17 @@ [Sources] =20 [Packages] MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec =20 [LibraryClasses] BaseLib BaseMemoryLib DebugLib DevicePathLib MemoryAllocationLib + PciLib UefiBootServicesTableLib UefiDriverEntryPoint =20 [Protocols] diff --git a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c b/OvmfPkg/PciHotPlu= gInitDxe/PciHotPlugInit.c index 39646973794b..177e1a62120d 100644 --- a/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c +++ b/OvmfPkg/PciHotPlugInitDxe/PciHotPlugInit.c @@ -13,14 +13,16 @@ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. **/ =20 #include +#include =20 #include #include #include #include #include +#include #include =20 #include #include @@ -245,8 +247,239 @@ HighBitSetRoundUp64 ( return (HighBit < 64) ? HighBit : -1; } =20 =20 +/** + Read a slice from conventional PCI config space at the given offset, then + advance the offset. + + @param[in] PciAddress The address of the PCI Device -- Bus, Device, Fun= ction + -- in UEFI (not PciLib) encoding. + + @param[in,out] Offset On input, the offset in conventional PCI config s= pace + to start reading from. On output, the offset of t= he + first byte that was not read. + + @param[in] Size The number of bytes to read. + + @param[out] Buffer On output, the bytes read from PCI config space a= re + stored in this object. +**/ +STATIC +VOID +ReadConfigSpace ( + IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *PciAddress, + IN OUT UINT8 *Offset, + IN UINT8 Size, + OUT VOID *Buffer + ) +{ + PciReadBuffer ( + PCI_LIB_ADDRESS ( + PciAddress->Bus, + PciAddress->Device, + PciAddress->Function, + *Offset + ), + Size, + Buffer + ); + *Offset +=3D Size; +} + + +/** + Convenience wrapper macro for ReadConfigSpace(). + + Given the following conditions: + + - HeaderField is the first field in the structure pointed-to by Struct, + + - Struct->HeaderField has been populated from the conventional PCI config + space of the PCI device identified by PciAddress, + + - *Offset points one past HeaderField in the conventional PCI config spa= ce of + the PCI device identified by PciAddress, + + populate the rest of *Struct from conventional PCI config space, startin= g at + *Offset. Finally, increment *Offset so that it point one past *Struct. + + @param[in] PciAddress The address of the PCI Device -- Bus, Device, Fun= ction + -- in UEFI (not PciLib) encoding. Type: pointer to + CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS. + + @param[in,out] Offset On input, the offset in conventional PCI config s= pace + to start reading from; one past Struct->HeaderFie= ld. + On output, the offset of the first byte that was = not + read; one past *Struct. Type: pointer to UINT8. + + @param[out] Struct The structure to complete. Type: pointer to struc= ture + object. + + @param[in] HeaderField The name of the first field in *Struct, after whi= ch + *Struct should be populated. Type: structure memb= er + identifier. +**/ +#define COMPLETE_CONFIG_SPACE_STRUCT(PciAddress, Offset, Struct, HeaderFie= ld) \ + ReadConfigSpace ( = \ + (PciAddress), = \ + (Offset), = \ + (UINT8)(sizeof *(Struct) - sizeof ((Struct)->HeaderField)), = \ + &((Struct)->HeaderField) + 1 = \ + ) + + +/** + Look up the QEMU-specific Resource Reservation capability in the convent= ional + config space of a Hotplug Controller (that is, PCI Bridge). + + This function performs as few config space reads as possible. + + @param[in] HpcPciAddress The address of the PCI Bridge -- Bus, Devic= e, + Function -- in UEFI (not PciLib) encoding. + + @param[out] ReservationHint The caller-allocated capability structure to + populate from the PCI Bridge's config space. + + @retval EFI_SUCCESS The capability has been found, ReservationHint has + been populated. + + @retval EFI_NOT_FOUND The capability is missing. The contents of + ReservationHint are now indeterminate. +**/ +STATIC +EFI_STATUS +QueryReservationHint ( + IN CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *HpcPciAddress, + OUT QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION *ReservationHint +) +{ + UINT16 PciVendorId; + UINT16 PciStatus; + UINT8 PciCapPtr; + UINT8 Offset; + + // + // Check the vendor identifier. + // + PciVendorId =3D PciRead16 ( + PCI_LIB_ADDRESS ( + HpcPciAddress->Bus, + HpcPciAddress->Device, + HpcPciAddress->Function, + PCI_VENDOR_ID_OFFSET + ) + ); + if (PciVendorId !=3D QEMU_PCI_BRIDGE_VENDOR_ID_REDHAT) { + return EFI_NOT_FOUND; + } + + // + // Check the Capabilities List bit in the PCI Status Register. + // + PciStatus =3D PciRead16 ( + PCI_LIB_ADDRESS ( + HpcPciAddress->Bus, + HpcPciAddress->Device, + HpcPciAddress->Function, + PCI_PRIMARY_STATUS_OFFSET + ) + ); + if ((PciStatus & EFI_PCI_STATUS_CAPABILITY) =3D=3D 0) { + return EFI_NOT_FOUND; + } + + // + // Fetch the start of the Capabilities List. + // + PciCapPtr =3D PciRead8 ( + PCI_LIB_ADDRESS ( + HpcPciAddress->Bus, + HpcPciAddress->Device, + HpcPciAddress->Function, + PCI_CAPBILITY_POINTER_OFFSET + ) + ); + + // + // Scan the Capabilities List until we find the terminator element, or t= he + // Resource Reservation capability. + // + for (Offset =3D PciCapPtr & 0xFC; + Offset > 0; + Offset =3D ReservationHint->BridgeHdr.VendorHdr.Hdr.NextItemPtr & 0= xFC) { + BOOLEAN EnoughRoom; + + // + // Check if the Resource Reservation capability would fit into config = space + // at this offset. + // + EnoughRoom =3D (BOOLEAN)( + Offset <=3D PCI_MAX_CONFIG_OFFSET - sizeof *Reservation= Hint + ); + + // + // Read the standard capability header so we can check the capability = ID + // (if necessary) and advance to the next capability. + // + ReadConfigSpace ( + HpcPciAddress, + &Offset, + (UINT8)sizeof ReservationHint->BridgeHdr.VendorHdr.Hdr, + &ReservationHint->BridgeHdr.VendorHdr.Hdr + ); + if (!EnoughRoom || + (ReservationHint->BridgeHdr.VendorHdr.Hdr.CapabilityID !=3D + EFI_PCI_CAPABILITY_ID_VENDOR)) { + continue; + } + + // + // Read the rest of the vendor capability header so we can check the + // capability length. + // + COMPLETE_CONFIG_SPACE_STRUCT ( + HpcPciAddress, + &Offset, + &ReservationHint->BridgeHdr.VendorHdr, + Hdr + ); + if (ReservationHint->BridgeHdr.VendorHdr.Length !=3D + sizeof *ReservationHint) { + continue; + } + + // + // Read the rest of the QEMU bridge capability header so we can check = the + // capability type. + // + COMPLETE_CONFIG_SPACE_STRUCT ( + HpcPciAddress, + &Offset, + &ReservationHint->BridgeHdr, + VendorHdr + ); + if (ReservationHint->BridgeHdr.Type !=3D + QEMU_PCI_BRIDGE_CAPABILITY_TYPE_RESOURCE_RESERVATION) { + continue; + } + + // + // Read the body of the reservation hint. + // + COMPLETE_CONFIG_SPACE_STRUCT ( + HpcPciAddress, + &Offset, + ReservationHint, + BridgeHdr + ); + return EFI_SUCCESS; + } + + return EFI_NOT_FOUND; +} + + /** Returns a list of root Hot Plug Controllers (HPCs) that require initialization during the boot process. =20 @@ -401,18 +634,21 @@ GetResourcePadding ( OUT VOID **Padding, OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes ) { + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address; BOOLEAN DefaultIo; BOOLEAN DefaultMmio; RESOURCE_PADDING ReservationRequest; EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *FirstResource; + EFI_STATUS ReservationHintStatus; + QEMU_PCI_BRIDGE_CAPABILITY_RESOURCE_RESERVATION ReservationHint; + + Address =3D (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddres= s; =20 DEBUG_CODE ( - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *Address; CHAR16 *DevicePathString; =20 - Address =3D (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS *)&HpcPciAddr= ess; DevicePathString =3D ConvertDevicePathToText (HpcDevicePath, FALSE, FA= LSE); =20 DEBUG ((EFI_D_VERBOSE, "%a: Address=3D%02x:%02x.%x DevicePath=3D%s\n", __FUNCTION__, Address->Bus, Address->Device, Address->Function, @@ -439,20 +675,143 @@ GetResourcePadding ( FirstResource =3D ReservationRequest.Padding + ARRAY_SIZE (ReservationRequest.Padding); =20 // - // (b) Reserve IO space. + // Try to get the QEMU-specific Resource Reservation capability. // + ReservationHintStatus =3D QueryReservationHint (Address, &ReservationHin= t); + if (!EFI_ERROR (ReservationHintStatus)) { + INTN HighBit; + + DEBUG (( + DEBUG_VERBOSE, + "%a: BusNumbers=3D0x%x Io=3D0x%Lx NonPrefetchable32BitMmio=3D0x%x\n" + "%a: Prefetchable32BitMmio=3D0x%x Prefetchable64BitMmio=3D0x%Lx\n", + __FUNCTION__, + ReservationHint.BusNumbers, + ReservationHint.Io, + ReservationHint.NonPrefetchable32BitMmio, + __FUNCTION__, + ReservationHint.Prefetchable32BitMmio, + ReservationHint.Prefetchable64BitMmio + )); + + // + // (a) Reserve bus numbers. + // + switch (ReservationHint.BusNumbers) { + case 0: + // + // No reservation needed. + // + break; + case MAX_UINT32: + // + // Firmware default (unspecified). Treat it as "no reservation neede= d". + // + break; + default: + // + // Request the specified amount. + // + --FirstResource; + FirstResource->ResType =3D ACPI_ADDRESS_SPACE_TYPE_BUS; + FirstResource->AddrLen =3D ReservationHint.BusNumbers; + break; + } + + // + // (b) Reserve IO space. + // + switch (ReservationHint.Io) { + case 0: + // + // No reservation needed, disable our built-in. + // + DefaultIo =3D FALSE; + break; + case MAX_UINT64: + // + // Firmware default (unspecified). Stick with our built-in. + // + break; + default: + // + // Round the specified amount up to the next power of two. If roundi= ng is + // successful, reserve the rounded value. Fall back to the default + // otherwise. + // + HighBit =3D HighBitSetRoundUp64 (ReservationHint.Io); + if (HighBit !=3D -1) { + SetIoPadding (--FirstResource, (UINTN)HighBit); + DefaultIo =3D FALSE; + } + break; + } + + // + // (c) Reserve non-prefetchable MMIO space (32-bit only). + // + switch (ReservationHint.NonPrefetchable32BitMmio) { + case 0: + // + // No reservation needed, disable our built-in. + // + DefaultMmio =3D FALSE; + break; + case MAX_UINT32: + // + // Firmware default (unspecified). Stick with our built-in. + // + break; + default: + // + // Round the specified amount up to the next power of two. If roundi= ng is + // successful, reserve the rounded value. Fall back to the default + // otherwise. + // + HighBit =3D HighBitSetRoundUp32 (ReservationHint.NonPrefetchable32Bi= tMmio); + if (HighBit !=3D -1) { + SetMmioPadding (--FirstResource, FALSE, TRUE, (UINTN)HighBit); + DefaultMmio =3D FALSE; + } + break; + } + + // + // (d) Reserve prefetchable MMIO space (either 32-bit or 64-bit, never + // both). + // + // For either space, we treat 0 as "no reservation needed", and the ma= ximum + // value as "firmware default". The latter is unspecified, and we inte= rpret + // it as the former. + // + // Otherwise, round the specified amount up to the next power of two. = If + // rounding is successful, reserve the rounded value. Do not reserve + // prefetchable MMIO space otherwise. + // + if (ReservationHint.Prefetchable32BitMmio > 0 && + ReservationHint.Prefetchable32BitMmio < MAX_UINT32) { + HighBit =3D HighBitSetRoundUp32 (ReservationHint.Prefetchable32BitMm= io); + if (HighBit !=3D -1) { + SetMmioPadding (--FirstResource, TRUE, TRUE, (UINTN)HighBit); + } + } else if (ReservationHint.Prefetchable64BitMmio > 0 && + ReservationHint.Prefetchable64BitMmio < MAX_UINT64) { + HighBit =3D HighBitSetRoundUp64 (ReservationHint.Prefetchable64BitMm= io); + if (HighBit !=3D -1) { + SetMmioPadding (--FirstResource, TRUE, FALSE, (UINTN)HighBit); + } + } + } + if (DefaultIo) { // // Request defaults. // SetIoPadding (--FirstResource, (UINTN)HighBitSetRoundUp64 (512)); } =20 - // - // (c) Reserve non-prefetchable MMIO space (32-bit only). - // if (DefaultMmio) { // // Request defaults. // --=20 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel