From nobody Thu Dec 26 01:15:37 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1507798097952529.5576034910029; Thu, 12 Oct 2017 01:48:17 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9DA0B21F38825; Thu, 12 Oct 2017 01:44:45 -0700 (PDT) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9C05921FC7498 for ; Thu, 12 Oct 2017 01:44:44 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP; 12 Oct 2017 01:48:14 -0700 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.7]) by FMSMGA003.fm.intel.com with ESMTP; 12 Oct 2017 01:48:13 -0700 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,365,1503385200"; d="scan'208";a="909212119" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Thu, 12 Oct 2017 16:48:07 +0800 Message-Id: <20171012084810.148196-2-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.12.2.windows.2 In-Reply-To: <20171012084810.148196-1-ruiyu.ni@intel.com> References: <20171012084810.148196-1-ruiyu.ni@intel.com> Subject: [edk2] [PATCH 1/4] UefiCpuPkg/MtrrLib: refine MtrrLibProgramFixedMtrr() X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michael D Kinney , Eric Dong MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The patch replaces some if-checks with assertions because they are impossible to happen. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Cc: Michael D Kinney Cc: Eric Dong --- UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 66 +++++++++++++++++---------------= ---- 1 file changed, 31 insertions(+), 35 deletions(-) diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/Mtrr= Lib/MtrrLib.c index cf1af29936..5b21fe11f1 100644 --- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c +++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c @@ -466,10 +466,10 @@ MtrrGetVariableMtrr ( @param[in] Type The memory type to set. @param[in, out] Base The base address of memory range. @param[in, out] Length The length of memory range. - @param[in, out] LastMsrNum On input, the last index of the fixed M= TRR MSR to program. + @param[in, out] LastMsrIndex On input, the last index of the fixed M= TRR MSR to program. On return, the current index of the fix= ed MTRR MSR to program. - @param[out] ReturnClearMask The bits to clear in the fixed MTRR MSR. - @param[out] ReturnOrMask The bits to set in the fixed MTRR MSR. + @param[out] ClearMask The bits to clear in the fixed MTRR MSR. + @param[out] OrMask The bits to set in the fixed MTRR MSR. =20 @retval RETURN_SUCCESS The cache type was updated successfully @retval RETURN_UNSUPPORTED The requested range or cache type was invalid @@ -481,27 +481,25 @@ MtrrLibProgramFixedMtrr ( IN MTRR_MEMORY_CACHE_TYPE Type, IN OUT UINT64 *Base, IN OUT UINT64 *Length, - IN OUT UINT32 *LastMsrNum, - OUT UINT64 *ReturnClearMask, - OUT UINT64 *ReturnOrMask + IN OUT UINT32 *LastMsrIndex, + OUT UINT64 *ClearMask, + OUT UINT64 *OrMask ) { - UINT32 MsrNum; + UINT32 MsrIndex; UINT32 LeftByteShift; UINT32 RightByteShift; - UINT64 OrMask; - UINT64 ClearMask; UINT64 SubLength; =20 // // Find the fixed MTRR index to be programmed // - for (MsrNum =3D *LastMsrNum + 1; MsrNum < MTRR_NUMBER_OF_FIXED_MTRR; Msr= Num++) { - if ((*Base >=3D mMtrrLibFixedMtrrTable[MsrNum].BaseAddress) && + for (MsrIndex =3D *LastMsrIndex + 1; MsrIndex < ARRAY_SIZE (mMtrrLibFixe= dMtrrTable); MsrIndex++) { + if ((*Base >=3D mMtrrLibFixedMtrrTable[MsrIndex].BaseAddress) && (*Base < ( - mMtrrLibFixedMtrrTable[MsrNum].BaseAddress + - (8 * mMtrrLibFixedMtrrTable[MsrNum].Length) + mMtrrLibFixedMtrrTable[MsrIndex].BaseAddress + + (8 * mMtrrLibFixedMtrrTable[MsrIndex].Length) ) ) ) { @@ -509,65 +507,63 @@ MtrrLibProgramFixedMtrr ( } } =20 - if (MsrNum =3D=3D MTRR_NUMBER_OF_FIXED_MTRR) { - return RETURN_UNSUPPORTED; - } + ASSERT (MsrIndex !=3D ARRAY_SIZE (mMtrrLibFixedMtrrTable)); =20 // // Find the begin offset in fixed MTRR and calculate byte offset of left= shift // - LeftByteShift =3D ((UINT32)*Base - mMtrrLibFixedMtrrTable[MsrNum].BaseAd= dress) - / mMtrrLibFixedMtrrTable[MsrNum].Length; - - if (LeftByteShift >=3D 8) { + if ((((UINT32)*Base - mMtrrLibFixedMtrrTable[MsrIndex].BaseAddress) % mM= trrLibFixedMtrrTable[MsrIndex].Length) !=3D 0) { + // + // Base address should be aligned to the begin of a certain Fixed MTRR= range. + // return RETURN_UNSUPPORTED; } + LeftByteShift =3D ((UINT32)*Base - mMtrrLibFixedMtrrTable[MsrIndex].Base= Address) / mMtrrLibFixedMtrrTable[MsrIndex].Length; + ASSERT (LeftByteShift < 8); =20 // // Find the end offset in fixed MTRR and calculate byte offset of right = shift // - SubLength =3D mMtrrLibFixedMtrrTable[MsrNum].Length * (8 - LeftByteShift= ); + SubLength =3D mMtrrLibFixedMtrrTable[MsrIndex].Length * (8 - LeftByteShi= ft); if (*Length >=3D SubLength) { RightByteShift =3D 0; } else { - RightByteShift =3D 8 - LeftByteShift - - (UINT32)(*Length) / mMtrrLibFixedMtrrTable[MsrNum].Length; - if ((LeftByteShift >=3D 8) || - (((UINT32)(*Length) % mMtrrLibFixedMtrrTable[MsrNum].Length) !=3D = 0) - ) { + if (((UINT32)(*Length) % mMtrrLibFixedMtrrTable[MsrIndex].Length) !=3D= 0) { + // + // Length should be aligned to the end of a certain Fixed MTRR range. + // return RETURN_UNSUPPORTED; } + RightByteShift =3D 8 - LeftByteShift - (UINT32)(*Length) / mMtrrLibFix= edMtrrTable[MsrIndex].Length; // // Update SubLength by actual length // SubLength =3D *Length; } =20 - ClearMask =3D CLEAR_SEED; - OrMask =3D MultU64x32 (OR_SEED, (UINT32) Type); + *ClearMask =3D CLEAR_SEED; + *OrMask =3D MultU64x32 (OR_SEED, (UINT32) Type); =20 if (LeftByteShift !=3D 0) { // // Clear the low bits by LeftByteShift // - ClearMask &=3D LShiftU64 (ClearMask, LeftByteShift * 8); - OrMask &=3D LShiftU64 (OrMask, LeftByteShift * 8); + *ClearMask &=3D LShiftU64 (*ClearMask, LeftByteShift * 8); + *OrMask &=3D LShiftU64 (*OrMask, LeftByteShift * 8); } =20 if (RightByteShift !=3D 0) { // // Clear the high bits by RightByteShift // - ClearMask &=3D RShiftU64 (ClearMask, RightByteShift * 8); - OrMask &=3D RShiftU64 (OrMask, RightByteShift * 8); + *ClearMask &=3D RShiftU64 (*ClearMask, RightByteShift * 8); + *OrMask &=3D RShiftU64 (*OrMask, RightByteShift * 8); } =20 *Length -=3D SubLength; *Base +=3D SubLength; =20 - *LastMsrNum =3D MsrNum; - *ReturnClearMask =3D ClearMask; - *ReturnOrMask =3D OrMask; + *LastMsrIndex =3D MsrIndex; =20 return RETURN_SUCCESS; } --=20 2.12.2.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel