Ordinary computers typically have a physical switch or jumper on the
board that allows non-volatile settings to be cleared. Let's implement
the same using DIP switch #1 on block #3, and clear the EFI variable
store if it is set to ON at boot time.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++
Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 +
Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++-
Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++
Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
6 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index 10d070773cdc..af978db2c034 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
+ # set DIP switch DSW3-PIN1 to clear the varstore
+ gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
+
[PcdsPatchableInModule]
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
@@ -418,6 +421,7 @@ [Components.common]
MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+ Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
index 4630d78bce93..4034bcfe82c5 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
@@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
+ # set DIP switch DSW3-PIN1 to clear the varstore
+ gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
+
[PcdsPatchableInModule]
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
@@ -406,6 +409,7 @@ [Components.common]
MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+ Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
<LibraryClasses>
NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
index 365085c8f243..4577bd316a1f 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
@@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+ INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
index 358dd5a91f08..bd8ee7a368f5 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
@@ -21,6 +21,7 @@
#include <Library/PeiServicesLib.h>
#include <Platform/DramInfo.h>
#include <Ppi/DramInfo.h>
+#include <Ppi/EmbeddedGpio.h>
#include <Ppi/MemoryDiscovered.h>
STATIC
@@ -103,10 +104,32 @@ PlatformPeim (
VOID
)
{
- EFI_STATUS Status;
+ EMBEDDED_GPIO_PPI *Gpio;
+ EFI_STATUS Status;
+ UINTN Value;
ASSERT (mDramInfo->NumRegions > 0);
+ Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
+ (VOID **)&Gpio);
+ ASSERT_EFI_ERROR (Status);
+
+ Status = Gpio->Set (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin),
+ GPIO_MODE_INPUT);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n", __FUNCTION__,
+ Status));
+ } else {
+ Status = Gpio->Get (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), &Value);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n", __FUNCTION__,
+ Status));
+ } else if (Value > 0) {
+ DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
+ PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
+ }
+ }
+
//
// Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
// This is the region we will use for UEFI itself.
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
index 70eb715d44e3..a6501fb205e1 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
@@ -25,6 +25,7 @@ [Sources]
[Packages]
ArmPkg/ArmPkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -40,11 +41,16 @@ [LibraryClasses]
[FixedPcd]
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdFvSize
+ gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
gSynQuacerTokenSpaceGuid.PcdDramInfoBase
[Ppis]
+ gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
gSynQuacerDramInfoPpiGuid ## PRODUCES
[Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
+
+[Depex]
+ gEdkiiEmbeddedGpioPpiGuid
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
index 1a683b81521b..c11550469cd0 100644
--- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
+++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -30,3 +30,5 @@ [PcdsFixedAtBuild]
gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
+
+ gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0|UINT32|0x00000004
--
2.11.0
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
On Fri, Nov 10, 2017 at 02:21:22PM +0000, Ard Biesheuvel wrote:
> Ordinary computers typically have a physical switch or jumper on the
> board that allows non-volatile settings to be cleared. Let's implement
> the same using DIP switch #1 on block #3, and clear the EFI variable
> store if it is set to ON at boot time.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++
> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++
> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 +
> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++-
> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++
> Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
> 6 files changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> index 10d070773cdc..af978db2c034 100644
> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
>
> + # set DIP switch DSW3-PIN1 to clear the varstore
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
Just one question - how does 0 end up being pin 1 on block 3?
/
Leif
> +
> [PcdsPatchableInModule]
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -418,6 +421,7 @@ [Components.common]
> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> index 4630d78bce93..4034bcfe82c5 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> @@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
>
> + # set DIP switch DSW3-PIN1 to clear the varstore
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
> +
> [PcdsPatchableInModule]
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -406,6 +409,7 @@ [Components.common]
> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> index 365085c8f243..4577bd316a1f 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> @@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
> INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> index 358dd5a91f08..bd8ee7a368f5 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> @@ -21,6 +21,7 @@
> #include <Library/PeiServicesLib.h>
> #include <Platform/DramInfo.h>
> #include <Ppi/DramInfo.h>
> +#include <Ppi/EmbeddedGpio.h>
> #include <Ppi/MemoryDiscovered.h>
>
> STATIC
> @@ -103,10 +104,32 @@ PlatformPeim (
> VOID
> )
> {
> - EFI_STATUS Status;
> + EMBEDDED_GPIO_PPI *Gpio;
> + EFI_STATUS Status;
> + UINTN Value;
>
> ASSERT (mDramInfo->NumRegions > 0);
>
> + Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
> + (VOID **)&Gpio);
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = Gpio->Set (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin),
> + GPIO_MODE_INPUT);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n", __FUNCTION__,
> + Status));
> + } else {
> + Status = Gpio->Get (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), &Value);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n", __FUNCTION__,
> + Status));
> + } else if (Value > 0) {
> + DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
> + PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
> + }
> + }
> +
> //
> // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
> // This is the region we will use for UEFI itself.
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> index 70eb715d44e3..a6501fb205e1 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> @@ -25,6 +25,7 @@ [Sources]
>
> [Packages]
> ArmPkg/ArmPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> MdePkg/MdePkg.dec
> MdeModulePkg/MdeModulePkg.dec
> Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -40,11 +41,16 @@ [LibraryClasses]
> [FixedPcd]
> gArmTokenSpaceGuid.PcdFvBaseAddress
> gArmTokenSpaceGuid.PcdFvSize
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
> gSynQuacerTokenSpaceGuid.PcdDramInfoBase
>
> [Ppis]
> + gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
> gSynQuacerDramInfoPpiGuid ## PRODUCES
>
> [Pcd]
> gArmTokenSpaceGuid.PcdSystemMemoryBase
> gArmTokenSpaceGuid.PcdSystemMemorySize
> +
> +[Depex]
> + gEdkiiEmbeddedGpioPpiGuid
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> index 1a683b81521b..c11550469cd0 100644
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -30,3 +30,5 @@ [PcdsFixedAtBuild]
>
> gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
> gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
> +
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0|UINT32|0x00000004
> --
> 2.11.0
>
_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel
On 17 November 2017 at 15:51, Leif Lindholm <leif.lindholm@linaro.org> wrote: > On Fri, Nov 10, 2017 at 02:21:22PM +0000, Ard Biesheuvel wrote: >> Ordinary computers typically have a physical switch or jumper on the >> board that allows non-volatile settings to be cleared. Let's implement >> the same using DIP switch #1 on block #3, and clear the EFI variable >> store if it is set to ON at boot time. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> >> --- >> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++ >> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++ >> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 + >> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++- >> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++ >> Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++ >> 6 files changed, 41 insertions(+), 1 deletion(-) >> >> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc >> index 10d070773cdc..af978db2c034 100644 >> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc >> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc >> @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common] >> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO >> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1 >> >> + # set DIP switch DSW3-PIN1 to clear the varstore >> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0 > > Just one question - how does 0 end up being pin 1 on block 3? > Blocks 1 and 2 are not connected to GPIOs at all, but to other SoC PINs for boot mode, debug, etc. _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
On Fri, Nov 10, 2017 at 02:21:22PM +0000, Ard Biesheuvel wrote:
> Ordinary computers typically have a physical switch or jumper on the
> board that allows non-volatile settings to be cleared. Let's implement
> the same using DIP switch #1 on block #3, and clear the EFI variable
> store if it is set to ON at boot time.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++
> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++
> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 +
> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++-
> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++
> Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
> 6 files changed, 41 insertions(+), 1 deletion(-)
>
> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> index 10d070773cdc..af978db2c034 100644
> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
>
> + # set DIP switch DSW3-PIN1 to clear the varstore
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
> +
Right, so could you change this value to 1 ...
> [PcdsPatchableInModule]
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -418,6 +421,7 @@ [Components.common]
> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> index 4630d78bce93..4034bcfe82c5 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> @@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
>
> + # set DIP switch DSW3-PIN1 to clear the varstore
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
> +
> [PcdsPatchableInModule]
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -406,6 +409,7 @@ [Components.common]
> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> index 365085c8f243..4577bd316a1f 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> @@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
> INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
> INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> + INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
> INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> index 358dd5a91f08..bd8ee7a368f5 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> @@ -21,6 +21,7 @@
> #include <Library/PeiServicesLib.h>
> #include <Platform/DramInfo.h>
> #include <Ppi/DramInfo.h>
> +#include <Ppi/EmbeddedGpio.h>
> #include <Ppi/MemoryDiscovered.h>
>
> STATIC
> @@ -103,10 +104,32 @@ PlatformPeim (
> VOID
> )
> {
> - EFI_STATUS Status;
> + EMBEDDED_GPIO_PPI *Gpio;
> + EFI_STATUS Status;
> + UINTN Value;
And use a local variable Pin, initialized to
FixedPcdGet32 (PcdClearSettingsGpioPin) - 1?
(You could then also have an assert verifying PcdClearSettingsGpioPin
!= 0, to make fallback to default value flash warnings.)
>
> ASSERT (mDramInfo->NumRegions > 0);
>
> + Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
> + (VOID **)&Gpio);
> + ASSERT_EFI_ERROR (Status);
> +
> + Status = Gpio->Set (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin),
> + GPIO_MODE_INPUT);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n", __FUNCTION__,
> + Status));
> + } else {
> + Status = Gpio->Get (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), &Value);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n", __FUNCTION__,
> + Status));
> + } else if (Value > 0) {
> + DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
> + PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
> + }
> + }
> +
> //
> // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
> // This is the region we will use for UEFI itself.
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> index 70eb715d44e3..a6501fb205e1 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> @@ -25,6 +25,7 @@ [Sources]
>
> [Packages]
> ArmPkg/ArmPkg.dec
> + EmbeddedPkg/EmbeddedPkg.dec
> MdePkg/MdePkg.dec
> MdeModulePkg/MdeModulePkg.dec
> Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -40,11 +41,16 @@ [LibraryClasses]
> [FixedPcd]
> gArmTokenSpaceGuid.PcdFvBaseAddress
> gArmTokenSpaceGuid.PcdFvSize
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
> gSynQuacerTokenSpaceGuid.PcdDramInfoBase
>
> [Ppis]
> + gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
> gSynQuacerDramInfoPpiGuid ## PRODUCES
>
> [Pcd]
> gArmTokenSpaceGuid.PcdSystemMemoryBase
> gArmTokenSpaceGuid.PcdSystemMemorySize
> +
> +[Depex]
> + gEdkiiEmbeddedGpioPpiGuid
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> index 1a683b81521b..c11550469cd0 100644
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -30,3 +30,5 @@ [PcdsFixedAtBuild]
>
> gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
> gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
> +
> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0|UINT32|0x00000004
And add a small comment for this line that this refers to block 3 and
0 means "don't use"?
/
Leif
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On 17 November 2017 at 16:10, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Fri, Nov 10, 2017 at 02:21:22PM +0000, Ard Biesheuvel wrote:
>> Ordinary computers typically have a physical switch or jumper on the
>> board that allows non-volatile settings to be cleared. Let's implement
>> the same using DIP switch #1 on block #3, and clear the EFI variable
>> store if it is set to ON at boot time.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 4 ++++
>> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 4 ++++
>> Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 +
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c | 25 +++++++++++++++++++-
>> Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf | 6 +++++
>> Silicon/Socionext/SynQuacer/SynQuacer.dec | 2 ++
>> 6 files changed, 41 insertions(+), 1 deletion(-)
>>
>> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
>> index 10d070773cdc..af978db2c034 100644
>> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
>> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
>> @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
>> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
>> gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
>>
>> + # set DIP switch DSW3-PIN1 to clear the varstore
>> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
>> +
>
> Right, so could you change this value to 1 ...
>
OK
>> [PcdsPatchableInModule]
>> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
>> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
>> @@ -418,6 +421,7 @@ [Components.common]
>> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
>> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
>> index 4630d78bce93..4034bcfe82c5 100644
>> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
>> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
>> @@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
>>
>> + # set DIP switch DSW3-PIN1 to clear the varstore
>> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
>> +
>> [PcdsPatchableInModule]
>> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
>> gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
>> @@ -406,6 +409,7 @@ [Components.common]
>> MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>> MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>> MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
>> + Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
>> index 365085c8f243..4577bd316a1f 100644
>> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
>> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
>> @@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
>> INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>> INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>> INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
>> + INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>> INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
>> index 358dd5a91f08..bd8ee7a368f5 100644
>> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
>> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
>> @@ -21,6 +21,7 @@
>> #include <Library/PeiServicesLib.h>
>> #include <Platform/DramInfo.h>
>> #include <Ppi/DramInfo.h>
>> +#include <Ppi/EmbeddedGpio.h>
>> #include <Ppi/MemoryDiscovered.h>
>>
>> STATIC
>> @@ -103,10 +104,32 @@ PlatformPeim (
>> VOID
>> )
>> {
>> - EFI_STATUS Status;
>> + EMBEDDED_GPIO_PPI *Gpio;
>> + EFI_STATUS Status;
>> + UINTN Value;
>
> And use a local variable Pin, initialized to
> FixedPcdGet32 (PcdClearSettingsGpioPin) - 1?
> (You could then also have an assert verifying PcdClearSettingsGpioPin
> != 0, to make fallback to default value flash warnings.)
>
Right. The DEBUG build already produces the NorFlashDxe blurb that the
FV is being reinitialized.
In any case, given that the SoC does number its GPIOs 0 - 31, the fact
that developerbox DSW3 pins are 1 based does not mean 0 is
unallocated. So I think it would make more sense to use UINT32_MAX as
unused.
>>
>> ASSERT (mDramInfo->NumRegions > 0);
>>
>> + Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
>> + (VOID **)&Gpio);
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + Status = Gpio->Set (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin),
>> + GPIO_MODE_INPUT);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n", __FUNCTION__,
>> + Status));
>> + } else {
>> + Status = Gpio->Get (Gpio, FixedPcdGet32 (PcdClearSettingsGpioPin), &Value);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n", __FUNCTION__,
>> + Status));
>> + } else if (Value > 0) {
>> + DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
>> + PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
>> + }
>> + }
>> +
>> //
>> // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
>> // This is the region we will use for UEFI itself.
>> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
>> index 70eb715d44e3..a6501fb205e1 100644
>> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
>> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
>> @@ -25,6 +25,7 @@ [Sources]
>>
>> [Packages]
>> ArmPkg/ArmPkg.dec
>> + EmbeddedPkg/EmbeddedPkg.dec
>> MdePkg/MdePkg.dec
>> MdeModulePkg/MdeModulePkg.dec
>> Silicon/Socionext/SynQuacer/SynQuacer.dec
>> @@ -40,11 +41,16 @@ [LibraryClasses]
>> [FixedPcd]
>> gArmTokenSpaceGuid.PcdFvBaseAddress
>> gArmTokenSpaceGuid.PcdFvSize
>> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
>> gSynQuacerTokenSpaceGuid.PcdDramInfoBase
>>
>> [Ppis]
>> + gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
>> gSynQuacerDramInfoPpiGuid ## PRODUCES
>>
>> [Pcd]
>> gArmTokenSpaceGuid.PcdSystemMemoryBase
>> gArmTokenSpaceGuid.PcdSystemMemorySize
>> +
>> +[Depex]
>> + gEdkiiEmbeddedGpioPpiGuid
>> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> index 1a683b81521b..c11550469cd0 100644
>> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
>> @@ -30,3 +30,5 @@ [PcdsFixedAtBuild]
>>
>> gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
>> gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
>> +
>> + gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0|UINT32|0x00000004
>
> And add a small comment for this line that this refers to block 3 and
> 0 means "don't use"?
>
Block 3 is platform specific not SoC specific.
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On Fri, Nov 17, 2017 at 05:42:30PM +0000, Ard Biesheuvel wrote:
> On 17 November 2017 at 16:10, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > And use a local variable Pin, initialized to
> > FixedPcdGet32 (PcdClearSettingsGpioPin) - 1?
> > (You could then also have an assert verifying PcdClearSettingsGpioPin
> > != 0, to make fallback to default value flash warnings.)
>
> Right. The DEBUG build already produces the NorFlashDxe blurb that the
> FV is being reinitialized.
>
> In any case, given that the SoC does number its GPIOs 0 - 31, the fact
> that developerbox DSW3 pins are 1 based does not mean 0 is
> unallocated.
Ah, OK, I was missing that bit.
> So I think it would make more sense to use UINT32_MAX as unused.
UINT32_MAX is a lot less ambiguous, yes.
> > And add a small comment for this line that this refers to block 3 and
> > 0 means "don't use"?
>
> Block 3 is platform specific not SoC specific.
Another bit I was missing.
Right, and you make this even more clear in the follow-up reply.
/
Leif
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