From nobody Wed Dec 25 13:10:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1510323870918913.4793584068819; Fri, 10 Nov 2017 06:24:30 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D3C0F21CEB12B; Fri, 10 Nov 2017 06:19:09 -0800 (PST) Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B224E2035521F for ; Fri, 10 Nov 2017 06:19:07 -0800 (PST) Received: by mail-wm0-x241.google.com with SMTP id b9so3109934wmh.0 for ; Fri, 10 Nov 2017 06:23:10 -0800 (PST) Received: from localhost.localdomain ([160.167.170.128]) by smtp.gmail.com with ESMTPSA id e131sm1036477wmg.15.2017.11.10.06.23.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Nov 2017 06:23:08 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=KKbri4hWnPJ9Kh9/tzd5UCM6oboYaRITbQ/vW5IbZpA=; b=R9fl76WUEel40sxleSLWbaFqaIrOgX1TaDOlV5cyHLFHxPcrvwJpkQrjvzgdb8gXIk NZtzWnuRyP86aP64mN5tp8xAlgD4/gXooSNOGyqBB0jO43cLEjbJ1FqC3th3JyKAR/Rb wCC2TjOgakIq5UujPus0H9xHXgCSO9TKwa07w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=KKbri4hWnPJ9Kh9/tzd5UCM6oboYaRITbQ/vW5IbZpA=; b=brsm16nHPHgaOsp5jn4ad6VZzL5US1mBAZ3rc4Hgg5MdIcYWXs3M1fgNHk7UwLh9fc pgeoKEQnE1kq5Ljrmfpn8bEGIzZJyY884fmFye9FkTySINf6Imde2xI+agCpJ87U9g21 ZoAEKL06IKhtGlUtVw0dLrkTM85oGD9A8FJCgOcq4Dn2jJaLFQdmUhMUu+Py3ZR0zSsF s741O/9FtzJESBtTj1e432UIQfMXk5WAsTYJUAv7UsJ59x0Eo38/vxwznCkupfsPvmmQ sGOD7hn12vMvJtwzQXknu5FwPBEGy1BVaMw8D4MUqxv6zP6TE6g/TYUE0QPPQ++redm6 mtuQ== X-Gm-Message-State: AJaThX6uUPG+gKgtxe2ALtkXDHzhmnrof50AqgyhIWE3psF8jFwS4tGy bB7xwDZ1AQGmMuaP+Wh4a9tomxHmnrs= X-Google-Smtp-Source: AGs4zMZMh0lN0uTyUjvjGGCdAaANoBQZy/+7fiSqMRsiwNThw3FInqkzla+6yo5fwXl98/S0ERZFfA== X-Received: by 10.28.175.73 with SMTP id y70mr402165wme.21.1510323789114; Fri, 10 Nov 2017 06:23:09 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org, daniel.thompson@linaro.org Date: Fri, 10 Nov 2017 14:21:25 +0000 Message-Id: <20171110142127.12018-33-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171110142127.12018-1-ard.biesheuvel@linaro.org> References: <20171110142127.12018-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v4 32/34] Platform/DeveloperBox: wire up RTC support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: masahisa.kojima@linaro.org, masami.hiramatsu@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add the drivers, library resolutions and PCD settings to enable RTC support on DeveloperBox. Also, update PlatformDxe to register the non-discoverable device handles for both I2C controllers. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Platform/Socionext/DeveloperBox/DeveloperBox.dsc = | 8 ++- Platform/Socionext/DeveloperBox/DeveloperBox.fdf = | 5 ++ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c = | 76 +++++++++++++++++--- Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf = | 6 +- Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h = | 8 +++ Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMem= oryInitPeiLib.c | 4 ++ 6 files changed, 96 insertions(+), 11 deletions(-) diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/So= cionext/DeveloperBox/DeveloperBox.dsc index af978db2c034..cd4eb79b35bf 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc @@ -446,8 +446,7 @@ [Components.common] MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntim= eDxe.inf EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf { - ## TODO - RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/Templa= teRealTimeClockLib.inf + RealTimeClockLib|Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563= RealTimeClockLib.inf } MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf @@ -623,3 +622,8 @@ [Components.common] MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.= inf SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.= inf + + # + # I2C + # + Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.inf diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/So= cionext/DeveloperBox/DeveloperBox.fdf index 6cc523fac4f3..8443986fc3e7 100644 --- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf @@ -229,6 +229,11 @@ [FV.FvMain] SECTION UI =3D "Pkcs7TestRoot" } =20 + # + # I2C + # + INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerI2cDxe/SynQuacerI2cDxe.= inf + [FV.FVMAIN_COMPACT] FvAlignment =3D 16 BlockSize =3D 0x10000 diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c = b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c index 9639ffffc09f..070e6be92edd 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c @@ -62,27 +62,61 @@ STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mNetsecDesc[] = =3D { } }; =20 +STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mI2c0Desc[] =3D { + { + ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3, // Len + ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType + 0, // GenFlag + 0, // SpecificFlag + 32, // AddrSpaceGranular= ity + SYNQUACER_I2C0_BASE, // AddrRangeMin + SYNQUACER_I2C0_BASE + SYNQUACER_I2C0_SIZE - 1, // AddrRangeMax + 0, // AddrTranslationOf= fset + SYNQUACER_I2C0_SIZE, // AddrLen + }, { + ACPI_END_TAG_DESCRIPTOR // Desc + } +}; + +STATIC EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR mI2c1Desc[] =3D { + { + ACPI_ADDRESS_SPACE_DESCRIPTOR, // Desc + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3, // Len + ACPI_ADDRESS_SPACE_TYPE_MEM, // ResType + 0, // GenFlag + 0, // SpecificFlag + 32, // AddrSpaceGranular= ity + SYNQUACER_I2C1_BASE, // AddrRangeMin + SYNQUACER_I2C1_BASE + SYNQUACER_I2C1_SIZE - 1, // AddrRangeMax + 0, // AddrTranslationOf= fset + SYNQUACER_I2C1_SIZE, // AddrLen + }, { + ACPI_END_TAG_DESCRIPTOR // Desc + } +}; + STATIC EFI_STATUS -RegisterNetsec ( - VOID +RegisterDevice ( + IN EFI_GUID *TypeGuid, + IN EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc, + OUT EFI_HANDLE *Handle ) { NON_DISCOVERABLE_DEVICE *Device; EFI_STATUS Status; - EFI_HANDLE Handle; =20 Device =3D (NON_DISCOVERABLE_DEVICE *)AllocateZeroPool (sizeof (*Device)= ); if (Device =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } =20 - Device->Type =3D &gNetsecNonDiscoverableDeviceGuid; + Device->Type =3D TypeGuid; Device->DmaType =3D NonDiscoverableDeviceDmaTypeNonCoherent; - Device->Resources =3D mNetsecDesc; + Device->Resources =3D Desc; =20 - Handle =3D NULL; - Status =3D gBS->InstallMultipleProtocolInterfaces (&Handle, + Status =3D gBS->InstallMultipleProtocolInterfaces (Handle, &gEdkiiNonDiscoverableDeviceProtocolGuid, Device, NULL); if (EFI_ERROR (Status)) { @@ -106,6 +140,7 @@ PlatformDxeEntryPoint ( EFI_STATUS Status; VOID *Dtb; UINTN DtbSize; + EFI_HANDLE Handle; =20 Dtb =3D NULL; Status =3D DtPlatformLoadDtb (&Dtb, &DtbSize); @@ -118,5 +153,30 @@ PlatformDxeEntryPoint ( Status)); } =20 - return RegisterNetsec (); + Handle =3D NULL; + Status =3D RegisterDevice (&gNetsecNonDiscoverableDeviceGuid, mNetsecDes= c, + &Handle); + ASSERT_EFI_ERROR (Status); + + Handle =3D NULL; + Status =3D RegisterDevice (&gSynQuacerNonDiscoverableRuntimeI2cMasterGui= d, + mI2c0Desc, &Handle); + ASSERT_EFI_ERROR (Status); + + // + // Install the PCF8563 I2C Master protocol on this handle so the RTC dri= ver + // can identify it as the I2C master it can invoke directly, rather than + // through the I2C driver stack (which cannot be used at runtime) + // + Status =3D gBS->InstallProtocolInterface (&Handle, + &gPcf8563RealTimeClockLibI2cMasterProtolGuid, + EFI_NATIVE_INTERFACE, NULL); + ASSERT_EFI_ERROR (Status); + + Handle =3D NULL; + Status =3D RegisterDevice (&gSynQuacerNonDiscoverableI2cMasterGuid, mI2c= 1Desc, + &Handle); + ASSERT_EFI_ERROR (Status); + + return EFI_SUCCESS; } diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.in= f b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index 25e6248f1c61..478e0c7d33e9 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -29,6 +29,7 @@ [Packages] EmbeddedPkg/EmbeddedPkg.dec MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec + Silicon/NXP/Library/Pcf8563RealTimeClockLib/Pcf8563RealTimeClockLib.dec Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.dec Silicon/Socionext/SynQuacer/SynQuacer.dec =20 @@ -43,9 +44,12 @@ [LibraryClasses] [Guids] gFdtTableGuid gNetsecNonDiscoverableDeviceGuid + gSynQuacerNonDiscoverableI2cMasterGuid + gSynQuacerNonDiscoverableRuntimeI2cMasterGuid =20 [Protocols] - gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES + gEdkiiNonDiscoverableDeviceProtocolGuid ## PRODUCES + gPcf8563RealTimeClockLibI2cMasterProtolGuid ## PRODUCES =20 [FixedPcd] gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Sil= icon/Socionext/SynQuacer/Include/Platform/MemoryMap.h index f29a35809bac..3c7bd58866cc 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h @@ -42,6 +42,14 @@ #define SYNQUACER_GPIO_BASE 0x51000000 #define SYNQUACER_GPIO_SIZE SIZE_4KB =20 +// I2C0 block +#define SYNQUACER_I2C0_BASE 0x51200000 +#define SYNQUACER_I2C0_SIZE SIZE_4KB + +// I2C1 block +#define SYNQUACER_I2C1_BASE 0x51210000 +#define SYNQUACER_I2C1_SIZE SIZE_4KB + // eMMC(SDH30) #define SYNQUACER_EMMC_BASE 0x52300000 #define SYNQUACER_EMMC_BASE_SZ SIZE_4KB diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/= SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacer= MemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c index 63c441872da7..38cb731f92cb 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuac= erMemoryInitPeiLib.c @@ -82,6 +82,10 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemory= Table[] =3D { ARM_CACHED_DEVICE_REGION (FixedPcdGet32 (PcdNetsecEepromBase), SYNQUACER_EEPROM_BASE_SZ), =20 + // SynQuacer I2C + ARM_DEVICE_REGION (SYNQUACER_I2C0_BASE, SYNQUACER_I2C0_SIZE), + ARM_DEVICE_REGION (SYNQUACER_I2C1_BASE, SYNQUACER_I2C1_SIZE), + // SynQuacer NETSEC ARM_DEVICE_REGION (SYNQUACER_NETSEC1_BASE, SYNQUACER_NETSEC1_BASE_SZ), =20 --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel