1. Patchew
  2. EDK2
  3. [edk2] [PATCH edk2-platforms v5 0/6] add remaining support for Socionext SynQuacer
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[edk2] [PATCH edk2-platforms v5 1/6] Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch

Ard Biesheuvel posted 6 patches 8 years ago
[edk2] [PATCH edk2-platforms v5 1/6] Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch
Posted by Ard Biesheuvel 8 years ago 
Ordinary computers typically have a physical switch or jumper on the
board that allows non-volatile settings to be cleared. Let's implement
the same using DIP switch #1 on block #3, and clear the EFI variable
store if it is set to ON at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
v5: use MAX_UINT8 as 'not implemented' GPIO index

 Platform/Socionext/DeveloperBox/DeveloperBox.dsc                                        |  4 +++
 Platform/Socionext/DeveloperBox/DeveloperBox.fdf                                        |  1 +
 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc                            |  4 +++
 Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf                            |  1 +
 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c   | 30 +++++++++++++++++++-
 Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf |  6 ++++
 Silicon/Socionext/SynQuacer/SynQuacer.dec                                               |  3 ++
 7 files changed, 48 insertions(+), 1 deletion(-)

diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index b73e88c5f29b..6c084efa9fb6 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
 
+  # set DIP switch DSW3-PIN1 (GPIO pin PD[0] on the SoC) to clear the varstore
+  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
+
 [PcdsPatchableInModule]
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
@@ -418,6 +421,7 @@ [Components.common]
   MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+  Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
     <LibraryClasses>
       NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
index 34100bb63da4..6cc523fac4f3 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
@@ -258,6 +258,7 @@ [FV.FVMAIN_COMPACT]
   INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+  INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
   INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
index dd1469decc5d..c8a9f39cd1ae 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
@@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
   gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
 
+  # set DIP switch DSW3-PIN1 (GPIO pin PD[0] on the SoC) to clear the varstore
+  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
+
 [PcdsPatchableInModule]
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
   gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
@@ -406,6 +409,7 @@ [Components.common]
   MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+  Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
     <LibraryClasses>
       NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
index 365085c8f243..4577bd316a1f 100644
--- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
+++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
@@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
   INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+  INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
   INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
index 358dd5a91f08..401cf3c81273 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
@@ -21,8 +21,11 @@
 #include <Library/PeiServicesLib.h>
 #include <Platform/DramInfo.h>
 #include <Ppi/DramInfo.h>
+#include <Ppi/EmbeddedGpio.h>
 #include <Ppi/MemoryDiscovered.h>
 
+#define CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED   0xff
+
 STATIC
 CONST DRAM_INFO *mDramInfo = (VOID *)(UINTN)FixedPcdGet64 (PcdDramInfoBase);
 
@@ -103,10 +106,35 @@ PlatformPeim (
   VOID
   )
 {
-  EFI_STATUS      Status;
+  EMBEDDED_GPIO_PPI   *Gpio;
+  EFI_STATUS          Status;
+  UINTN               Value;
+  UINT8               Pin;
 
   ASSERT (mDramInfo->NumRegions > 0);
 
+  Pin = FixedPcdGet8 (PcdClearSettingsGpioPin);
+  if (Pin != CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED) {
+    Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
+               (VOID **)&Gpio);
+    ASSERT_EFI_ERROR (Status);
+
+    Status = Gpio->Set (Gpio, Pin, GPIO_MODE_INPUT);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n",
+        __FUNCTION__, Status));
+    } else {
+      Status = Gpio->Get (Gpio, Pin, &Value);
+      if (EFI_ERROR (Status)) {
+        DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n",
+          __FUNCTION__, Status));
+      } else if (Value > 0) {
+        DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
+        PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
+      }
+    }
+  }
+
   //
   // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
   // This is the region we will use for UEFI itself.
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
index 70eb715d44e3..a6501fb205e1 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
@@ -25,6 +25,7 @@ [Sources]
 
 [Packages]
   ArmPkg/ArmPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -40,11 +41,16 @@ [LibraryClasses]
 [FixedPcd]
   gArmTokenSpaceGuid.PcdFvBaseAddress
   gArmTokenSpaceGuid.PcdFvSize
+  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
   gSynQuacerTokenSpaceGuid.PcdDramInfoBase
 
 [Ppis]
+  gEdkiiEmbeddedGpioPpiGuid             ## CONSUMES
   gSynQuacerDramInfoPpiGuid             ## PRODUCES
 
 [Pcd]
   gArmTokenSpaceGuid.PcdSystemMemoryBase
   gArmTokenSpaceGuid.PcdSystemMemorySize
+
+[Depex]
+  gEdkiiEmbeddedGpioPpiGuid
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
index 1a683b81521b..cb3f836f5922 100644
--- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
+++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
@@ -30,3 +30,6 @@ [PcdsFixedAtBuild]
 
   gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
   gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
+
+  # GPIO pin index [0 .. 31] or 0xFF for not implemented
+  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0xFF|UINT8|0x00000004
-- 
2.11.0

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Re: [edk2] [PATCH edk2-platforms v5 1/6] Silicon/SynQuacer: implement 'clear NVRAM' feature using a DIP switch
Posted by Leif Lindholm 8 years ago 
On Fri, Nov 17, 2017 at 07:04:18PM +0000, Ard Biesheuvel wrote:
> Ordinary computers typically have a physical switch or jumper on the
> board that allows non-volatile settings to be cleared. Let's implement
> the same using DIP switch #1 on block #3, and clear the EFI variable
> store if it is set to ON at boot time.
> 
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> v5: use MAX_UINT8 as 'not implemented' GPIO index

So, you say that ...

>  Platform/Socionext/DeveloperBox/DeveloperBox.dsc                                        |  4 +++
>  Platform/Socionext/DeveloperBox/DeveloperBox.fdf                                        |  1 +
>  Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc                            |  4 +++
>  Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf                            |  1 +
>  Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c   | 30 +++++++++++++++++++-
>  Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf |  6 ++++
>  Silicon/Socionext/SynQuacer/SynQuacer.dec                                               |  3 ++
>  7 files changed, 48 insertions(+), 1 deletion(-)
> 
> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> index b73e88c5f29b..6c084efa9fb6 100644
> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> @@ -381,6 +381,9 @@ [PcdsFixedAtBuild.common]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorId|0x4f524e4c # LNRO
>    gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision|1
>  
> +  # set DIP switch DSW3-PIN1 (GPIO pin PD[0] on the SoC) to clear the varstore
> +  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
> +
>  [PcdsPatchableInModule]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
>    gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -418,6 +421,7 @@ [Components.common]
>    MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>    MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>    MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> +  Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>    MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>      <LibraryClasses>
>        NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
> index 34100bb63da4..6cc523fac4f3 100644
> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.fdf
> @@ -258,6 +258,7 @@ [FV.FVMAIN_COMPACT]
>    INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>    INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>    INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> +  INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>    INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/DeveloperBox/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>    INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>  
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> index dd1469decc5d..c8a9f39cd1ae 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc
> @@ -369,6 +369,9 @@ [PcdsFixedAtBuild.common]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x08420000
>    gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
>  
> +  # set DIP switch DSW3-PIN1 (GPIO pin PD[0] on the SoC) to clear the varstore
> +  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0
> +
>  [PcdsPatchableInModule]
>    gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
>    gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
> @@ -406,6 +409,7 @@ [Components.common]
>    MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>    MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>    MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> +  Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>    MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>      <LibraryClasses>
>        NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> index 365085c8f243..4577bd316a1f 100644
> --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
> @@ -248,6 +248,7 @@ [FV.FVMAIN_COMPACT]
>    INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
>    INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
>    INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
> +  INF Silicon/Socionext/SynQuacer/Drivers/SynQuacerGpioPei/SynQuacerGpioPei.inf
>    INF RuleOverride = FMP_IMAGE_DESC Platform/Socionext/SynQuacerEvalBoard/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>    INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>  
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> index 358dd5a91f08..401cf3c81273 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c
> @@ -21,8 +21,11 @@
>  #include <Library/PeiServicesLib.h>
>  #include <Platform/DramInfo.h>
>  #include <Ppi/DramInfo.h>
> +#include <Ppi/EmbeddedGpio.h>
>  #include <Ppi/MemoryDiscovered.h>
>  
> +#define CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED   0xff
> +

...but then actually use 0xff.
If you fold in MAX_UINT8 ...

>  STATIC
>  CONST DRAM_INFO *mDramInfo = (VOID *)(UINTN)FixedPcdGet64 (PcdDramInfoBase);
>  
> @@ -103,10 +106,35 @@ PlatformPeim (
>    VOID
>    )
>  {
> -  EFI_STATUS      Status;
> +  EMBEDDED_GPIO_PPI   *Gpio;
> +  EFI_STATUS          Status;
> +  UINTN               Value;
> +  UINT8               Pin;
>  
>    ASSERT (mDramInfo->NumRegions > 0);
>  
> +  Pin = FixedPcdGet8 (PcdClearSettingsGpioPin);
> +  if (Pin != CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED) {
> +    Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
> +               (VOID **)&Gpio);
> +    ASSERT_EFI_ERROR (Status);
> +
> +    Status = Gpio->Set (Gpio, Pin, GPIO_MODE_INPUT);
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n",
> +        __FUNCTION__, Status));
> +    } else {
> +      Status = Gpio->Get (Gpio, Pin, &Value);
> +      if (EFI_ERROR (Status)) {
> +        DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n",
> +          __FUNCTION__, Status));
> +      } else if (Value > 0) {
> +        DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
> +        PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
> +      }
> +    }
> +  }
> +
>    //
>    // Record the first region into PcdSystemMemoryBase and PcdSystemMemorySize.
>    // This is the region we will use for UEFI itself.
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> index 70eb715d44e3..a6501fb205e1 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf
> @@ -25,6 +25,7 @@ [Sources]
>  
>  [Packages]
>    ArmPkg/ArmPkg.dec
> +  EmbeddedPkg/EmbeddedPkg.dec
>    MdePkg/MdePkg.dec
>    MdeModulePkg/MdeModulePkg.dec
>    Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -40,11 +41,16 @@ [LibraryClasses]
>  [FixedPcd]
>    gArmTokenSpaceGuid.PcdFvBaseAddress
>    gArmTokenSpaceGuid.PcdFvSize
> +  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
>    gSynQuacerTokenSpaceGuid.PcdDramInfoBase
>  
>  [Ppis]
> +  gEdkiiEmbeddedGpioPpiGuid             ## CONSUMES
>    gSynQuacerDramInfoPpiGuid             ## PRODUCES
>  
>  [Pcd]
>    gArmTokenSpaceGuid.PcdSystemMemoryBase
>    gArmTokenSpaceGuid.PcdSystemMemorySize
> +
> +[Depex]
> +  gEdkiiEmbeddedGpioPpiGuid
> diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> index 1a683b81521b..cb3f836f5922 100644
> --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec
> +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec
> @@ -30,3 +30,6 @@ [PcdsFixedAtBuild]
>  
>    gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase|0|UINT32|0x00000002
>    gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress|0|UINT8|0x00000003
> +
> +  # GPIO pin index [0 .. 31] or 0xFF for not implemented
> +  gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0xFF|UINT8|0x00000004

...including here (the comment):
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

> -- 
> 2.11.0
> 
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Patchew 2.1-devel-8c64711

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