From nobody Wed Dec 25 04:21:13 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1512426219602692.7680775126457; Mon, 4 Dec 2017 14:23:39 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A33A12035624E; Mon, 4 Dec 2017 14:18:55 -0800 (PST) Received: from mail-wm0-x231.google.com (mail-wm0-x231.google.com [IPv6:2a00:1450:400c:c09::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94AE720356241 for ; Mon, 4 Dec 2017 14:18:54 -0800 (PST) Received: by mail-wm0-x231.google.com with SMTP id l141so8627510wmg.1 for ; Mon, 04 Dec 2017 14:23:24 -0800 (PST) Received: from localhost.localdomain ([105.150.171.234]) by smtp.gmail.com with ESMTPSA id x133sm5667961wmd.44.2017.12.04.14.23.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Dec 2017 14:23:21 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::231; helo=mail-wm0-x231.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5P6U2JNpIb+e/VXLv0+IZeO0uaiTqdf5tOtqGjHwxCU=; b=MqPO85xQdwoero6gUNWt7B0aBI4vfpW7TQt1kk2Sc+701X2764AVCSJKZCrAfzRHky mHWVjvbnGKRNlUzJqD0atkP1olG2NcN8xGwlfdm8lLKFC7d5apgNvIE1P+E3RttxV9Bl 1PY207tl190M6aK4EfZ6uDOtv0+GVEXawB0Pg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5P6U2JNpIb+e/VXLv0+IZeO0uaiTqdf5tOtqGjHwxCU=; b=FBA3sL9mR63z2B7DCjkHhkEyrRL21c08/tU3dxm2USuAORr/qG9YBjYN6tAOqTidQJ lkVTGDONdiXrWr++naBxbG/oMM24B2hZe9CEfO9GU5HLAV/fGtzc+ICdMCTH0wSon9G2 V8iZCV3gSl3hnQu8PMlWa0Q/p6hgop9dLNvAAHaGusozKK+blLUiIV7n41QHXQeSXfZA lqFGcBxw9OSVqeccsVrtb/yYh20lFkWmdKU5QRQ9ZSW0tRcPGMI30AL3ycYhPD624mFl EtvMCLEyxnVidH03xFsYUkSt0frkIUU9D/wAWI1DUrlpURc4ykO1sDwcoMl0BSjJ92+G pNaA== X-Gm-Message-State: AKGB3mJoACgcvW1+ldV3ncEiYnIJlvTfVa17nWT43BK0Je/ZesfvJoKl 3y/Mt6NUpCR5R8XePo7QoFD8idQ7zaQ= X-Google-Smtp-Source: AGs4zMb1pWxLhpWO3JiNtwW3zb819D75pzWu3LuvEtQlGERqokWbCj8eWTR+7CWAn6szUJihxJnsVw== X-Received: by 10.28.173.213 with SMTP id w204mr4459048wme.126.1512426202466; Mon, 04 Dec 2017 14:23:22 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Mon, 4 Dec 2017 22:22:43 +0000 Message-Id: <20171204222243.15950-14-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171204222243.15950-1-ard.biesheuvel@linaro.org> References: <20171204222243.15950-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v2 13/13] ArmPlatformPkg: remove unused SP804 driver and TimerLib implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" None of the platforms we support use these so remove them. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by-if-no-comments-by-15-Dec: Leif Lindholm Reviewed-by-if-no-comments-by-15-Dec: Leif Lindholm --- ArmPlatformPkg/ArmPlatformPkg.dec | 7 - ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c | 395 -------------= ------- ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf | 59 --- ArmPlatformPkg/Include/Drivers/SP804Timer.h | 57 --- ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c | 256 ------------- ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf | 44 --- 6 files changed, 818 deletions(-) diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatform= Pkg.dec index d42404e8cd38..6a7bbc02d011 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -86,13 +86,6 @@ [PcdsFixedAtBuild.common] # ARM Primecells # =20 - ## SP804 DualTimer - gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz|1|UINT32|0x000000= 1D - gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum|0|UINT32|0x= 0000001E - gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase|0|UINT32|0x0000002A - gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase|0|UINT32|0x00000= 02B - gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase|0|UINT32|0x0000002C - ## SP805 Watchdog gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023 gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT= 32|0x00000021 diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c b/ArmPlatfor= mPkg/Drivers/SP804TimerDxe/SP804Timer.c deleted file mode 100644 index 7ae25e9bb92a..000000000000 --- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c +++ /dev/null @@ -1,395 +0,0 @@ -/** @file - Template for Timer Architecture Protocol driver of the ARM flavor - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BS= D License - which accompanies this distribution. The full text of the license may b= e found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. - -**/ - - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include - -#define SP804_TIMER_PERIODIC_BASE ((UINTN)PcdGet32 (PcdSP804TimerPerio= dicBase)) -#define SP804_TIMER_METRONOME_BASE ((UINTN)PcdGet32 (PcdSP804TimerMetro= nomeBase)) -#define SP804_TIMER_PERFORMANCE_BASE ((UINTN)PcdGet32 (PcdSP804TimerPerfo= rmanceBase)) - -// The notification function to call on every timer interrupt. -EFI_TIMER_NOTIFY mTimerNotifyFunction =3D (EFI_TIMER_NOTIFY)NULL; -EFI_EVENT EfiExitBootServicesEvent =3D (EFI_EVENT)NULL; - -// The current period of the timer interrupt -UINT64 mTimerPeriod =3D 0; - -// Cached copy of the Hardware Interrupt protocol instance -EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt =3D NULL; - -// Cached interrupt vector -UINTN gVector; - - -/** - - C Interrupt Handler called in the interrupt context when Source interrup= t is active. - - - @param Source Source of the interrupt. Hardware routing off a sp= ecific platform defines - what source means. - - @param SystemContext Pointer to system register context. Mostly used by= debuggers and will - update the system context after the return from th= e interrupt if - modified. Don't change these values unless you kno= w what you are doing - -**/ -VOID -EFIAPI -TimerInterruptHandler ( - IN HARDWARE_INTERRUPT_SOURCE Source, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - EFI_TPL OriginalTPL; - - // - // DXE core uses this callback for the EFI timer tick. The DXE core uses= locks - // that raise to TPL_HIGH and then restore back to current level. Thus w= e need - // to make sure TPL level is set to TPL_HIGH while we are handling the t= imer tick. - // - OriginalTPL =3D gBS->RaiseTPL (TPL_HIGH_LEVEL); - - // If the interrupt is shared then we must check if this interrupt sourc= e is the one associated to this Timer - if (MmioRead32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_MSK_INT_STS_REG)= !=3D 0) { - // Clear the periodic interrupt - MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_INT_CLR_REG, 0); - - // Signal end of interrupt early to help avoid losing subsequent ticks= from long duration handlers - gInterrupt->EndOfInterrupt (gInterrupt, Source); - - if (mTimerNotifyFunction) { - mTimerNotifyFunction (mTimerPeriod); - } - } - - gBS->RestoreTPL (OriginalTPL); -} - -/** - This function registers the handler NotifyFunction so it is called every= time - the timer interrupt fires. It also passes the amount of time since the = last - handler call to the NotifyFunction. If NotifyFunction is NULL, then the - handler is unregistered. If the handler is registered, then EFI_SUCCESS= is - returned. If the CPU does not support registering a timer interrupt han= dler, - then EFI_UNSUPPORTED is returned. If an attempt is made to register a h= andler - when a handler is already registered, then EFI_ALREADY_STARTED is return= ed. - If an attempt is made to unregister a handler when a handler is not regi= stered, - then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to - register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ER= ROR - is returned. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The function to call when a timer interrupt fir= es. This - function executes at TPL_HIGH_LEVEL. The DXE Co= re will - register a handler for the timer interrupt, so = it can know - how much time has passed. This information is u= sed to - signal timer based events. NULL will unregister= the handler. - @retval EFI_SUCCESS The timer handler was registered. - @retval EFI_UNSUPPORTED The platform does not support timer interr= upts. - @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler = is already - registered. - @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was = not - previously registered. - @retval EFI_DEVICE_ERROR The timer handler could not be registered. - -**/ -EFI_STATUS -EFIAPI -TimerDriverRegisterHandler ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN EFI_TIMER_NOTIFY NotifyFunction - ) -{ - if ((NotifyFunction =3D=3D NULL) && (mTimerNotifyFunction =3D=3D NULL)) { - return EFI_INVALID_PARAMETER; - } - - if ((NotifyFunction !=3D NULL) && (mTimerNotifyFunction !=3D NULL)) { - return EFI_ALREADY_STARTED; - } - - mTimerNotifyFunction =3D NotifyFunction; - - return EFI_SUCCESS; -} - -/** - Make sure all Dual Timers are disabled -**/ -VOID -EFIAPI -ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - // Disable 'Periodic Operation' timer if enabled - if (MmioRead32(SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG) & SP= 804_TIMER_CTRL_ENABLE) { - MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, 0); - } - - // Disable 'Metronome/Delay' timer if enabled - if (MmioRead32(SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & S= P804_TIMER_CTRL_ENABLE) { - MmioAnd32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, 0); - } - - // Disable 'Performance' timer if enabled - if (MmioRead32(SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) &= SP804_TIMER_CTRL_ENABLE) { - MmioAnd32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, 0); - } -} - -/** - - This function adjusts the period of timer interrupts to the value specif= ied - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. = If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer inter= rupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust t= he - interrupt controller so that a CPU interrupt is not generated when the t= imer - interrupt fires. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The rate to program the timer interrupt in 100 = nS units. If - the timer hardware is not programmable, then EF= I_UNSUPPORTED is - returned. If the timer is programmable, then th= e timer period - will be rounded up to the nearest timer period = that is supported - by the timer hardware. If TimerPeriod is set to= 0, then the - timer interrupts will be disabled. - - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period of t= he timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed due = to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverSetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod - ) -{ - EFI_STATUS Status; - UINT64 TimerTicks; - - // always disable the timer - MmioAnd32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, ~SP804_T= IMER_CTRL_ENABLE); - - if (TimerPeriod =3D=3D 0) { - // Leave timer disabled from above, and... - - // Disable timer 0/1 interrupt for a TimerPeriod of 0 - Status =3D gInterrupt->DisableInterruptSource (gInterrupt, gVector); - } else { - // Convert TimerPeriod into 1MHz clock counts (us units =3D 100ns unit= s * 10) - TimerTicks =3D DivU64x32 (TimerPeriod, 10); - TimerTicks =3D MultU64x32 (TimerTicks, PcdGet32(PcdSP804TimerFrequency= InMHz)); - - // if it's larger than 32-bits, pin to highest value - if (TimerTicks > 0xffffffff) { - TimerTicks =3D 0xffffffff; - } - - // Program the SP804 timer with the new count value - MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_LOAD_REG, TimerTi= cks); - - // enable the timer - MmioOr32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_T= IMER_CTRL_ENABLE); - - // enable timer 0/1 interrupts - Status =3D gInterrupt->EnableInterruptSource (gInterrupt, gVector); - } - - // Save the new timer period - mTimerPeriod =3D TimerPeriod; - return Status; -} - -/** - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPer= iod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 = is - returned, then the timer is currently disabled. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 10= 0 ns units. If - 0 is returned, then the timer is currently disa= bled. - - - @retval EFI_SUCCESS The timer period was returned in TimerPeri= od. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -{ - if (TimerPeriod =3D=3D NULL) { - return EFI_INVALID_PARAMETER; - } - - *TimerPeriod =3D mTimerPeriod; - return EFI_SUCCESS; -} - -/** - This function generates a soft timer interrupt. If the platform does not= support soft - timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCE= SS is returned. - If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.Reg= isterHandler() - service, then a soft timer interrupt will be generated. If the timer int= errupt is - enabled when this service is called, then the registered handler will be= invoked. The - registered handler should not be able to distinguish a hardware-generate= d timer - interrupt from a software-generated timer interrupt. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS The soft timer interrupt was generated. - @retval EFI_UNSUPPORTED The platform does not support the generati= on of soft timer interrupts. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGenerateSoftInterrupt ( - IN EFI_TIMER_ARCH_PROTOCOL *This - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Interface structure for the Timer Architectural Protocol. - - @par Protocol Description: - This protocol provides the services to initialize a periodic timer - interrupt, and to register a handler that is called each time the timer - interrupt fires. It may also provide a service to adjust the rate of the - periodic timer interrupt. When a timer interrupt occurs, the handler is - passed the amount of time that has passed since the previous timer - interrupt. - - @param RegisterHandler - Registers a handler that will be called each time the - timer interrupt fires. TimerPeriod defines the minimum - time between timer interrupts, so TimerPeriod will also - be the minimum time between calls to the registered - handler. - - @param SetTimerPeriod - Sets the period of the timer interrupt in 100 nS units. - This function is optional, and may return EFI_UNSUPPORTED. - If this function is supported, then the timer period will - be rounded up to the nearest supported timer period. - - - @param GetTimerPeriod - Retrieves the period of the timer interrupt in 100 nS units. - - @param GenerateSoftInterrupt - Generates a soft timer interrupt that simulates the firing of - the timer interrupt. This service can be used to invoke the registered= handler if the timer interrupt has been masked for - a period of time. - -**/ -EFI_TIMER_ARCH_PROTOCOL gTimer =3D { - TimerDriverRegisterHandler, - TimerDriverSetTimerPeriod, - TimerDriverGetTimerPeriod, - TimerDriverGenerateSoftInterrupt -}; - - -/** - Initialize the state information for the Timer Architectural Protocol and - the Timer Debug support protocol that allows the debugger to break into a - running program. - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -EFIAPI -TimerInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_HANDLE Handle =3D NULL; - EFI_STATUS Status; - - // Set the interrupt timer number - gVector =3D PcdGet32(PcdSP804TimerPeriodicInterruptNum); - - // Find the interrupt controller protocol. ASSERT if not found. - Status =3D gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (= VOID **)&gInterrupt); - ASSERT_EFI_ERROR (Status); - - // Disable the timer - Status =3D TimerDriverSetTimerPeriod (&gTimer, 0); - ASSERT_EFI_ERROR (Status); - - // Install interrupt handler - Status =3D gInterrupt->RegisterInterruptSource (gInterrupt, gVector, Tim= erInterruptHandler); - ASSERT_EFI_ERROR (Status); - - // configure timer 0 for periodic operation, 32 bits, no prescaler, and = interrupt enabled - MmioWrite32 (SP804_TIMER_PERIODIC_BASE + SP804_TIMER_CONTROL_REG, SP804_= TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804= _TIMER_CTRL_INT_ENABLE); - - // Set up default timer - Status =3D TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPer= iod)); // TIMER_DEFAULT_PERIOD - ASSERT_EFI_ERROR (Status); - - // Install the Timer Architectural Protocol onto a new handle - Status =3D gBS->InstallMultipleProtocolInterfaces( - &Handle, - &gEfiTimerArchProtocolGuid, &gTimer, - NULL - ); - ASSERT_EFI_ERROR(Status); - - // Register for an ExitBootServicesEvent - Status =3D gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, = ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf b/ArmPl= atformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf deleted file mode 100644 index 386d9649efab..000000000000 --- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf +++ /dev/null @@ -1,59 +0,0 @@ -#/** @file -# -# Component description file for Timer module -# -# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the B= SD License -# which accompanies this distribution. The full text of the license may = be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -# -#**/ - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D ArmVeTimerDxe - FILE_GUID =3D a73d663d-a491-4278-9a69-9521be3379f2 - MODULE_TYPE =3D DXE_DRIVER - VERSION_STRING =3D 1.0 - - ENTRY_POINT =3D TimerInitialize - -[Sources.common] - SP804Timer.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - BaseLib - UefiRuntimeServicesTableLib - UefiLib - UefiBootServicesTableLib - BaseMemoryLib - DebugLib - UefiDriverEntryPoint - IoLib - -[Guids] - -[Protocols] - gEfiTimerArchProtocolGuid - gHardwareInterruptProtocolGuid - -[Pcd.common] - gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz - gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum - gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase - gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase - gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase - gEmbeddedTokenSpaceGuid.PcdTimerPeriod - -[Depex] - gHardwareInterruptProtocolGuid diff --git a/ArmPlatformPkg/Include/Drivers/SP804Timer.h b/ArmPlatformPkg/I= nclude/Drivers/SP804Timer.h deleted file mode 100644 index 904b13c19325..000000000000 --- a/ArmPlatformPkg/Include/Drivers/SP804Timer.h +++ /dev/null @@ -1,57 +0,0 @@ -/** @file -* -* Copyright (c) 2011, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the B= SD License -* which accompanies this distribution. The full text of the license may = be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -* -**/ - - -#ifndef _SP804_TIMER_H__ -#define _SP804_TIMER_H__ - -// SP804 Timer constants -// Note: The SP804 Timer module comprises two timers, Timer_0 and Timer_1 -// These timers are identical and all their registers have an offset= of 0x20 -// i.e. SP804_TIMER_0_LOAD_REG =3D 0x00 and SP804_TIMER_1_LOAD_REG = =3D 0x20 -// Therefore, define all registers only once and adjust the base add= resses by 0x20 -#define SP804_TIMER_LOAD_REG 0x00 -#define SP804_TIMER_CURRENT_REG 0x04 -#define SP804_TIMER_CONTROL_REG 0x08 -#define SP804_TIMER_INT_CLR_REG 0x0C -#define SP804_TIMER_RAW_INT_STS_REG 0x10 -#define SP804_TIMER_MSK_INT_STS_REG 0x14 -#define SP804_TIMER_BG_LOAD_REG 0x18 - -// Timer control register bit definitions -#define SP804_TIMER_CTRL_ONESHOT BIT0 -#define SP804_TIMER_CTRL_32BIT BIT1 -#define SP804_TIMER_CTRL_PRESCALE_MASK (BIT3|BIT2) -#define SP804_PRESCALE_DIV_1 0 -#define SP804_PRESCALE_DIV_16 BIT2 -#define SP804_PRESCALE_DIV_256 BIT3 -#define SP804_TIMER_CTRL_INT_ENABLE BIT5 -#define SP804_TIMER_CTRL_PERIODIC BIT6 -#define SP804_TIMER_CTRL_ENABLE BIT7 - -// Other SP804 Timer definitions -#define SP804_MAX_TICKS 0xFFFFFFFF - -// SP810 System Controller constants -#define SP810_SYS_CTRL_REG 0x00 -#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=3DREFCLK, 1=3DTIMCLK -#define SP810_SYS_CTRL_TIMER0_EN BIT16 -#define SP810_SYS_CTRL_TIMER1_TIMCLK BIT17 // 0=3DREFCLK, 1=3DTIMCLK -#define SP810_SYS_CTRL_TIMER1_EN BIT18 -#define SP810_SYS_CTRL_TIMER2_TIMCLK BIT19 // 0=3DREFCLK, 1=3DTIMCLK -#define SP810_SYS_CTRL_TIMER2_EN BIT20 -#define SP810_SYS_CTRL_TIMER3_TIMCLK BIT21 // 0=3DREFCLK, 1=3DTIMCLK -#define SP810_SYS_CTRL_TIMER3_EN BIT22 - -#endif diff --git a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c b/ArmPlat= formPkg/Library/SP804TimerLib/SP804TimerLib.c deleted file mode 100644 index 16798e9ba97f..000000000000 --- a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c +++ /dev/null @@ -1,256 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BS= D License - which accompanies this distribution. The full text of the license may b= e found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. - -**/ - -#include - -#include -#include -#include -#include -#include -#include - -#define SP804_TIMER_METRONOME_BASE ((UINTN)PcdGet32 (PcdSP804TimerMetro= nomeBase)) -#define SP804_TIMER_PERFORMANCE_BASE ((UINTN)PcdGet32 (PcdSP804TimerPerfo= rmanceBase)) - -// Setup SP810's Timer2 for managing delay functions. And Timer3 for Perfo= rmance counter -// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe. -RETURN_STATUS -EFIAPI -TimerConstructor ( - VOID - ) -{ - // Check if the Metronome Timer is already initialized - if ((MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) &= SP804_TIMER_CTRL_ENABLE) =3D=3D 0) { - // Configure the Metronome Timer for free running operation, 32 bits, = no prescaler, and interrupt disabled - MmioWrite32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP8= 04_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1); - - // Start the Metronome Timer ticking - MmioOr32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG, SP804_= TIMER_CTRL_ENABLE); - } - - // Check if the Performance Timer is already initialized - if ((MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG)= & SP804_TIMER_CTRL_ENABLE) =3D=3D 0) { - // Configure the Performance timer for free running operation, 32 bits= , no prescaler, interrupt disabled - MmioWrite32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, S= P804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1); - - // Start the Performance Timer ticking - MmioOr32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG, SP80= 4_TIMER_CTRL_ENABLE); - } - - return RETURN_SUCCESS; -} - -/** - Stalls the CPU for at least the given number of microseconds. - - Stalls the CPU for the number of microseconds specified by MicroSeconds. - The hardware timer is 32 bits. - The maximum possible delay is (0xFFFFFFFF / TimerFrequencyMHz), i.e. ([3= 2bits] / FreqInMHz) - For example: - +----------------+------------+----------+----------+ - | TimerFrequency | MaxDelay | MaxDelay | MaxDelay | - | (MHz) | (us) | (s) | (min) | - +----------------+------------+----------+----------+ - | 1 | 0xFFFFFFFF | 4294 | 71.5 | - | 5 | 0x33333333 | 859 | 14.3 | - | 10 | 0x19999999 | 429 | 7.2 | - | 50 | 0x051EB851 | 86 | 1.4 | - +----------------+------------+----------+----------+ - If it becomes necessary to support higher delays, then consider using the - real time clock. - - During this delay, the cpu is not yielded to any other process, with one= exception: - events that are triggered off a timer and which execute at a higher TPL = than - this function. These events may call MicroSecondDelay (or NanoSecondDela= y) to - fulfil their own needs. - Therefore, this function must be re-entrant, as it may be interrupted an= d re-started. - - @param MicroSeconds The minimum number of microseconds to delay. - - @return The value of MicroSeconds inputted. - -**/ -UINTN -EFIAPI -MicroSecondDelay ( - IN UINTN MicroSeconds - ) -{ - UINT64 DelayTicks64; // Convert from microseconds to timer ti= cks, more bits to detect over-range conditions. - UINTN DelayTicks; // Convert from microseconds to timer ti= cks, native size for general calculations. - UINTN StartTicks; // Timer value snapshot at the start of = the delay - UINTN TargetTicks; // Timer value to signal the end of the = delay - UINTN CurrentTicks; // Current value of the 64-bit timer val= ue at any given moment - - // If we snapshot the timer at the start of the delay function then we m= inimise unaccounted overheads. - StartTicks =3D MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURR= ENT_REG); - - // We are operating at the limit of 32bits. For the range checking work = in 64 bits to avoid overflows. - DelayTicks64 =3D MultU64x32((UINT64)MicroSeconds, PcdGet32(PcdSP804Timer= FrequencyInMHz)); - - // We are limited to 32 bits. - // If the specified delay is exactly equal to the max range of the timer, - // then the start will be equal to the stop plus one timer overflow (wra= p-around). - // To avoid having to check for that, reduce the maximum acceptable rang= e by 1 tick, - // i.e. reject delays equal or greater than the max range of the timer. - if (DelayTicks64 >=3D (UINT64)SP804_MAX_TICKS) { - DEBUG((EFI_D_ERROR,"MicroSecondDelay: ERROR: MicroSeconds=3D%d exceed = SP804 count range. Max MicroSeconds=3D%d\n", - MicroSeconds, - ((UINTN)SP804_MAX_TICKS/PcdGet32(PcdSP804TimerFrequencyInMHz)))); - } - ASSERT(DelayTicks64 < (UINT64)SP804_MAX_TICKS); - - // From now on do calculations only in native bit size. - DelayTicks =3D (UINTN)DelayTicks64; - - // Calculate the target value of the timer. - - //Note: SP804 timer is counting down - if (StartTicks >=3D DelayTicks) { - // In this case we do not expect a wrap-around of the timer to occur. - // CurrentTicks must be less than StartTicks and higher than TargetTic= ks. - // If this is not the case, then the delay has been reached and may ev= en have been exceeded if this - // function was suspended by a higher priority interrupt. - - TargetTicks =3D StartTicks - DelayTicks; - - do { - CurrentTicks =3D MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIME= R_CURRENT_REG); - } while ((CurrentTicks > TargetTicks) && (CurrentTicks <=3D StartTicks= )); - - } else { - // In this case TargetTicks is larger than StartTicks. - // This means we expect a wrap-around of the timer to occur and we mus= t wait for it. - // Before the wrap-around, CurrentTicks must be less than StartTicks a= nd less than TargetTicks. - // After the wrap-around, CurrentTicks must be larger than StartTicks = and larger than TargetTicks. - // If this is not the case, then the delay has been reached and may ev= en have been exceeded if this - // function was suspended by a higher priority interrupt. - - // The order of operations is essential to avoid arithmetic overflow p= roblems - TargetTicks =3D ((UINTN)SP804_MAX_TICKS - DelayTicks) + StartTicks; - - // First wait for the wrap-around to occur - do { - CurrentTicks =3D MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIME= R_CURRENT_REG); - } while (CurrentTicks <=3D StartTicks); - - // Then wait for the target - do { - CurrentTicks =3D MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIME= R_CURRENT_REG); - } while (CurrentTicks > TargetTicks); - } - - return MicroSeconds; -} - -/** - Stalls the CPU for at least the given number of nanoseconds. - - Stalls the CPU for the number of nanoseconds specified by NanoSeconds. - - When the timer frequency is 1MHz, each tick corresponds to 1 microsecond. - Therefore, the nanosecond delay will be rounded up to the nearest 1 micr= osecond. - - @param NanoSeconds The minimum number of nanoseconds to delay. - - @return The value of NanoSeconds inputted. - -**/ -UINTN -EFIAPI -NanoSecondDelay ( - IN UINTN NanoSeconds - ) -{ - UINTN MicroSeconds; - - // Round up to 1us Tick Number - MicroSeconds =3D NanoSeconds / 1000; - MicroSeconds +=3D ((NanoSeconds % 1000) =3D=3D 0) ? 0 : 1; - - MicroSecondDelay (MicroSeconds); - - return NanoSeconds; -} - -/** - Retrieves the current value of a 64-bit free running performance counter. - - The counter can either count up by 1 or count down by 1. If the physical - performance counter counts by a larger increment, then the counter values - must be translated. The properties of the counter can be retrieved from - GetPerformanceCounterProperties(). - - @return The current value of the free running performance counter. - -**/ -UINT64 -EFIAPI -GetPerformanceCounter ( - VOID - ) -{ - // Free running 64-bit/32-bit counter is needed here. - // Don't think we need this to boot, just to do performance profile - UINT64 Value; - Value =3D MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CURRENT= _REG); - return Value; -} - - -/** - Retrieves the 64-bit frequency in Hz and the range of performance counter - values. - - If StartValue is not NULL, then the value that the performance counter s= tarts - with immediately after is it rolls over is returned in StartValue. If - EndValue is not NULL, then the value that the performance counter end wi= th - immediately before it rolls over is returned in EndValue. The 64-bit - frequency of the performance counter in Hz is always returned. If StartV= alue - is less than EndValue, then the performance counter counts up. If StartV= alue - is greater than EndValue, then the performance counter counts down. For - example, a 64-bit free running counter that counts up would have a Start= Value - of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter - that counts down would have a StartValue of 0xFFFFFF and an EndValue of = 0. - - @param StartValue The value the performance counter starts with when it - rolls over. - @param EndValue The value that the performance counter ends with bef= ore - it rolls over. - - @return The frequency in Hz. - -**/ -UINT64 -EFIAPI -GetPerformanceCounterProperties ( - OUT UINT64 *StartValue, OPTIONAL - OUT UINT64 *EndValue OPTIONAL - ) -{ - if (StartValue !=3D NULL) { - // Timer starts with the reload value - *StartValue =3D 0xFFFFFFFF; - } - - if (EndValue !=3D NULL) { - // Timer counts down to 0x0 - *EndValue =3D (UINT64)0ULL; - } - - return PcdGet64 (PcdEmbeddedPerformanceCounterFrequencyInHz); -} diff --git a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf b/ArmPl= atformPkg/Library/SP804TimerLib/SP804TimerLib.inf deleted file mode 100644 index fb5cc189261e..000000000000 --- a/ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf +++ /dev/null @@ -1,44 +0,0 @@ -#/** @file -# Timer library implementation -# -# -# Copyright (c) 2011, ARM Ltd. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the B= SD License -# which accompanies this distribution. The full text of the license may = be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. -# -#**/ - -[Defines] - INF_VERSION =3D 0x00010005 - BASE_NAME =3D SP804TimerLib - FILE_GUID =3D 09cefa99-0d07-487f-a651-fb44f094b1c7 - MODULE_TYPE =3D BASE - VERSION_STRING =3D 1.0 - LIBRARY_CLASS =3D TimerLib - - CONSTRUCTOR =3D TimerConstructor - -[Sources.common] - SP804TimerLib.c - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - -[LibraryClasses] - DebugLib - IoLib - BaseLib - -[Pcd] - gArmPlatformTokenSpaceGuid.PcdSP804TimerFrequencyInMHz - gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase - gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase - gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel