From nobody Mon Dec 23 13:41:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516602269435363.6394479253621; Sun, 21 Jan 2018 22:24:29 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 5E5722238B593; Sun, 21 Jan 2018 22:19:01 -0800 (PST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9EE0E2232BDFB for ; Sun, 21 Jan 2018 22:18:59 -0800 (PST) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Jan 2018 22:24:25 -0800 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.19]) by orsmga004.jf.intel.com with ESMTP; 21 Jan 2018 22:24:24 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,395,1511856000"; d="scan'208";a="168031234" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Mon, 22 Jan 2018 14:24:19 +0800 Message-Id: <20180122062420.202548-2-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20180122062420.202548-1-ruiyu.ni@intel.com> References: <20180122062420.202548-1-ruiyu.ni@intel.com> Subject: [edk2] [PATCH 1/2] MdeModulePkg/PciBusDxe: reference gFullEnumeration in one file X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The patch is just a code cleanup with no functionality impact. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Star Zeng Reviewed-by: Star Zeng --- MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 32 ++++++++++++++++++--- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 40 ++++------------------= ---- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h | 8 ++++-- 3 files changed, 38 insertions(+), 42 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c b/MdeModulePkg/Bus/Pci= /PciBusDxe/PciBus.c index 950cacc120..3bb5099bd3 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c @@ -8,7 +8,7 @@ PCI Root Bridges. So it means platform needs install PCI Root Bridge IO = protocol for each PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol. =20 -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -240,8 +240,9 @@ PciBusDriverBindingStart ( IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath ) { - EFI_STATUS Status; - EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath; + EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo; =20 // // Check RemainingDevicePath validation @@ -321,12 +322,34 @@ PciBusDriverBindingStart ( ParentDevicePath ); =20 + Status =3D EFI_SUCCESS; // // Enumerate the entire host bridge // After enumeration, a database that records all the device information= will be created // // - Status =3D PciEnumerator (Controller); + if (gFullEnumeration) { + // + // Get the rootbridge Io protocol to find the host bridge handle + // + Status =3D gBS->OpenProtocol ( + Controller, + &gEfiPciRootBridgeIoProtocolGuid, + (VOID **) &PciRootBridgeIo, + gPciBusDriverBinding.DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + + if (!EFI_ERROR (Status)) { + Status =3D PciEnumerator (Controller, PciRootBridgeIo->ParentHandle); + } + } else { + // + // If PCI bus has already done the full enumeration, never do it again + // + Status =3D PciEnumeratorLight (Controller); + } =20 if (EFI_ERROR (Status)) { return Status; @@ -337,6 +360,7 @@ PciBusDriverBindingStart ( // StartPciDevices (Controller); =20 + gFullEnumeration =3D FALSE; return EFI_SUCCESS; } =20 diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/= Bus/Pci/PciBusDxe/PciEnumerator.c index d31144739f..f6aa327493 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c @@ -1,7 +1,7 @@ /** @file PCI eunmeration implementation on entire PCI bus system for PCI Bus modu= le. =20 -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015 Hewlett Packard Enterprise Development LP
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License @@ -19,7 +19,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. This routine is used to enumerate entire pci bus system in a given platform. =20 - @param Controller Parent controller handle. + @param Controller Parent controller handle. + @param HostBridgeHandle Host bridge handle. =20 @retval EFI_SUCCESS PCI enumeration finished successfully. @retval other Some error occurred when enumerating the pci bus = system. @@ -27,41 +28,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITH= ER EXPRESS OR IMPLIED. **/ EFI_STATUS PciEnumerator ( - IN EFI_HANDLE Controller + IN EFI_HANDLE Controller, + IN EFI_HANDLE HostBridgeHandle ) { - EFI_HANDLE HostBridgeHandle; EFI_STATUS Status; EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc; - EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo; - - // - // If PCI bus has already done the full enumeration, never do it again - // - if (!gFullEnumeration) { - return PciEnumeratorLight (Controller); - } - - // - // Get the rootbridge Io protocol to find the host bridge handle - // - Status =3D gBS->OpenProtocol ( - Controller, - &gEfiPciRootBridgeIoProtocolGuid, - (VOID **) &PciRootBridgeIo, - gPciBusDriverBinding.DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_GET_PROTOCOL - ); - - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Get the host bridge handle - // - HostBridgeHandle =3D PciRootBridgeIo->ParentHandle; =20 // // Get the pci host bridge resource allocation protocol @@ -132,8 +104,6 @@ PciEnumerator ( return Status; } =20 - gFullEnumeration =3D FALSE; - Status =3D gBS->InstallProtocolInterface ( &HostBridgeHandle, &gEfiPciEnumerationCompleteProtocolGuid, diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h b/MdeModulePkg/= Bus/Pci/PciBusDxe/PciEnumerator.h index 46f56618d4..2df1fb0b94 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.h @@ -1,7 +1,7 @@ /** @file PCI bus enumeration logic function declaration for PCI bus module. =20 -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD = License which accompanies this distribution. The full text of the license may be = found at @@ -21,7 +21,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. This routine is used to enumerate entire pci bus system in a given platform. =20 - @param Controller Parent controller handle. + @param Controller Parent controller handle. + @param HostBridgeHandle Host bridge handle. =20 @retval EFI_SUCCESS PCI enumeration finished successfully. @retval other Some error occurred when enumerating the pci bus = system. @@ -29,7 +30,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER= EXPRESS OR IMPLIED. **/ EFI_STATUS PciEnumerator ( - IN EFI_HANDLE Controller + IN EFI_HANDLE Controller, + IN EFI_HANDLE HostBridgeHandle ); =20 /** --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel From nobody Mon Dec 23 13:41:23 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1516602271897607.5034463689494; Sun, 21 Jan 2018 22:24:31 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C96EA2238B58E; Sun, 21 Jan 2018 22:19:03 -0800 (PST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 984F0222DDBE0 for ; Sun, 21 Jan 2018 22:19:00 -0800 (PST) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Jan 2018 22:24:26 -0800 Received: from ray-dev.ccr.corp.intel.com ([10.239.9.19]) by orsmga004.jf.intel.com with ESMTP; 21 Jan 2018 22:24:25 -0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.65; helo=mga03.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,395,1511856000"; d="scan'208";a="168031239" From: Ruiyu Ni To: edk2-devel@lists.01.org Date: Mon, 22 Jan 2018 14:24:20 +0800 Message-Id: <20180122062420.202548-3-ruiyu.ni@intel.com> X-Mailer: git-send-email 2.15.1.windows.2 In-Reply-To: <20180122062420.202548-1-ruiyu.ni@intel.com> References: <20180122062420.202548-1-ruiyu.ni@intel.com> Subject: [edk2] [PATCH 2/2] MdeModulePkg/PciBusDxe: Install PciEnumerationComplete after PciIo X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Per PI spec, the PciEnumerationComplete protocol installation should be after PciIo installation. Today's implementation installs the PciEnumerationComplete after hardware enumeration is completed, but before PciIo installation. The change corrects the spec/implementation gap. The change also benefits certain implementation that depends on the PciIo handle in PciEnumerationComplete callback. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni Cc: Star Zeng Reviewed-by: Star Zeng --- MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c | 15 +++++++++++++-- MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 10 ---------- 2 files changed, 13 insertions(+), 12 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c b/MdeModulePkg/Bus/Pci= /PciBusDxe/PciBus.c index 3bb5099bd3..c48e3bba96 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c @@ -360,8 +360,19 @@ PciBusDriverBindingStart ( // StartPciDevices (Controller); =20 - gFullEnumeration =3D FALSE; - return EFI_SUCCESS; + if (gFullEnumeration) { + gFullEnumeration =3D FALSE; + + Status =3D gBS->InstallProtocolInterface ( + &PciRootBridgeIo->ParentHandle, + &gEfiPciEnumerationCompleteProtocolGuid, + EFI_NATIVE_INTERFACE, + NULL + ); + ASSERT_EFI_ERROR (Status); + } + + return Status; } =20 /** diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/= Bus/Pci/PciBusDxe/PciEnumerator.c index f6aa327493..d5d3c07393 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c @@ -104,16 +104,6 @@ PciEnumerator ( return Status; } =20 - Status =3D gBS->InstallProtocolInterface ( - &HostBridgeHandle, - &gEfiPciEnumerationCompleteProtocolGuid, - EFI_NATIVE_INTERFACE, - NULL - ); - if (EFI_ERROR (Status)) { - return Status; - } - return EFI_SUCCESS; } =20 --=20 2.15.1.windows.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel