From nobody Mon Dec 23 09:52:20 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1519400479705613.8893724129049; Fri, 23 Feb 2018 07:41:19 -0800 (PST) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E5EC0222630AB; Fri, 23 Feb 2018 07:35:15 -0800 (PST) Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 423732034D8C0 for ; Fri, 23 Feb 2018 07:35:12 -0800 (PST) Received: by mail-wr0-x244.google.com with SMTP id s5so14552238wra.0 for ; Fri, 23 Feb 2018 07:41:14 -0800 (PST) Received: from localhost.localdomain ([196.90.4.100]) by smtp.gmail.com with ESMTPSA id 188sm2273215wmg.29.2018.02.23.07.41.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Feb 2018 07:41:11 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EoQnLrZ5sqd+Sey47zoEvRscWnmivYpIDjm382xG7Ow=; b=TORVeix9/yDO2qxRO2GpMHsfcrO0i54QEyA2e0KmnXujlEGL5UMCuOCWnM/cA5rJ+7 MJKtYDjCdwizGbFfR6Lbgy+7oiGEjgZToiYSmnVBcsZ7fOahnTuSvEZJOprF32qw5YAI 4a3vPSxK8pwjO963PBc4ysGAxtBmk+VJjCXCI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=EoQnLrZ5sqd+Sey47zoEvRscWnmivYpIDjm382xG7Ow=; b=NFo9Il+RaXn2ZTFY6lIvipWqG/ctfqa0K10znvE1K21O54eQMJju7Qx98lXDw4txI6 V6tVHlH9v7h5sIAvd7hQ0RT/rPBNB9PBWFDfSLiajJM0SlQJ1XGuWPZQniZCxV2rEb1Z Kt+Db03zSdSI7Kpesx86jpa7kjZen5ebJzwc/zTvgTUrhnOkDUMIM5VDWcNcR38o9hNd l83Ze+gFZmZczTAFMhzyJJe3NtSV9X5WPyh8H74jQRwvp36oStkuEa6QTZEnC03yft7p jgG5B9Ib5G/XpzNnRRuq/5VV0/sGpIRXoN9w2ERWkIcFcNv4LZsFnNVCEH4GIBT5066v Ox7Q== X-Gm-Message-State: APf1xPDeBEMtwhmrHrAwyPVBOZQ/AwVFFulR0sHBeVCPXrFkereOwWfL BTbM5f6v8NtqZeI3A1VInU+0Q8pKTzU= X-Google-Smtp-Source: AH8x226xP7FlpWcyTGUCdwTjCqIwGPvZtsK1eggrR5CpT++ausXRUD3g7FZ2btrmUWGhSys421V4tA== X-Received: by 10.223.176.86 with SMTP id g22mr1962166wra.11.1519400472353; Fri, 23 Feb 2018 07:41:12 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 23 Feb 2018 15:40:50 +0000 Message-Id: <20180223154052.9828-5-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180223154052.9828-1-ard.biesheuvel@linaro.org> References: <20180223154052.9828-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms v3 4/6] Platform/96Boards: add a driver for the Secure96 mezzanine board X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Add a driver that describes the Secure96 mezzanine board, and exposes both the information required to describe it to the OS using a DT overlay, and to describe it to UEFI itself. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/96Boards/Secure96Dxe/Secure96.dts | 85 ++++++++ Platform/96Boards/Secure96Dxe/Secure96.h | 26 +++ Platform/96Boards/Secure96Dxe/Secure96Dxe.c | 211 ++++++++++++++++++++ Platform/96Boards/Secure96Dxe/Secure96Dxe.inf | 67 +++++++ 4 files changed, 389 insertions(+) diff --git a/Platform/96Boards/Secure96Dxe/Secure96.dts b/Platform/96Boards= /Secure96Dxe/Secure96.dts new file mode 100644 index 000000000000..b56ce59985cc --- /dev/null +++ b/Platform/96Boards/Secure96Dxe/Secure96.dts @@ -0,0 +1,85 @@ +/** @file + * Copyright (c) 2018, Linaro Limited. All rights reserved. + * + * This program and the accompanying materials are licensed and made + * available under the terms and conditions of the BSD License which + * accompanies this distribution. The full text of the license may be + * found at http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR + * IMPLIED. + */ + +#include "Secure96.h" + +// +// Define a placeholder value for the GPIO phandle property cells appearing +// in this file. It is up to the driver code to discover the actual phandle +// value from the platform device tree and patch the overlay DTB before it +// can be applied. +// +#define GPIO_PARENT_PLACEHOLDER_PHANDLE 0x0 + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path =3D "I2C_PARENT_PLACEHOLDER_STRING"; + __overlay__ { + clock-frequency =3D <100000>; + + ATSHA204A_DT_NODENAME { + compatible =3D "atmel,atsha204a"; + reg =3D ; + }; + + ATECC508A_DT_NODENAME { + compatible =3D "atmel,atecc508a"; + reg =3D ; + }; + }; + }; + + fragment@1 { + target-path =3D "SPI_PARENT_PLACEHOLDER_STRING"; + __overlay__ { + INFINEON_SLB9670_DT_NODENAME { + compatible =3D "infineon,slb9670"; + reg =3D ; + spi-max-frequency =3D <22500000>; + }; + }; + }; + + fragment@2 { + target-path =3D "/"; + __overlay__ { + gpio-leds { + compatible =3D "gpio-leds"; + + secure96-u1 { + gpios =3D ; + }; + secure96-u2 { + gpios =3D ; + }; + secure96-u3 { + gpios =3D ; + }; + secure96-u4 { + gpios =3D ; + }; + }; + }; + }; +}; diff --git a/Platform/96Boards/Secure96Dxe/Secure96.h b/Platform/96Boards/S= ecure96Dxe/Secure96.h new file mode 100644 index 000000000000..84b8aed13d1e --- /dev/null +++ b/Platform/96Boards/Secure96Dxe/Secure96.h @@ -0,0 +1,26 @@ +/** @file + + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +**/ + +#ifndef _SECURE96_H_ +#define _SECURE96_H_ + +#define ATSHA204A_SLAVE_ADDRESS 0x60 +#define ATSHA204A_DT_NODENAME atsha204a@60 + +#define ATECC508A_SLAVE_ADDRESS 0x51 +#define ATECC508A_DT_NODENAME atecc508a@51 + +#define INFINEON_SLB9670_SPI_CS 0x0 +#define INFINEON_SLB9670_DT_NODENAME tpm@0 + +#endif // _SECURE96_H_ diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.c b/Platform/96Board= s/Secure96Dxe/Secure96Dxe.c new file mode 100644 index 000000000000..6c48d7c0b024 --- /dev/null +++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.c @@ -0,0 +1,211 @@ +/** @file + 96boards Secure96 mezzanine board DXE driver. + + Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made availa= ble + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "Secure96.h" + +STATIC CONST UINT32 mI2cAtmelSha204aSlaveAddress[] =3D { + ATSHA204A_SLAVE_ADDRESS, + + // + // The Atmel AtSha204a has an annoying 'wake' mode where it will only wa= ke + // up if SDA is held low for a certain amount of time. Attempting to acc= ess + // a device at address 0x0 at 100 kHz should be sufficient to create this + // wake condition, so add address 0x0 to the slave addresses. + // + 0 +}; + +STATIC CONST EFI_I2C_DEVICE mI2c0Devices[] =3D { + { + &gAtSha204aI2cDeviceGuid, // DeviceGuid + 0, // DeviceIndex + 0, // HardwareRevision + 0, // I2C bus configuration + ARRAY_SIZE (mI2cAtmelSha204aSlaveAddress), // SlaveAddressCount + mI2cAtmelSha204aSlaveAddress // SlaveAddressArray + } +}; + +STATIC CONST CHAR8 mLedNodes[][46] =3D { + "/fragment@2/__overlay__/gpio-leds/secure96-u1", + "/fragment@2/__overlay__/gpio-leds/secure96-u2", + "/fragment@2/__overlay__/gpio-leds/secure96-u3", + "/fragment@2/__overlay__/gpio-leds/secure96-u4", +}; + +STATIC +VOID +SetOverlayFragmentTarget ( + VOID *Overlay, + CONST CHAR8 *NodeName, + CONST CHAR8 *Target + ) +{ + INT32 Node; + INT32 Err; + + Node =3D fdt_path_offset (Overlay, NodeName); + ASSERT (Node > 0); + + Err =3D fdt_setprop (Overlay, Node, "target-path", Target, + AsciiStrLen (Target) + 1); + if (Err) { + DEBUG ((DEBUG_ERROR, "%a: fdt_setprop() failed - %a\n", + __FUNCTION__, fdt_strerror (Err))); + } +} + +STATIC +VOID +FixupOverlay ( + VOID *Dtb, + VOID *Overlay + ) +{ + INT32 Node; + UINT32 GpioPhandle; + UINTN Idx; + UINT32 *GpioProp; + INT32 Err; + + // + // Set the correct GPIO phandle in the LED nodes + // + Node =3D fdt_path_offset (Dtb, FixedPcdGetPtr (PcdGpioParent)); + ASSERT (Node > 0); + + GpioPhandle =3D fdt_get_phandle (Dtb, Node); + if (!GpioPhandle) { + // + // Node has no phandle yet -> create one + // + GpioPhandle =3D 1 + fdt_get_max_phandle (Dtb); + ASSERT (GpioPhandle >=3D 1); + + Err =3D fdt_setprop_u32 (Dtb, Node, "phandle", GpioPhandle); + if (Err) { + DEBUG ((DEBUG_ERROR, + "%a: fdt_setprop_u32(.., .., \"phandle\", 0x%x) failed - %a\n", + __FUNCTION__, GpioPhandle, fdt_strerror (Err))); + } + } + + for (Idx =3D 0; Idx < ARRAY_SIZE (mLedNodes); Idx++) { + Node =3D fdt_path_offset (Overlay, mLedNodes[Idx]); + ASSERT (Node > 0); + + GpioProp =3D fdt_getprop_w (Overlay, Node, "gpios", NULL); + ASSERT (GpioProp !=3D NULL); + + *GpioProp =3D cpu_to_fdt32 (GpioPhandle); + } + + SetOverlayFragmentTarget (Overlay, "/fragment@0", + FixedPcdGetPtr (PcdI2c0Parent)); + + SetOverlayFragmentTarget (Overlay, "/fragment@1", + FixedPcdGetPtr (PcdSpiParent)); +} + +/** + Apply the mezzanine's DT overlay + + @param[in] This Pointer to the MEZZANINE_PROTOCOL instance. + @param[in,out] Dtb Pointer to the device tree blob + + @return EFI_SUCCESS Operation succeeded. + @return other An error has occurred. +**/ +STATIC +EFI_STATUS +ApplyDeviceTreeOverlay ( + IN MEZZANINE_PROTOCOL *This, + IN OUT VOID *Dtb + ) +{ + VOID *Overlay; + UINTN OverlaySize; + EFI_STATUS Status; + INT32 Err; + + // + // Load the raw overlay DTB image from the raw section of this FFS file. + // + Status =3D GetSectionFromFv (&gEfiCallerIdGuid, + EFI_SECTION_RAW, 0, &Overlay, &OverlaySize); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + return EFI_NOT_FOUND; + } + + // + // Fix up unresolved references in the overlay. + // + FixupOverlay (Dtb, Overlay); + + // + // Merge the overlay with the DTB + // + Err =3D fdt_overlay_apply (Dtb, Overlay); + if (Err) { + DEBUG ((DEBUG_ERROR, "%a: fdt_overlay_apply() failed - %a\n", + __FUNCTION__, fdt_strerror (Err))); + return EFI_NOT_FOUND; + } + + return EFI_SUCCESS; +} + +STATIC MEZZANINE_PROTOCOL mMezzanine =3D { + ApplyDeviceTreeOverlay, + ARRAY_SIZE (mI2c0Devices), + 0, + mI2c0Devices, + NULL, + NULL, +}; + +EFI_STATUS +EFIAPI +Secure96DxeEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + LS_CONNECTOR_PROTOCOL *LsConnector; + + Status =3D gBS->LocateProtocol (&g96BoardsLsConnectorProtocolGuid, NULL, + (VOID **)&LsConnector); + ASSERT_EFI_ERROR (Status); + + if (LsConnector->MezzanineType !=3D MezzanineSecure96) { + return EFI_NOT_FOUND; + } + + return gBS->InstallProtocolInterface (&ImageHandle, + &g96BoardsMezzanineProtocolGuid, + EFI_NATIVE_INTERFACE, + &mMezzanine); +} diff --git a/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf b/Platform/96Boa= rds/Secure96Dxe/Secure96Dxe.inf new file mode 100644 index 000000000000..72dbf1314c15 --- /dev/null +++ b/Platform/96Boards/Secure96Dxe/Secure96Dxe.inf @@ -0,0 +1,67 @@ +## @file +# +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the B= SD License +# which accompanies this distribution. The full text of the license may = be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IM= PLIED. +# +## + +[Defines] + INF_VERSION =3D 0x0001001A + BASE_NAME =3D Secure96Dxe + FILE_GUID =3D 31519ec4-65f1-4790-b223-aa9330dd75fd + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + ENTRY_POINT =3D Secure96DxeEntryPoint + +[Sources] + Secure96.dts + Secure96.h + Secure96Dxe.c + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Platform/96Boards/96Boards.dec + Silicon/Atmel/AtSha204a/AtSha204a.dec + +[LibraryClasses] + BaseLib + DebugLib + DxeServicesLib + FdtLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Protocols] + g96BoardsLsConnectorProtocolGuid ## CONSUMES + g96BoardsMezzanineProtocolGuid ## PRODUCES + +[Guids] + gAtSha204aI2cDeviceGuid + gFdtTableGuid + +[FixedPcd] + g96BoardsTokenSpaceGuid.PcdGpioParent + g96BoardsTokenSpaceGuid.PcdGpioPinF + g96BoardsTokenSpaceGuid.PcdGpioPinG + g96BoardsTokenSpaceGuid.PcdGpioPinH + g96BoardsTokenSpaceGuid.PcdGpioPinI + g96BoardsTokenSpaceGuid.PcdGpioPolarity + g96BoardsTokenSpaceGuid.PcdI2c0Parent + g96BoardsTokenSpaceGuid.PcdSpiParent + +[Depex] + g96BoardsLsConnectorProtocolGuid + +[BuildOptions] + # dtc emits lots of spurious warnings for overlays + *_*_*_DTC_FLAGS =3D -q --=20 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel