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[2.15.165.91]) by smtp.gmail.com with ESMTPSA id e2-v6sm1438744wro.97.2018.06.04.07.50.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Jun 2018 07:50:31 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=yCMV3TwB4zsQl6vJH1qqoymelEHBqzfPSexWmERYuRw=; b=G38uHerbZPWM79VQ+p/pBrFtxdOeTtxsJ6anqW3nfE6vxKxIlBiu8lHoFAxjzj0lqZ rKwiD2SZJ+mrkBgvOrthobEqXDYRWcM1NHYjDXohrgR7poSDIO95ZlTBshrd9jHr9+Ul Ya0rW4/l0ksrbZjDrUsmNGgpLAcL0rPxYNMSw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=yCMV3TwB4zsQl6vJH1qqoymelEHBqzfPSexWmERYuRw=; b=NCurYdvIhQ1phSLataM88sTWrJMZgzDKeegsSbZgToSE9f2LOJ3ggx/MDusrBYIRKM JXJGaY81fMvaqTPdwPoayjlSz0xi/HT70yeawqCh7Ij9hH5NGTEdaXtaM45NL43HzURr yHZIOzwWnveN/kK4KVMqEy4h1TJlQZrgTQuxpPUmipgHMraDeE7yNXSdryFEF09x1YxT 4iCs6tz6hINnRCrl90YlrUlrb0pM8qBu2Uz9GKF2PpQiakX7HxJdPw2COzI64FS0utVy dUwrRR8o2EAUjfpDg81whxdXflRhiwhueHw/78pbmAKcGSeCEsHgvjdzbjBJqAcvdGmG wvhg== X-Gm-Message-State: ALKqPwfTlIfzUJJz64khGm625VSwfzYbHFIbrToZxE2sjjB2YfM7ruiE nubDB+WYw/xpmFa09afkcI6pIYqRneA= X-Google-Smtp-Source: ADUXVKKHyYIJ9Ixq41PQJJqwBY/J0m+lteLtrm5mtVvwe5PKEnfEK6SqVGg0XjQ3LAGQj9I3FHKJxw== X-Received: by 2002:a5d:470b:: with SMTP id y11-v6mr10075762wrq.107.1528123832083; Mon, 04 Jun 2018 07:50:32 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Mon, 4 Jun 2018 16:50:28 +0200 Message-Id: <20180604145028.437-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.0 Subject: [edk2] [PATCH] ArmVirtPkg/ArmVirtQemu ARM: work around KVM limitations in LTO build X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lersek@redhat.com, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" KVM on ARM refuses to decode load/store instructions used to perform I/O to emulated devices, and instead relies on the exception syndrome information to describe the operand register, access size, etc. This is only possible for instructions that have a single input/output register (as opposed to ones that increment the offset register, or load/store pair instructions, etc). Otherwise, QEMU crashes with the following error error: kvm run failed Function not implemented R00=3D01010101 R01=3D00000008 R02=3D00000048 R03=3D08000820 R04=3D00000120 R05=3D7faaa0e0 R06=3D7faaa0dc R07=3D7faaa0e8 R08=3D7faaa0ec R09=3D7faaa088 R10=3D000000ff R11=3D00000080 R12=3Dff000000 R13=3D7fccfe08 R14=3D7faa835f R15=3D7faa887c PSR=3D800001f3 N--- T svc32 QEMU: Terminated and KVM produces a warning such as the following in the kernel log kvm [17646]: load/store instruction decoding not implemented GCC with LTO enabled will emit such instructions for Mmio[Read|Write] invocations performed in a loop, so we need to disable LTO for the IoLib library to ensure that the emitted instructions are suitable for emulated I/O under KVM Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Laszlo Ersek --- ArmVirtPkg/ArmVirtQemu.dsc | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index d74feb709cd1..e6e3d82d6ca9 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -414,3 +414,21 @@ [Components.AARCH64] NULL|ArmVirtPkg/Library/FdtPciPcdProducerLib/FdtPciPcdProducerLib.inf } + +[Components.ARM] + MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf { + + // + // KVM on ARM refuses to decode load/store instructions used to perf= orm + // I/O to emulated devices, and instead relies on the exception synd= rome + // information to describe the operand register, access size, etc. + // This is only possible for instructions that have a single input/o= utput + // register (as opposed to ones that increment the offset register, = or + // load/store pair instructions, etc). + // GCC with LTO enabled will emit such instructions for Mmio[Read|Wr= ite] + // invocations performed in a loop, so we need to disable LTO for th= is + // library to ensure that the emitted instructions are suitable for + // emulated I/O under KVM + // + GCC:*_GCC5_ARM_CC_FLAGS =3D -fno-lto + } --=20 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel