From nobody Thu Apr 25 05:32:57 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528437715214752.0987357535231; Thu, 7 Jun 2018 23:01:55 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C978A210DF5D6; Thu, 7 Jun 2018 23:01:53 -0700 (PDT) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4E65C203369F0 for ; Thu, 7 Jun 2018 23:01:53 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 07 Jun 2018 23:01:52 -0700 Received: from zyou1-mobl.ccr.corp.intel.com ([10.239.158.165]) by orsmga002.jf.intel.com with ESMTP; 07 Jun 2018 23:01:51 -0700 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=benjamin.you@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,489,1520924400"; d="scan'208";a="65327136" From: Benjamin You To: edk2-devel@lists.01.org Date: Fri, 8 Jun 2018 14:01:16 +0800 Message-Id: <20180608060116.33200-1-benjamin.you@intel.com> X-Mailer: git-send-email 2.14.3.windows.1 Subject: [edk2] [PATCH v2] CorebootModulePkg/CbSupportDxe: Remove SCI_EN setting X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Prince Agyeman , Matt Delco MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Current implemenation sets PM1_CNT.SCI_EN bit at ReadyToBoot event. However, this should not be done because this causes OS to skip triggering FADT.SMI_CMD, which leads to the functions implemented in the SMI handler being omitted. This issue was identified by Matt Delco . The fix does the following: - The SCI_EN bit setting is removed from CbSupportDxe driver. - Some additional checks are added in CbParseFadtInfo() in CbParseLib.c to output some error message and ASSERT (FALSE) if ALL of the following conditions are met: 1) HARDWARE_REDUCED_ACPI is not set; 2) SMI_CMD field is zero; 3) SCI_EN bit is zero; which indicates the ACPI enabling status is inconsistent: SCI is not enabled but the ACPI table does not provide a means to enable it through FADT->SMI_CMD. This may cause issues in OS. Cc: Maurice Ma Cc: Prince Agyeman Cc: Matt Delco Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Benjamin You --- CorebootModulePkg/CbSupportDxe/CbSupportDxe.c | 51 ------------------= ---- CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf | 1 - CorebootModulePkg/Library/CbParseLib/CbParseLib.c | 34 +++++++++++++++ .../Library/CbParseLib/CbParseLib.inf | 3 +- 4 files changed, 36 insertions(+), 53 deletions(-) diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c b/CorebootModule= Pkg/CbSupportDxe/CbSupportDxe.c index c526c9e871..ec42f7ff35 100755 --- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c +++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.c @@ -14,7 +14,6 @@ **/ #include "CbSupportDxe.h" =20 -UINTN mPmCtrlReg =3D 0; /** Reserve MMIO/IO resource in GCD =20 @@ -86,31 +85,6 @@ CbReserveResourceInGcd ( return Status; } =20 -/** - Notification function of EVT_GROUP_READY_TO_BOOT event group. - - This is a notification function registered on EVT_GROUP_READY_TO_BOOT ev= ent group. - When the Boot Manager is about to load and execute a boot option, it rec= laims variable - storage if free size is below the threshold. - - @param Event Event whose notification function is being invoked. - @param Context Pointer to the notification function's context. - -**/ -VOID -EFIAPI -OnReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - // - // Enable SCI - // - IoOr16 (mPmCtrlReg, BIT0); - - DEBUG ((EFI_D_ERROR, "Enable SCI bit at 0x%lx before boot\n", (UINT64)mP= mCtrlReg)); -} =20 /** Main entry for the Coreboot Support DXE module. @@ -130,10 +104,8 @@ CbDxeEntryPoint ( ) { EFI_STATUS Status; - EFI_EVENT ReadyToBootEvent; EFI_HOB_GUID_TYPE *GuidHob; SYSTEM_TABLE_INFO *pSystemTableInfo; - ACPI_BOARD_INFO *pAcpiBoardInfo; FRAME_BUFFER_INFO *FbInfo; =20 Status =3D EFI_SUCCESS; @@ -171,16 +143,6 @@ CbDxeEntryPoint ( ASSERT_EFI_ERROR (Status); } =20 - // - // Find the acpi board information guid hob - // - GuidHob =3D GetFirstGuidHob (&gUefiAcpiBoardInfoGuid); - ASSERT (GuidHob !=3D NULL); - pAcpiBoardInfo =3D (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob); - - mPmCtrlReg =3D (UINTN)pAcpiBoardInfo->PmCtrlRegBase; - DEBUG ((EFI_D_ERROR, "PmCtrlReg at 0x%lx\n", (UINT64)mPmCtrlReg)); - // // Find the frame buffer information and update PCDs // @@ -197,19 +159,6 @@ CbDxeEntryPoint ( ASSERT_EFI_ERROR (Status); } =20 - // - // Register callback on the ready to boot event - // in order to enable SCI - // - ReadyToBootEvent =3D NULL; - Status =3D EfiCreateEventReadyToBootEx ( - TPL_CALLBACK, - OnReadyToBoot, - NULL, - &ReadyToBootEvent - ); - ASSERT_EFI_ERROR (Status); - return EFI_SUCCESS; } =20 diff --git a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf b/CorebootModu= lePkg/CbSupportDxe/CbSupportDxe.inf index 99245183ea..15b0dac774 100644 --- a/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf +++ b/CorebootModulePkg/CbSupportDxe/CbSupportDxe.inf @@ -46,7 +46,6 @@ DebugLib BaseMemoryLib UefiLib - IoLib HobLib =20 [Guids] diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootMo= dulePkg/Library/CbParseLib/CbParseLib.c index 0909b0f492..da227dea5e 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c @@ -18,6 +18,7 @@ #include #include #include +#include #include =20 #include @@ -477,6 +478,39 @@ CbParseFadtInfo ( ASSERT(Fadt->Pm1aEvtBlk !=3D 0); ASSERT(Fadt->Gpe0Blk !=3D 0); =20 + DEBUG_CODE_BEGIN (); + BOOLEAN SciEnabled; + + // + // Check the consistency of SCI enabling + // + + // + // Get SCI_EN value + // + if (Fadt->Pm1CntLen =3D=3D 4) { + SciEnabled =3D (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FA= LSE; + } else { + // + // if (Pm1CntLen =3D=3D 2), use 16 bit IO read; + // if (Pm1CntLen !=3D 2 && Pm1CntLen !=3D 4), use 16 bit IO re= ad as a fallback + // + SciEnabled =3D (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FA= LSE; + } + + if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) && + (Fadt->SmiCmd =3D=3D 0) && + !SciEnabled) { + // + // The ACPI enabling status is inconsistent: SCI is not enable= d but ACPI + // table does not provide a means to enable it through FADT->S= miCmd + // + DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is incon= sistent: SCI is not" + " enabled but the ACPI table does not provide a means to ena= ble it through FADT->SmiCmd." + " This may cause issues in OS.\n")); + ASSERT (FALSE); + } + DEBUG_CODE_END (); return RETURN_SUCCESS; } } diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf b/Coreboot= ModulePkg/Library/CbParseLib/CbParseLib.inf index d7146a415b..25b847946c 100644 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf +++ b/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf @@ -37,7 +37,8 @@ [LibraryClasses] BaseLib BaseMemoryLib - DebugLib + IoLib + DebugLib PcdLib =20 [Pcd] =20 --=20 2.14.3.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel