From nobody Fri May 9 19:04:47 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1534234276194851.7565740939366; Tue, 14 Aug 2018 01:11:16 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 46986210F1550; Tue, 14 Aug 2018 01:10:38 -0700 (PDT) Received: from mail-pl0-x244.google.com (mail-pl0-x244.google.com [IPv6:2607:f8b0:400e:c01::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 733A7210F16B5 for ; Tue, 14 Aug 2018 01:10:36 -0700 (PDT) Received: by mail-pl0-x244.google.com with SMTP id u11-v6so8038585plq.5 for ; Tue, 14 Aug 2018 01:10:36 -0700 (PDT) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id h130-v6sm72905670pgc.88.2018.08.14.01.10.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Aug 2018 01:10:34 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c01::244; helo=mail-pl0-x244.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wgQ6yJ7/crkcZqOILBJETqBngNVmDBEde3VmN0jR2s0=; b=YSde+HdLgu5+HJNiHdUXuvVCoz0y75U7L9u0vCt9uv95YVq1FFIooIn9Fwm7sV/Z06 QtqdUN12W5aOSzxuOG8+x+YqtK8FSluFCRpY/ZUxKbE7uqkeLdQk7Jh5CvKwhhPmQjtG iEFgFmHpGfHKQAcOM6BYk1wFzwqE7h7DlSYqc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=wgQ6yJ7/crkcZqOILBJETqBngNVmDBEde3VmN0jR2s0=; b=DlI/9GYbRpcKwmFj2COGpOcTDmJwE/ZJ9JM102KPgXzt6T2Yd6lqZpVL1+jjDMQrAR VLcO+sijPenz8JhPsp8zZ7GleJCj5EIdBPfQk/4jx625lnmwXVgSgRWwtPrvSukSYYmJ aCIZyHFotYgDruGJWOjOkHZsQ8RpM72xBW0qwWhQE+6Ke3c/d1bP5QKWYWAuI3gtt9Pt JIKEwuHMXxZwSt6hjYNkPTEyKGZpLpqUo4oJjQmPWoC7SvlK3BplYFq4f2/ecVMdhnwa B4XuCadylur8GcZ79fUNsmc4tqjS1XuN+beGmQv9IuqoA1+kYq7H+eQ3QvRgFcBJPzc3 xx2A== X-Gm-Message-State: AOUpUlFOfT7W+glh80/ILRRDLcDpa/HjYlJDokv8YuigbiRv1YsTCh7K p6EhIVSLay7LZWiMF+F9iRjENw== X-Google-Smtp-Source: AA+uWPy1zLV22OYbIzB5bS9j9eldrPs3IF+Qytnm75Q7Mrzb0RZd9R9Yyf6IiueSSRdDlSNPYtK6iA== X-Received: by 2002:a17:902:aa83:: with SMTP id d3-v6mr19488264plr.242.1534234235602; Tue, 14 Aug 2018 01:10:35 -0700 (PDT) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Tue, 14 Aug 2018 16:08:40 +0800 Message-Id: <20180814080903.50466-21-ming.huang@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180814080903.50466-1-ming.huang@linaro.org> References: <20180814080903.50466-1-ming.huang@linaro.org> Subject: [edk2] [PATCH edk2-platforms v2 20/43] Hisilicon/I2C: Modify I2CLib.c for coding style X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, huangdaode@hisilicon.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDMRC_1 RDKM_2 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Correct coding style for I2CLib.c before adding other I2CLib patches. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 1034 ++++++++++---------- 1 file changed, 499 insertions(+), 535 deletions(-) diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c b/Silicon/Hisilicon/= Library/I2CLib/I2CLib.c index b5b388d756..f03d55d6b2 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.c +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.c @@ -16,640 +16,604 @@ =20 =20 #include -#include -#include #include #include +#include #include #include +#include =20 #include =20 #include "I2CLibInternal.h" #include "I2CHw.h" =20 -VOID I2C_Delay(UINT32 ulCount) +VOID +I2C_Delay ( + UINT32 Count + ) { - MicroSecondDelay(ulCount); - return; + MicroSecondDelay (Count); + return; } =20 =20 EFI_STATUS EFIAPI -I2C_Disable(UINT32 Socket,UINT8 Port) +I2C_Disable ( + UINT32 Socket, + UINT8 Port + ) { - UINT32 ulTimeCnt =3D I2C_READ_TIMEOUT; - I2C0_STATUS_U I2cStatusReg; - I2C0_ENABLE_U I2cEnableReg; - I2C0_ENABLE_STATUS_U I2cEnableStatusReg; + UINT32 TimeCnt =3D I2C_READ_TIMEOUT; + I2C0_STATUS_U I2cStatusReg; + I2C0_ENABLE_U I2cEnableReg; + I2C0_ENABLE_STATUS_U I2cEnableStatusReg; =20 - UINTN Base =3D GetI2cBase(Socket, Port); + UINTN Base =3D GetI2cBase (Socket, Port); =20 - I2C_REG_READ((Base + I2C_STATUS_OFFSET), I2cStatusReg.Val32); + I2C_REG_READ ((Base + I2C_STATUS_OFFSET), I2cStatusReg.Val32); =20 - while (I2cStatusReg.bits.activity) - { - I2C_Delay(10000); + while (I2cStatusReg.bits.activity) { + I2C_Delay (10000); =20 - ulTimeCnt--; - I2C_REG_READ(Base + I2C_STATUS_OFFSET, I2cStatusReg.Val32); - if (0 =3D=3D ulTimeCnt) - { - return EFI_DEVICE_ERROR; - } + TimeCnt--; + I2C_REG_READ (Base + I2C_STATUS_OFFSET, I2cStatusReg.Val32); + if (TimeCnt =3D=3D 0) { + return EFI_DEVICE_ERROR; } + } =20 + I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); + I2cEnableReg.bits.enable =3D 0; + I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); =20 - I2C_REG_READ(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); - I2cEnableReg.bits.enable =3D 0; - I2C_REG_WRITE(Base + I2C_ENABLE_OFFSET,I2cEnableReg.Val32); - - I2C_REG_READ(Base + I2C_ENABLE_OFFSET,I2cEnableStatusReg.Val32); - if (0 =3D=3D I2cEnableStatusReg.bits.ic_en) - { - return EFI_SUCCESS; - } - else - { - return EFI_DEVICE_ERROR; - } + I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableStatusReg.Val32); + if (I2cEnableStatusReg.bits.ic_en =3D=3D 0) { + return EFI_SUCCESS; + } else { + return EFI_DEVICE_ERROR; + } } =20 =20 EFI_STATUS EFIAPI -I2C_Enable(UINT32 Socket,UINT8 Port) +I2C_Enable ( + UINT32 Socket, + UINT8 Port + ) { - I2C0_ENABLE_U I2cEnableReg; - I2C0_ENABLE_STATUS_U I2cEnableStatusReg; + I2C0_ENABLE_U I2cEnableReg; + I2C0_ENABLE_STATUS_U I2cEnableStatusReg; =20 - UINTN Base =3D GetI2cBase(Socket, Port); + UINTN Base =3D GetI2cBase (Socket, Port); =20 + I2C_REG_READ (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); + I2cEnableReg.bits.enable =3D 1; + I2C_REG_WRITE (Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); =20 - I2C_REG_READ(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); - I2cEnableReg.bits.enable =3D 1; - I2C_REG_WRITE(Base + I2C_ENABLE_OFFSET, I2cEnableReg.Val32); =20 - - I2C_REG_READ(Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32= ); - if (1 =3D=3D I2cEnableStatusReg.bits.ic_en) - { - return EFI_SUCCESS; - } - else - { - return EFI_DEVICE_ERROR; - } + I2C_REG_READ (Base + I2C_ENABLE_STATUS_OFFSET, I2cEnableStatusReg.Val32); + if (I2cEnableStatusReg.bits.ic_en =3D=3D 1) { + return EFI_SUCCESS; + } else { + return EFI_DEVICE_ERROR; + } } =20 -void I2C_SetTarget(UINT32 Socket,UINT8 Port,UINT32 I2cDeviceAddr) +VOID +I2C_SetTarget ( + UINT32 Socket, + UINT8 Port, + UINT32 I2cDeviceAddr + ) { - I2C0_TAR_U I2cTargetReg; - UINTN Base =3D GetI2cBase(Socket, Port); + I2C0_TAR_U I2cTargetReg; =20 + UINTN Base =3D GetI2cBase (Socket, Port); =20 - I2C_REG_READ(Base + I2C_TAR_OFFSET, I2cTargetReg.Val32); - I2cTargetReg.bits.ic_tar =3D I2cDeviceAddr; - I2C_REG_WRITE(Base + I2C_TAR_OFFSET, I2cTargetReg.Val32); + I2C_REG_READ (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32); + I2cTargetReg.bits.ic_tar =3D I2cDeviceAddr; + I2C_REG_WRITE (Base + I2C_TAR_OFFSET, I2cTargetReg.Val32); =20 - return; + return; } =20 =20 EFI_STATUS EFIAPI -I2CInit(UINT32 Socket, UINT32 Port, SPEED_MODE SpeedMode) +I2CInit ( + UINT32 Socket, + UINT32 Port, + SPEED_MODE SpeedMode + ) { - I2C0_CON_U I2cControlReg; - I2C0_SS_SCL_HCNT_U I2cStandardSpeedSclHighCount; - I2C0_SS_SCL_LCNT_U I2cStandardSpeedSclLowCount; - I2C0_RX_TL_U I2cRxFifoReg; - I2C0_TX_TL_U I2cTxFifoReg; - I2C0_INTR_MASK_U I2cIntrMask; - EFI_STATUS Status; - - UINTN Base =3D GetI2cBase(Socket, Port); - - if((Socket >=3D MAX_SOCKET) || (Port >=3D I2C_PORT_MAX) || (SpeedMode = >=3D SPEED_MODE_MAX)){ - return EFI_INVALID_PARAMETER; - } - - - Status =3D I2C_Disable(Socket,Port); - if(EFI_ERROR(Status)) - { - return EFI_DEVICE_ERROR; - } - - - I2C_REG_READ(Base + I2C_CON_OFFSET, I2cControlReg.Val32); - I2cControlReg.bits.master =3D 1; - I2cControlReg.bits.spedd =3D 0x1; - I2cControlReg.bits.restart_en =3D 1; - I2cControlReg.bits.slave_disable =3D 1; - I2C_REG_WRITE(Base + I2C_CON_OFFSET,I2cControlReg.Val32); - - - if(Normal =3D=3D SpeedMode) - { - I2C_REG_READ(Base + I2C_SS_SCL_HCNT_OFFSET,I2cStandardSpeedSclHigh= Count.Val32); - I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt =3D I2C_SS_SCLHCN= T; - I2C_REG_WRITE(Base + I2C_SS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHi= ghCount.Val32); - I2C_REG_READ(Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLow= Count.Val32); - I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt =3D I2C_SS_SCLLCNT; - I2C_REG_WRITE(Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLo= wCount.Val32); - } - else - { - I2C_REG_READ(Base + I2C_FS_SCL_HCNT_OFFSET,I2cStandardSpeedSclHigh= Count.Val32); - I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt =3D I2C_SS_SCLHCN= T; - I2C_REG_WRITE(Base + I2C_FS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHi= ghCount.Val32); - I2C_REG_READ(Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLow= Count.Val32); - I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt =3D I2C_SS_SCLLCNT; - I2C_REG_WRITE(Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLo= wCount.Val32); - } - - - I2C_REG_READ(Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32); - I2cRxFifoReg.bits.rx_tl =3D I2C_TXRX_THRESHOLD; - I2C_REG_WRITE(Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32); - I2C_REG_READ(Base + I2C_TX_TL_OFFSET,I2cTxFifoReg.Val32); - I2cTxFifoReg.bits.tx_tl =3D I2C_TXRX_THRESHOLD; - I2C_REG_WRITE(Base + I2C_TX_TL_OFFSET, I2cTxFifoReg.Val32); - - - I2C_REG_READ(Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32); - I2cIntrMask.Val32 =3D 0x0; - I2C_REG_WRITE(Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32); - - - Status =3D I2C_Enable(Socket,Port); - if(EFI_ERROR(Status)) - { - return EFI_DEVICE_ERROR; - } - - return I2cLibRuntimeSetup (Socket, Port); + I2C0_CON_U I2cControlReg; + I2C0_SS_SCL_HCNT_U I2cStandardSpeedSclHighCount; + I2C0_SS_SCL_LCNT_U I2cStandardSpeedSclLowCount; + I2C0_RX_TL_U I2cRxFifoReg; + I2C0_TX_TL_U I2cTxFifoReg; + I2C0_INTR_MASK_U I2cIntrMask; + EFI_STATUS Status; + + UINTN Base =3D GetI2cBase (Socket, Port); + + if ((Socket >=3D MAX_SOCKET) || + (Port >=3D I2C_PORT_MAX) || + (SpeedMode >=3D SPEED_MODE_MAX)) { + return EFI_INVALID_PARAMETER; + } + + Status =3D I2C_Disable (Socket,Port); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + I2C_REG_READ (Base + I2C_CON_OFFSET, I2cControlReg.Val32); + I2cControlReg.bits.master =3D 1; + I2cControlReg.bits.spedd =3D 0x1; + I2cControlReg.bits.restart_en =3D 1; + I2cControlReg.bits.slave_disable =3D 1; + I2C_REG_WRITE (Base + I2C_CON_OFFSET, I2cControlReg.Val32); + + if (SpeedMode =3D=3D Normal) { + I2C_REG_READ (Base + I2C_SS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCo= unt.Val32); + I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt =3D I2C_SS_SCLHCNT; + I2C_REG_WRITE (Base + I2C_SS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighC= ount.Val32); + I2C_REG_READ (Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCou= nt.Val32); + I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt =3D I2C_SS_SCLLCNT; + I2C_REG_WRITE (Base + I2C_SS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCo= unt.Val32); + } else { + I2C_REG_READ (Base + I2C_FS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighCo= unt.Val32); + I2cStandardSpeedSclHighCount.bits.ic_ss_scl_hcnt =3D I2C_SS_SCLHCNT; + I2C_REG_WRITE (Base + I2C_FS_SCL_HCNT_OFFSET, I2cStandardSpeedSclHighC= ount.Val32); + I2C_REG_READ (Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCou= nt.Val32); + I2cStandardSpeedSclLowCount.bits.ic_ss_scl_lcnt =3D I2C_SS_SCLLCNT; + I2C_REG_WRITE (Base + I2C_FS_SCL_LCNT_OFFSET, I2cStandardSpeedSclLowCo= unt.Val32); + } + + I2C_REG_READ (Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32); + I2cRxFifoReg.bits.rx_tl =3D I2C_TXRX_THRESHOLD; + I2C_REG_WRITE (Base + I2C_RX_TL_OFFSET, I2cRxFifoReg.Val32); + I2C_REG_READ (Base + I2C_TX_TL_OFFSET, I2cTxFifoReg.Val32); + I2cTxFifoReg.bits.tx_tl =3D I2C_TXRX_THRESHOLD; + I2C_REG_WRITE (Base + I2C_TX_TL_OFFSET, I2cTxFifoReg.Val32); + + I2C_REG_READ (Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32); + I2cIntrMask.Val32 =3D 0x0; + I2C_REG_WRITE (Base + I2C_INTR_MASK_OFFSET, I2cIntrMask.Val32); + + Status =3D I2C_Enable (Socket, Port); + if (EFI_ERROR (Status)) { + return EFI_DEVICE_ERROR; + } + + return I2cLibRuntimeSetup (Socket, Port); } =20 EFI_STATUS EFIAPI -I2CSdaConfig(UINT32 Socket, UINT32 Port) +I2CSdaConfig ( + UINT32 Socket, + UINT32 Port + ) { + UINTN Base =3D GetI2cBase (Socket, Port); =20 - UINTN Base =3D GetI2cBase(Socket, Port); + if ((Socket >=3D MAX_SOCKET) || (Port >=3D I2C_PORT_MAX)) { + return EFI_INVALID_PARAMETER; + } =20 - if((Socket >=3D MAX_SOCKET) || (Port >=3D I2C_PORT_MAX)){ - return EFI_INVALID_PARAMETER; - } - - I2C_REG_WRITE(Base + I2C_SDA_HOLD, 0x14); + I2C_REG_WRITE (Base + I2C_SDA_HOLD, 0x14); =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 =20 =20 -UINT32 I2C_GetTxStatus(UINT32 Socket,UINT8 Port) +UINT32 +I2C_GetTxStatus ( + UINT32 Socket, + UINT8 Port + ) { - I2C0_TXFLR_U ulFifo; - UINTN Base =3D GetI2cBase(Socket, Port); + I2C0_TXFLR_U Fifo; + UINTN Base =3D GetI2cBase (Socket, Port); =20 - I2C_REG_READ(Base + I2C_TXFLR_OFFSET, ulFifo.Val32); - return ulFifo.bits.txflr; + I2C_REG_READ (Base + I2C_TXFLR_OFFSET, Fifo.Val32); + return Fifo.bits.txflr; } =20 UINT32 -I2C_GetRxStatus(UINT32 Socket,UINT8 Port) +I2C_GetRxStatus ( + UINT32 Socket, + UINT8 Port + ) { - I2C0_RXFLR_U ulFifo; - UINTN Base =3D GetI2cBase(Socket, Port); + I2C0_RXFLR_U Fifo; + UINTN Base =3D GetI2cBase (Socket, Port); =20 - I2C_REG_READ(Base + I2C_RXFLR_OFFSET, ulFifo.Val32); - return ulFifo.bits.rxflr; + I2C_REG_READ (Base + I2C_RXFLR_OFFSET, Fifo.Val32); + return Fifo.bits.rxflr; } =20 EFI_STATUS EFIAPI -WriteBeforeRead(I2C_DEVICE *I2cInfo, UINT32 ulLength, UINT8 *pBuf) +WriteBeforeRead ( + I2C_DEVICE *I2cInfo, + UINT32 Length, + UINT8 *pBuf + ) { - UINT32 ulFifo; - UINT32 ulCnt; - UINT32 ulTimes =3D 0; + UINT32 Fifo; + UINT32 Count; + UINT32 Times =3D 0; =20 - UINTN Base =3D GetI2cBase(I2cInfo->Socket, I2cInfo->Port); + UINTN Base =3D GetI2cBase (I2cInfo->Socket, I2cInfo->Port); =20 + I2C_SetTarget (I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddre= ss); =20 - I2C_SetTarget(I2cInfo->Socket,I2cInfo->Port,I2cInfo->SlaveDeviceAddres= s); - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - while(0 !=3D ulFifo) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + while (Fifo !=3D 0) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + return EFI_TIMEOUT; } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } =20 - for(ulCnt =3D 0; ulCnt < ulLength; ulCnt++) - { - ulTimes =3D 0; - while(ulFifo > I2C_TXRX_THRESHOLD) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, *pBuf++); - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); + for (Count =3D 0; Count < Length; Count++) { + Times =3D 0; + while (Fifo > I2C_TXRX_THRESHOLD) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); } =20 - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - ulTimes =3D 0; - while(0 !=3D ulFifo) - { - I2C_Delay(2); - - if(++ulTimes > I2C_READ_TIMEOUT) - { - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, *pBuf++); + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + Times =3D 0; + while (Fifo !=3D 0) { + I2C_Delay (2); + + if (++Times > I2C_READ_TIMEOUT) { + return EFI_TIMEOUT; } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } =20 - return EFI_SUCCESS; + return EFI_SUCCESS; } =20 =20 EFI_STATUS EFIAPI -I2CWrite(I2C_DEVICE *I2cInfo, UINT16 InfoOffset, UINT32 ulLength, UINT8 *p= Buf) +I2CWrite( + I2C_DEVICE *I2cInfo, + UINT16 InfoOffset, + UINT32 Length, + UINT8 *pBuf + ) { - UINT32 ulFifo; - UINT32 ulTimes =3D 0; - UINT32 Idx; - UINTN Base; - - - if(I2cInfo->Port >=3D I2C_PORT_MAX) - { - return EFI_INVALID_PARAMETER; - } - - Base =3D GetI2cBase(I2cInfo->Socket, I2cInfo->Port); - - (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); - - I2C_SetTarget(I2cInfo->Socket,I2cInfo->Port,I2cInfo->SlaveDeviceAddres= s); - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - while(0 !=3D ulFifo) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - - if(I2cInfo->DeviceType) - { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff= ); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); - } - else - { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); - } - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - ulTimes =3D 0; - while(0 !=3D ulFifo) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - for(Idx =3D 0; Idx < ulLength; Idx++) - { - ulTimes =3D 0; - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - while(ulFifo > I2C_TXRX_THRESHOLD) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - if (Idx < ulLength - 1) { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (*pBuf++)); - } else { - //Send command stop bit for the last transfer - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (*pBuf++) | I2C_CMD_= STOP_BIT); - } - } - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - ulTimes =3D 0; - while(0 !=3D ulFifo) - { - I2C_Delay(2); - - if(++ulTimes > I2C_READ_TIMEOUT) - { - DEBUG ((EFI_D_ERROR, "I2C Write try to finished,time out!\n")); - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - - return EFI_SUCCESS; + UINT32 Fifo; + UINT32 Times =3D 0; + UINT32 Idx; + UINTN Base; + + if (I2cInfo->Port >=3D I2C_PORT_MAX) { + return EFI_INVALID_PARAMETER; + } + + Base =3D GetI2cBase (I2cInfo->Socket, I2cInfo->Port); + + (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); + + I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddres= s); + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + while (Fifo !=3D 0) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + if (I2cInfo->DeviceType) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); + } else { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); + } + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + Times =3D 0; + while (Fifo !=3D 0) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + for (Idx =3D 0; Idx < Length; Idx++) { + Times =3D 0; + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + while (Fifo > I2C_TXRX_THRESHOLD) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + if (Idx < Length - 1) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (*pBuf++)); + } else { + //Send command stop bit for the last transfer + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (*pBuf++) | I2C_CMD_STOP_= BIT); + } + } + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + Times =3D 0; + while (Fifo !=3D 0) { + I2C_Delay (2); + + if (++Times > I2C_READ_TIMEOUT) { + DEBUG ((DEBUG_ERROR, "I2C Write try to finished,time out!\n")); + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + + return EFI_SUCCESS; } =20 EFI_STATUS EFIAPI -I2CRead(I2C_DEVICE *I2cInfo, UINT16 InfoOffset,UINT32 ulRxLen,UINT8 *pBuf) +I2CRead( + I2C_DEVICE *I2cInfo, + UINT16 InfoOffset, + UINT32 RxLen, + UINT8 *pBuf + ) { - UINT32 ulFifo; - UINT32 ulTimes =3D 0; - UINT8 I2CWAddr[2]; - EFI_STATUS Status; - UINT32 Idx =3D 0; - UINTN Base; - - - if(I2cInfo->Port >=3D I2C_PORT_MAX) - { - return EFI_INVALID_PARAMETER; - } - - (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); - Base =3D GetI2cBase(I2cInfo->Socket, I2cInfo->Port); - if(I2cInfo->DeviceType) - { - I2CWAddr[0] =3D (InfoOffset >> 8) & 0xff; - I2CWAddr[1] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 2,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - else - { - I2CWAddr[0] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 1,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - - I2C_SetTarget(I2cInfo->Socket,I2cInfo->Port,I2cInfo->SlaveDeviceAddres= s); - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - while(0 !=3D ulFifo) - { - I2C_Delay(2); - - while(++ulTimes > I2C_READ_TIMEOUT) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - while (ulRxLen > 0) { - if (ulRxLen > 1) { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); - } else { - //Send command stop bit for the last transfer - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL | I2= C_CMD_STOP_BIT); - } - - ulTimes =3D 0; - do { - I2C_Delay(2); - - while(++ulTimes > I2C_READ_TIMEOUT) { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetRxStatus(I2cInfo->Socket,I2cInfo->Port); - }while(0 =3D=3D ulFifo); - - I2C_REG_READ(Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); - - ulRxLen --; - } - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - - return EFI_SUCCESS; + UINT32 Fifo; + UINT32 Times =3D 0; + UINT8 I2CWAddr[2]; + EFI_STATUS Status; + UINT32 Idx =3D 0; + UINTN Base; + + if (I2cInfo->Port >=3D I2C_PORT_MAX) { + return EFI_INVALID_PARAMETER; + } + + (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); + Base =3D GetI2cBase (I2cInfo->Socket, I2cInfo->Port); + if (I2cInfo->DeviceType) { + I2CWAddr[0] =3D (InfoOffset >> 8) & 0xff; + I2CWAddr[1] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 2,I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } else { + I2CWAddr[0] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 1, I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } + + I2C_SetTarget (I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddre= ss); + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + while (Fifo !=3D 0) { + I2C_Delay (2); + + while (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + while (RxLen > 0) { + if (RxLen > 1) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); + } else { + //Send command stop bit for the last transfer + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL | I2C_CMD= _STOP_BIT); + } + + Times =3D 0; + do { + I2C_Delay (2); + + while (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetRxStatus (I2cInfo->Socket, I2cInfo->Port); + } while (Fifo =3D=3D 0); + + I2C_REG_READ (Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); + + RxLen --; + } + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + + return EFI_SUCCESS; } =20 EFI_STATUS EFIAPI -I2CReadMultiByte(I2C_DEVICE *I2cInfo, UINT32 InfoOffset,UINT32 ulRxLen,UIN= T8 *pBuf) +I2CReadMultiByte ( + I2C_DEVICE *I2cInfo, + UINT32 InfoOffset, + UINT32 RxLen, + UINT8 *pBuf + ) { - UINT32 ulCnt; - UINT16 usTotalLen =3D 0; - UINT32 ulFifo; - UINT32 ulTimes =3D 0; - UINT8 I2CWAddr[4]; - EFI_STATUS Status; - UINT32 BytesLeft; - UINT32 Idx =3D 0; - UINTN Base; - - - if(I2cInfo->Port >=3D I2C_PORT_MAX) - { - return EFI_INVALID_PARAMETER; - } - - (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); - Base =3D GetI2cBase(I2cInfo->Socket, I2cInfo->Port); - if(I2cInfo->DeviceType =3D=3D DEVICE_TYPE_E2PROM) - { - I2CWAddr[0] =3D (InfoOffset >> 8) & 0xff; - I2CWAddr[1] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 2,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - - else if(I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_3BYTE_OPERANDS) - { - I2CWAddr[0] =3D (InfoOffset >> 16) & 0xff; - I2CWAddr[1] =3D (InfoOffset >> 8) & 0xff; - I2CWAddr[2] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 3,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - - else if(I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_4BYTE_OPERANDS) - { - I2CWAddr[0] =3D (InfoOffset >> 24) & 0xff; - I2CWAddr[1] =3D (InfoOffset >> 16) & 0xff; - I2CWAddr[2] =3D (InfoOffset >> 8) & 0xff; - I2CWAddr[3] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 4,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - - else - { - I2CWAddr[0] =3D (InfoOffset & 0xff); - Status =3D WriteBeforeRead(I2cInfo, 1,I2CWAddr); - if(EFI_ERROR(Status)) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_ABORTED; - } - } - - - I2C_SetTarget(I2cInfo->Socket,I2cInfo->Port,I2cInfo->SlaveDeviceAddres= s); - usTotalLen =3D ulRxLen; - BytesLeft =3D usTotalLen; - - for(ulCnt =3D 0; ulCnt < BytesLeft; ulCnt++) { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); - } - - - for(ulCnt =3D 0; ulCnt < BytesLeft; ulCnt++) { - ulTimes =3D 0; - do { - I2C_Delay(2); - - while(++ulTimes > I2C_READ_TIMEOUT) { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetRxStatus(I2cInfo->Socket,I2cInfo->Port); - }while(0 =3D=3D ulFifo); - - I2C_REG_READ(Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); - } - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - - return EFI_SUCCESS; + UINT32 Count; + UINT16 TotalLen =3D 0; + UINT32 Fifo; + UINT32 Times =3D 0; + UINT8 I2CWAddr[4]; + EFI_STATUS Status; + UINT32 BytesLeft; + UINT32 Idx =3D 0; + UINTN Base; + + if (I2cInfo->Port >=3D I2C_PORT_MAX) { + return EFI_INVALID_PARAMETER; + } + + (VOID)I2C_Enable (I2cInfo->Socket, I2cInfo->Port); + Base =3D GetI2cBase (I2cInfo->Socket, I2cInfo->Port); + if (I2cInfo->DeviceType =3D=3D DEVICE_TYPE_E2PROM) { + I2CWAddr[0] =3D (InfoOffset >> 8) & 0xff; + I2CWAddr[1] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 2,I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } else if (I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_3BYTE_OPERANDS) { + I2CWAddr[0] =3D (InfoOffset >> 16) & 0xff; + I2CWAddr[1] =3D (InfoOffset >> 8) & 0xff; + I2CWAddr[2] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 3, I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } else if (I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_4BYTE_OPERANDS) { + I2CWAddr[0] =3D (InfoOffset >> 24) & 0xff; + I2CWAddr[1] =3D (InfoOffset >> 16) & 0xff; + I2CWAddr[2] =3D (InfoOffset >> 8) & 0xff; + I2CWAddr[3] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 4,I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } else { + I2CWAddr[0] =3D (InfoOffset & 0xff); + Status =3D WriteBeforeRead (I2cInfo, 1,I2CWAddr); + if (EFI_ERROR (Status)) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_ABORTED; + } + } + + I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddres= s); + TotalLen =3D RxLen; + BytesLeft =3D TotalLen; + + for (Count =3D 0; Count < BytesLeft; Count++) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); + } + + for (Count =3D 0; Count < BytesLeft; Count++) { + Times =3D 0; + do { + I2C_Delay (2); + + while (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetRxStatus (I2cInfo->Socket, I2cInfo->Port); + } while (Fifo =3D=3D 0); + + I2C_REG_READ (Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); + } + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + + return EFI_SUCCESS; } =20 EFI_STATUS EFIAPI -I2CWriteMultiByte(I2C_DEVICE *I2cInfo, UINT32 InfoOffset, UINT32 ulLength,= UINT8 *pBuf) +I2CWriteMultiByte( + I2C_DEVICE *I2cInfo, + UINT32 InfoOffset, + UINT32 Length, + UINT8 *pBuf + ) { - UINT32 ulFifo; - UINT32 ulTimes =3D 0; - UINT32 Idx; - UINTN Base; - - - if(I2cInfo->Port >=3D I2C_PORT_MAX) - { - return EFI_INVALID_PARAMETER; - } - - Base =3D GetI2cBase(I2cInfo->Socket, I2cInfo->Port); - - (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); - - I2C_SetTarget(I2cInfo->Socket,I2cInfo->Port,I2cInfo->SlaveDeviceAddres= s); - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - while(0 !=3D ulFifo) - { - I2C_Delay(2); - if(++ulTimes > I2C_READ_TIMEOUT) - { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - - - if(I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_3BYTE_OPERANDS) - { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xf= f); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff= ); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); - } - - else if(I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_4BYTE_OPERANDS) - { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 24) & 0xf= f); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xf= f); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff= ); - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); - } - - else - { - - } - - ulTimes =3D 0; - for(Idx =3D 0; Idx < ulLength; Idx++) - { - - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, *pBuf++); - - } - - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - ulTimes =3D 0; - while(0 !=3D ulFifo) - { - I2C_Delay(2); - - if(++ulTimes > I2C_READ_TIMEOUT) - { - DEBUG ((EFI_D_ERROR, "I2C Write try to finished,time out!\n")); - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo =3D I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); - } - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - - return EFI_SUCCESS; + UINT32 Fifo; + UINT32 Times =3D 0; + UINT32 Idx; + UINTN Base; + + if (I2cInfo->Port >=3D I2C_PORT_MAX) { + return EFI_INVALID_PARAMETER; + } + + Base =3D GetI2cBase (I2cInfo->Socket, I2cInfo->Port); + + (VOID)I2C_Enable(I2cInfo->Socket, I2cInfo->Port); + + I2C_SetTarget(I2cInfo->Socket, I2cInfo->Port, I2cInfo->SlaveDeviceAddres= s); + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + while (0 !=3D Fifo) { + I2C_Delay (2); + if (++Times > I2C_READ_TIMEOUT) { + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + + if (I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_3BYTE_OPERANDS) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); + } else if (I2cInfo->DeviceType =3D=3D DEVICE_TYPE_CPLD_4BYTE_OPERANDS) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 24) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 16) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, (InfoOffset >> 8) & 0xff); + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, InfoOffset & 0xff); + } else { + } + + Times =3D 0; + for (Idx =3D 0; Idx < Length; Idx++) { + I2C_REG_WRITE (Base + I2C_DATA_CMD_OFFSET, *pBuf++); + } + + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + Times =3D 0; + while (Fifo !=3D 0) { + I2C_Delay (2); + + if (++Times > I2C_READ_TIMEOUT) { + DEBUG ((DEBUG_ERROR, "I2C Write try to finished,time out!\n")); + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + return EFI_TIMEOUT; + } + Fifo =3D I2C_GetTxStatus (I2cInfo->Socket, I2cInfo->Port); + } + (VOID)I2C_Disable (I2cInfo->Socket, I2cInfo->Port); + + return EFI_SUCCESS; } =20 --=20 2.17.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel