From nobody Mon May 12 08:31:44 2025 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 153429763409294.09678836341482; Tue, 14 Aug 2018 18:47:14 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6D12C210F1571; Tue, 14 Aug 2018 18:47:10 -0700 (PDT) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 96A3821959CB2 for ; Tue, 14 Aug 2018 18:47:09 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Aug 2018 18:47:09 -0700 Received: from shenglei-dev.ccr.corp.intel.com ([10.239.158.52]) by fmsmga001.fm.intel.com with ESMTP; 14 Aug 2018 18:47:08 -0700 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=shenglei.zhang@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,241,1531810800"; d="scan'208";a="81435064" From: shenglei To: edk2-devel@lists.01.org Date: Wed, 15 Aug 2018 09:45:45 +0800 Message-Id: <20180815014609.19948-4-shenglei.zhang@intel.com> X-Mailer: git-send-email 2.18.0.windows.1 In-Reply-To: <20180815014609.19948-1-shenglei.zhang@intel.com> References: <20180815014609.19948-1-shenglei.zhang@intel.com> Subject: [edk2] [PATCH v2 03/27] MdeModulePkg AtaAtapiPassThru: Remove redundant functions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Dong , Star Zeng MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RDMRC_1 RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The functions that are never called have been removed. They are AhciCheckDeviceStatus,AhciPortReset,DRDYReady, DRDYReady2,WaitForBSYClear2 and AtaSoftReset. https://bugzilla.tianocore.org/show_bug.cgi?id=3D1062 v2: DRDYReady, DRDYReady2, WaitForBSYClear2 and AtaSoftReset are added to the commit message. Cc: Star Zeng Cc: Eric Dong Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: shenglei Reviewed-by: Laszlo Ersek Reviewed-by: Star Zeng --- .../Bus/Ata/AtaAtapiPassThru/AhciMode.c | 104 ------- .../Bus/Ata/AtaAtapiPassThru/IdeMode.c | 257 ------------------ 2 files changed, 361 deletions(-) diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePk= g/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 79ae11bd20..d7a8b29666 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -294,41 +294,6 @@ AhciCheckMemSet ( } } =20 -/** - Check if the device is still on port. It also checks if the AHCI control= ler - supports the address and data count will be transferred. - - @param PciIo The PCI IO protocol instance. - @param Port The number of port. - - @retval EFI_SUCCESS The device is attached to port and the transfer= data is - supported by AHCI controller. - @retval EFI_UNSUPPORTED The transfer address and count is not supported= by AHCI - controller. - @retval EFI_NOT_READY The physical communication between AHCI control= ler and device - is not ready. - -**/ -EFI_STATUS -EFIAPI -AhciCheckDeviceStatus ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN UINT8 Port - ) -{ - UINT32 Data; - UINT32 Offset; - - Offset =3D EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AH= CI_PORT_SSTS; - - Data =3D AhciReadReg (PciIo, Offset) & EFI_AHCI_PORT_SSTS_DET_MASK; - - if (Data =3D=3D EFI_AHCI_PORT_SSTS_DET_PCE) { - return EFI_SUCCESS; - } - - return EFI_NOT_READY; -} =20 /** =20 @@ -1361,75 +1326,6 @@ AhciStartCommand ( return EFI_SUCCESS; } =20 -/** - Do AHCI port reset. - - @param PciIo The PCI IO protocol instance. - @param Port The number of port. - @param Timeout The timeout value of reset, uses 100ns as a u= nit. - - @retval EFI_DEVICE_ERROR The port reset unsuccessfully - @retval EFI_TIMEOUT The reset operation is time out. - @retval EFI_SUCCESS The port reset successfully. - -**/ -EFI_STATUS -EFIAPI -AhciPortReset ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN UINT8 Port, - IN UINT64 Timeout - ) -{ - EFI_STATUS Status; - UINT32 Offset; - - AhciClearPortStatus (PciIo, Port); - - AhciStopCommand (PciIo, Port, Timeout); - - AhciDisableFisReceive (PciIo, Port, Timeout); - - AhciEnableFisReceive (PciIo, Port, Timeout); - - Offset =3D EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AH= CI_PORT_SCTL; - - AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_SCTL_DET_INIT); - - // - // wait 5 millisecond before de-assert DET - // - MicroSecondDelay (5000); - - AhciAndReg (PciIo, Offset, (UINT32)EFI_AHCI_PORT_SCTL_MASK); - - // - // wait 5 millisecond before de-assert DET - // - MicroSecondDelay (5000); - - // - // Wait for communication to be re-established - // - Offset =3D EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AH= CI_PORT_SSTS; - Status =3D AhciWaitMmioSet ( - PciIo, - Offset, - EFI_AHCI_PORT_SSTS_DET_MASK, - EFI_AHCI_PORT_SSTS_DET_PCE, - Timeout - ); - - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "Port %d COMRESET failed: %r\n", Port, Status)); - return Status; - } - - Offset =3D EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AH= CI_PORT_SERR; - AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_ERR_CLEAR); - - return EFI_SUCCESS; -} =20 /** Do AHCI HBA reset. diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c b/MdeModulePkg= /Bus/Ata/AtaAtapiPassThru/IdeMode.c index 6478f7be07..79142c330d 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c @@ -627,146 +627,8 @@ DRQReady2 ( return EFI_TIMEOUT; } =20 -/** - This function is used to poll for the DRDY bit set in the Status Registe= r. DRDY - bit is set when the device is ready to accept command. Most ATA commands= must be - sent after DRDY set except the ATAPI Packet Command. - - @param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure. - @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. - @param Timeout The time to complete the command, uses 100ns as = a unit. - - @retval EFI_SUCCESS DRDY bit set within the time out. - @retval EFI_TIMEOUT DRDY bit not set within the time out. - - @note Read Status Register will clear interrupt status. -**/ -EFI_STATUS -EFIAPI -DRDYReady ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN EFI_IDE_REGISTERS *IdeRegisters, - IN UINT64 Timeout - ) -{ - UINT64 Delay; - UINT8 StatusRegister; - UINT8 ErrorRegister; - BOOLEAN InfiniteWait; - - ASSERT (PciIo !=3D NULL); - ASSERT (IdeRegisters !=3D NULL); - - if (Timeout =3D=3D 0) { - InfiniteWait =3D TRUE; - } else { - InfiniteWait =3D FALSE; - } - - Delay =3D DivU64x32(Timeout, 1000) + 1; - do { - StatusRegister =3D IdeReadPortB (PciIo, IdeRegisters->CmdOrStatus); - // - // Wait for BSY =3D=3D 0, then judge if DRDY is set or ERR is set - // - if ((StatusRegister & ATA_STSREG_BSY) =3D=3D 0) { - if ((StatusRegister & ATA_STSREG_ERR) =3D=3D ATA_STSREG_ERR) { - ErrorRegister =3D IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); - - if ((ErrorRegister & ATA_ERRREG_ABRT) =3D=3D ATA_ERRREG_ABRT) { - return EFI_ABORTED; - } - return EFI_DEVICE_ERROR; - } - - if ((StatusRegister & ATA_STSREG_DRDY) =3D=3D ATA_STSREG_DRDY) { - return EFI_SUCCESS; - } else { - return EFI_DEVICE_ERROR; - } - } - - // - // Stall for 100 microseconds. - // - MicroSecondDelay (100); - - Delay--; - } while (InfiniteWait || (Delay > 0)); - - return EFI_TIMEOUT; -} - -/** - This function is used to poll for the DRDY bit set in the Alternate Stat= us Register. - DRDY bit is set when the device is ready to accept command. Most ATA com= mands must - be sent after DRDY set except the ATAPI Packet Command. - - @param PciIo A pointer to EFI_PCI_IO_PROTOCOL data structure. - @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. - @param Timeout The time to complete the command, uses 100ns as = a unit. - - @retval EFI_SUCCESS DRDY bit set within the time out. - @retval EFI_TIMEOUT DRDY bit not set within the time out. - - @note Read Alternate Status Register will clear interrupt status. - -**/ -EFI_STATUS -EFIAPI -DRDYReady2 ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN EFI_IDE_REGISTERS *IdeRegisters, - IN UINT64 Timeout - ) -{ - UINT64 Delay; - UINT8 AltRegister; - UINT8 ErrorRegister; - BOOLEAN InfiniteWait; - - ASSERT (PciIo !=3D NULL); - ASSERT (IdeRegisters !=3D NULL); - - if (Timeout =3D=3D 0) { - InfiniteWait =3D TRUE; - } else { - InfiniteWait =3D FALSE; - } - - Delay =3D DivU64x32(Timeout, 1000) + 1; - do { - AltRegister =3D IdeReadPortB (PciIo, IdeRegisters->AltOrDev); - // - // Wait for BSY =3D=3D 0, then judge if DRDY is set or ERR is set - // - if ((AltRegister & ATA_STSREG_BSY) =3D=3D 0) { - if ((AltRegister & ATA_STSREG_ERR) =3D=3D ATA_STSREG_ERR) { - ErrorRegister =3D IdeReadPortB (PciIo, IdeRegisters->ErrOrFeature); - - if ((ErrorRegister & ATA_ERRREG_ABRT) =3D=3D ATA_ERRREG_ABRT) { - return EFI_ABORTED; - } - return EFI_DEVICE_ERROR; - } - - if ((AltRegister & ATA_STSREG_DRDY) =3D=3D ATA_STSREG_DRDY) { - return EFI_SUCCESS; - } else { - return EFI_DEVICE_ERROR; - } - } - - // - // Stall for 100 microseconds. - // - MicroSecondDelay (100); =20 - Delay--; - } while (InfiniteWait || (Delay > 0)); =20 - return EFI_TIMEOUT; -} =20 /** This function is used to poll for the BSY bit clear in the Status Regist= er. BSY @@ -822,59 +684,6 @@ WaitForBSYClear ( return EFI_TIMEOUT; } =20 -/** - This function is used to poll for the BSY bit clear in the Status Regist= er. BSY - is clear when the device is not busy. Every command must be sent after d= evice is not busy. - - @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data s= tructure. - @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. - @param Timeout The time to complete the command, uses 100ns as = a unit. - - @retval EFI_SUCCESS BSY bit clear within the time out. - @retval EFI_TIMEOUT BSY bit not clear within the time out. - - @note Read Status Register will clear interrupt status. -**/ -EFI_STATUS -EFIAPI -WaitForBSYClear2 ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN EFI_IDE_REGISTERS *IdeRegisters, - IN UINT64 Timeout - ) -{ - UINT64 Delay; - UINT8 AltStatusRegister; - BOOLEAN InfiniteWait; - - ASSERT (PciIo !=3D NULL); - ASSERT (IdeRegisters !=3D NULL); - - if (Timeout =3D=3D 0) { - InfiniteWait =3D TRUE; - } else { - InfiniteWait =3D FALSE; - } - - Delay =3D DivU64x32(Timeout, 1000) + 1; - do { - AltStatusRegister =3D IdeReadPortB (PciIo, IdeRegisters->AltOrDev); - - if ((AltStatusRegister & ATA_STSREG_BSY) =3D=3D 0x00) { - return EFI_SUCCESS; - } - - // - // Stall for 100 microseconds. - // - MicroSecondDelay (100); - - Delay--; - - } while (InfiniteWait || (Delay > 0)); - - return EFI_TIMEOUT; -} =20 /** Get IDE i/o port registers' base addresses by mode. @@ -1017,72 +826,6 @@ GetIdeRegisterIoAddr ( return EFI_SUCCESS; } =20 -/** - This function is used to implement the Soft Reset on the specified devic= e. But, - the ATA Soft Reset mechanism is so strong a reset method that it will fo= rce - resetting on both devices connected to the same cable. - - It is called by IdeBlkIoReset(), a interface function of Block - I/O protocol. - - This function can also be used by the ATAPI device to perform reset when - ATAPI Reset command is failed. - - @param PciIo A pointer to ATA_ATAPI_PASS_THRU_INSTANCE data s= tructure. - @param IdeRegisters A pointer to EFI_IDE_REGISTERS data structure. - @param Timeout The time to complete the command, uses 100ns as = a unit. - - @retval EFI_SUCCESS Soft reset completes successfully. - @retval EFI_DEVICE_ERROR Any step during the reset process is failed. - - @note The registers initial values after ATA soft reset are different - to the ATA device and ATAPI device. -**/ -EFI_STATUS -EFIAPI -AtaSoftReset ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN EFI_IDE_REGISTERS *IdeRegisters, - IN UINT64 Timeout - ) -{ - UINT8 DeviceControl; - - DeviceControl =3D 0; - // - // disable Interrupt and set SRST bit to initiate soft reset - // - DeviceControl =3D ATA_CTLREG_SRST | ATA_CTLREG_IEN_L; - - IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); - - // - // SRST should assert for at least 5 us, we use 10 us for - // better compatibility - // - MicroSecondDelay (10); - - // - // Enable interrupt to support UDMA, and clear SRST bit - // - DeviceControl =3D 0; - IdeWritePortB (PciIo, IdeRegisters->AltOrDev, DeviceControl); - - // - // Wait for at least 10 ms to check BSY status, we use 10 ms - // for better compatibility - // - MicroSecondDelay (10000); - - // - // slave device needs at most 31ms to clear BSY - // - if (WaitForBSYClear (PciIo, IdeRegisters, Timeout) =3D=3D EFI_TIMEOUT) { - return EFI_DEVICE_ERROR; - } - - return EFI_SUCCESS; -} =20 /** Send ATA Ext command into device with NON_DATA protocol. --=20 2.18.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel