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23 Aug 2017 20:18:30 -0700 Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga002.jf.intel.com with ESMTP; 23 Aug 2017 20:18:31 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 23 Aug 2017 20:18:30 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 23 Aug 2017 20:18:29 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.183]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Thu, 24 Aug 2017 11:18:27 +0800 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,419,1498546800"; d="dat'59?scan'59,208,59";a="127640722" From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 07/1 BroxtonPlatformPkg: Add BensonTypeC support Thread-Index: AdMch6b8caJ15lMQRnaYyBYNcJBbZg== Date: Thu, 24 Aug 2017 03:18:27 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15253FC64@shsmsx102.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15253FC64@shsmsx102.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017 07/1 BroxtonPlatformPkg: Add BensonTypeC support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../BensonGlacier/BoardInitPostMem/BoardInit.c | 8 - .../BensonGlacier/BoardInitPostMem/BoardInit.h | 15 +- .../BoardInitPostMem/BoardInitMiscs.c | 37 ++- .../BoardInitPostMem/BoardInitMiscs.h | 68 +++-- .../BoardInitPostMem/BoardInitPostMem.inf | 6 +- .../Board/BensonGlacier/BoardInitPostMem/TypeC.c | 288 +++++++++++++++++= ++++ .../Board/BensonGlacier/BoardInitPostMem/TypeC.h | 79 ++++++ 7 files changed, 463 insertions(+), 38 deletions(-) create mode 100644 Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardIn= itPostMem/TypeC.c create mode 100644 Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardIn= itPostMem/TypeC.h diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.c index 7c44a63..729a158 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c @@ -13,15 +13,7 @@ =20 **/ =20 -#include -#include -#include -#include -#include -#include -#include #include "BoardInit.h" -#include "BoardInitMiscs.h" =20 EFI_STATUS EFIAPI diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.h index 0a549c2..870f9c3 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h @@ -18,10 +18,21 @@ #define _BENSON_BOARDINIT_H_ =20 #include -#include + +#include + +#include +#include #include +#include +#include +#include +#include #include -#include + +#include + +#include "BoardInitMiscs.h" =20 VOID BensonGpioTest (VOID); =20 diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/Board= InitPostMem/BoardInitMiscs.c index e10ab84..49c8b60 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.c @@ -15,7 +15,6 @@ =20 #include "BoardInitMiscs.h" =20 - /** Configure GPIO group GPE tier. =20 @@ -49,6 +48,7 @@ BensonMultiPlatformInfoInit ( IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob ) { + UINT8 Data8; EFI_STATUS Status; =20 #if (ENBDT_PF_ENABLE =3D=3D 1) @@ -128,6 +128,39 @@ BensonMultiPlatformInfoInit ( Status =3D BensonInitializeBoardOemId (PeiServices, PlatformInfoHob); Status =3D BensonInitializeBoardSsidSvid (PeiServices, PlatformInfoHob); =20 + // + // TypeC MUX AUX mode + // + + // + // Set P0-P4 to input mode + // + Data8 =3D 0x1F; + Status =3D ByteWriteI2C (0x05, 0x38, 0x03, 1, &Data8); + DEBUG ((DEBUG_INFO, "%a(#%d) - Setting button MUX into GPI mode returned= %r\n", __FUNCTION__, __LINE__, Status)); + + // + // Set P0-P4 to inverted mode + // + Data8 =3D 0x1F; + Status =3D ByteWriteI2C (0x05, 0x38, 0x02, 1, &Data8); + DEBUG ((DEBUG_INFO, "%a(#%d) - Setting button MUX into inverted mode ret= urned %r\n", __FUNCTION__, __LINE__, Status)); + + // + // Dump switch state + // + Data8 =3D 0x00; + Status =3D ByteReadI2C (0x05, 0x38, 0x00, 1, &Data8); + DEBUG ((DEBUG_INFO, "%a(#%d) - ByteReadI2C[0] returned %r\n", __FUNCTION= __, __LINE__, Status)); + if (!EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "%a(#%d) - Input register =3D %02x\n", __F= UNCTION__, __LINE__, Data8)); + DEBUG ((DEBUG_INFO, "%a(#%d) - Volume + =3D %a\n", __FUN= CTION__, __LINE__, (Data8 & BIT0) ? "Pressed" : "Not pressed")); + DEBUG ((DEBUG_INFO, "%a(#%d) - Volume - =3D %a\n", __FUN= CTION__, __LINE__, (Data8 & BIT1) ? "Pressed" : "Not pressed")); + DEBUG ((DEBUG_INFO, "%a(#%d) - BT Pair =3D %a\n", __FUN= CTION__, __LINE__, (Data8 & BIT2) ? "Pressed" : "Not pressed")); + DEBUG ((DEBUG_INFO, "%a(#%d) - Mic Mute =3D %a\n", __FUN= CTION__, __LINE__, (Data8 & BIT3) ? "Pressed" : "Not pressed")); + DEBUG ((DEBUG_INFO, "%a(#%d) - Speaker Mute =3D %a\n", __FUN= CTION__, __LINE__, (Data8 & BIT4) ? "Pressed" : "Not pressed")); + } + return EFI_SUCCESS; } =20 @@ -151,7 +184,7 @@ BensonInitializeBoardOemId ( break; } =20 - PlatformInfoHob->AcpiOemId =3D OemId; + PlatformInfoHob->AcpiOemId =3D OemId; PlatformInfoHob->AcpiOemTableId =3D OemTableId; =20 return EFI_SUCCESS; diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitMiscs.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/Board= InitPostMem/BoardInitMiscs.h index b9844ef..2cf4810 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitMiscs.h @@ -27,42 +27,49 @@ #define RES_IO_LIMIT 0xFFFF =20 #include -#include #include + +#include "CMOSMap.h" +#include "CpuRegs.h" +#include "Platform.h" #include "PlatformBaseAddresses.h" +#include "PlatformBootMode.h" #include "ScAccess.h" #include "SetupMode.h" -#include "PlatformBootMode.h" -#include "CpuRegs.h" -#include "Platform.h" -#include "CMOSMap.h" -#include -#include -#include -#include -#include -#include + +#include #include -#include +#include +#include +#include +#include +#include +#include + +#include + +#include #include -#include -#include +#include +#include #include -#include +#include +#include +#include #include -#include -#include -#include -#include +#include + +#include +#include +#include +#include #include +#include #include -#include +#include #include -#include -#include -#include -#include -#include +#include +#include =20 #define EFI_ACPI_OEM_ID_DEFAULT SIGNATURE_64('I', 'N', 'T', 'E', 'L', '= ', ' ', ' ') // max 6 chars #define EFI_ACPI_OEM_ID1 SIGNATURE_64('I', 'N', 'T', 'E', 'L', '= 1', ' ', ' ') // max 6 chars @@ -123,5 +130,16 @@ BensonInitializeBoardSsidSvid ( IN EFI_PLATFORM_INFO_HOB *PlatformInfoHob ); =20 +VOID +DumpMux ( + VOID + ); + +EFI_STATUS +EFIAPI +SetupTypecMuxAux ( + VOID + ); + #endif =20 diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/B= oardInitPostMem/BoardInitPostMem.inf index 3b08d2f..def40bf 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitPostMem.inf @@ -2,7 +2,7 @@ # Board detected module for Intel(R) Atom(TM) x5 Processor Series. # It will detect the board ID. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -30,6 +30,8 @@ PlatformInfoHob.c BoardGpios.c BoardGpios.h + TypeC.c + TypeC.h =20 [LibraryClasses] PeiServicesLib @@ -40,6 +42,8 @@ IoLib SteppingLib GpioLib + I2cLibPei + TimerLib =20 [Packages] MdePkg/MdePkg.dec diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/TypeC.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/TypeC.c new file mode 100644 index 0000000..6bee83e --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Type= C.c @@ -0,0 +1,288 @@ +/** @file + This file does TypeC initialization. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#include "TypeC.h" + +static MUX_PROGRAMMING_TABLE mBgMuxTable[] =3D { + // Address Register Data String + //=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + {A_GENERAL, R_FIRMWARE_VERSION, MUX_TABLE_NULL, "Firmware Version N= umber"}, + {A_STATUS, R_CC_STATUS_1, MUX_TABLE_NULL, "CC_Status_1"}, + {A_STATUS, R_CC_STATUS_2, MUX_TABLE_NULL, "CC_Status_2"}, + {A_STATUS, R_CC_STATUS_3, MUX_TABLE_NULL, "CC_Status_3"}, + {A_STATUS, R_MUX_HPD_ASSERT, MUX_TABLE_NULL, "MUX_In_HPD_Asserti= on"}, + {A_STATUS, R_MUX_STATUS, MUX_TABLE_NULL, "MUX Status"}, + {A_STATUS, R_MUX_DP_TRAINING, MUX_TABLE_NULL, "MUX_DP_Training_Di= sable"}, + {A_STATUS, R_MUX_DP_AUX_INTERCEPT, MUX_TABLE_NULL, "MUX_DP_AUX_Interce= ption_Disable"}, + {A_STATUS, R_MUX_DP_EQ_CONFIG, MUX_TABLE_NULL, "MUX_DP_EQ_Configur= ation"}, + {A_STATUS, R_MUX_DP_OUTPUT_CONFIG, MUX_TABLE_NULL, "MUX_DP_Output_Conf= iguration"} +}; + +VOID +PrintChar ( + IN UINTN DebugMask, + IN UINTN Count, + IN CHAR16 *Char +) +{ + UINTN Index; + + for (Index =3D 0; Index < Count; Index++) { + DEBUG ((DebugMask, "%s", Char)); + } +} + +#define DIVIDING_LINE "+--------------------------------------------------= --+------------------+\n" + +VOID +DumpParagraph ( + IN UINTN DebugMask, + IN VOID *Ptr, + IN UINTN Count + ) +{ + CHAR8 AsciiBuffer[17]; + UINT8 *Data; + UINTN Index; + UINTN Paragraphs; + UINTN PlaceHolder; + UINTN PlaceHolders; + + // + // Use a different pointer so that the one passed in doesn't change + // + Data =3D (UINT8 *) Ptr; + // + // Calcualte the number of paragraphs + // + Paragraphs =3D Count / 16; + if ((Paragraphs * 16) < Count) { + Paragraphs++; + } + // + // Calculate the number of columns + // + PlaceHolder =3D Paragraphs; + PlaceHolders =3D 0; + while (PlaceHolder > 0) { + PlaceHolders++; + PlaceHolder >>=3D 4; + } + + // + // Dump the buffer + // + if (Count > 0 ) { + // + // Print header + // + PrintChar (DebugMask, PlaceHolders + 5, L" "); + DEBUG ((DebugMask, DIVIDING_LINE)); + PrintChar (DebugMask, PlaceHolders + 5, L" "); + DEBUG ((DebugMask, "| x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE = xF | String |\n")); + DEBUG ((DebugMask, " +")); + PrintChar (DebugMask, PlaceHolders + 3, L"-"); + DEBUG ((DebugMask, DIVIDING_LINE)); + // + // Print data + // + for (Index =3D 0; Index < (Paragraphs * 16); Index++) { + // + // Print divider + // + if (Index % 0x10 =3D=3D 0x00) { + if ((Index > 0) && ((Index / 0x10) % 0x04 =3D=3D 0x00) && (Paragra= phs > 6)) { + DEBUG ((DebugMask, " +")); + PrintChar (DebugMask, PlaceHolders + 3, L"-"); + DEBUG ((DebugMask, DIVIDING_LINE)); + } + DEBUG ((DebugMask, " | %0*xx | ", PlaceHolders, (Index / 0x10))); + } + // + // Print the data or a filler + // + if (Index < Count) { + DEBUG ((DebugMask, "%02x ", Data[Index])); + if ((Data[Index] < 32) || (Data[Index] > 126)) { + // + // Not printable + // + AsciiBuffer[(Index % 0x10)] =3D '.'; + } else { + // + // Printable + // + AsciiBuffer[(Index % 0x10)] =3D Data[Index]; + } + } else { + DEBUG ((DebugMask, " ")); + AsciiBuffer[(Index % 0x10)] =3D ' '; + } + // + // Print break or line end if needed + // + if (Index % 0x10 =3D=3D 0x0F) { + AsciiBuffer[16] =3D 0x00; + DEBUG ((DebugMask, "| %a |\n", AsciiBuffer)); + } else if (Index % 0x04 =3D=3D 0x03) { + DEBUG ((DebugMask, " ")); + } + } + // + // Print footer + // + DEBUG ((DebugMask, " +")); + PrintChar (DebugMask, PlaceHolders + 3, L"-"); + DEBUG ((DebugMask, DIVIDING_LINE)); + } +} + +EFI_STATUS +EFIAPI +ReadMux ( + IN UINT8 SlaveAddress, + IN UINT8 Offset, + OUT UINT8 *Data + ) +{ + UINT8 RetryCount; + EFI_STATUS Status; + + RetryCount =3D MUX_RETRY_COUNT; + do { + *Data =3D 0x00; + Status =3D ByteReadI2C (PARADE_MUX_I2C_BUS, SlaveAddress, Offset, 1, D= ata); + } while ((RetryCount-- > 0) && (EFI_ERROR (Status))); + + return Status; +} + +EFI_STATUS +EFIAPI +WriteMux ( + IN UINT8 SlaveAddress, + IN UINT8 Offset, + OUT UINT8 *Data + ) +{ + UINT8 RetryCount; + EFI_STATUS Status; + + RetryCount =3D MUX_RETRY_COUNT; + do { + Status =3D ByteWriteI2C (PARADE_MUX_I2C_BUS, SlaveAddress, Offset, 1, = Data); + } while ((RetryCount-- > 0) && (EFI_ERROR (Status))); + + return Status; +} + +VOID +DumpMux ( + VOID + ) +{ + UINT8 Data[256]; + UINT16 Offset; + BXT_CONF_PAD0 padConfg0; + BXT_CONF_PAD1 padConfg1; + UINT8 SlaveAddress; + EFI_STATUS Status; + + // + // Loop thru device and dump it all + // + DEBUG ((DEBUG_INFO, "\n%a(#%d) - Dump the PS8750 I2C data\n", __FUNCTION= __, __LINE__)); + for (SlaveAddress =3D 0x08; SlaveAddress <=3D 0x0E; SlaveAddress++) { + for (Offset =3D 0x00; Offset <=3D 0xFF; Offset++) { + Status =3D ReadMux (SlaveAddress, (UINT8) Offset, &Data[Offset]); + if (EFI_ERROR (Status)) Data[Offset] =3D 0xFF; + } + DEBUG ((DEBUG_INFO, "\nSlaveAddress =3D 0x%02x\n", (SlaveAddress << 1)= )); + DumpParagraph (DEBUG_INFO, Data, 256); + } + DEBUG ((DEBUG_INFO, "\n")); + padConfg0.padCnf0 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF0_OFFS= ET); + padConfg1.padCnf1 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF1_OFFS= ET); + DEBUG ((DEBUG_INFO, "%a(#%d) - GPIO_199 (DDI1 HPD) Rx =3D %d RxInv =3D = %d\n\n", __FUNCTION__, __LINE__, padConfg0.r.GPIORxState, padConfg0.r.RXINV= )); +} + +EFI_STATUS +EFIAPI +SetupTypecMuxAux ( + VOID + ) +{ + UINT8 Data8; + UINTN index; + MUX_DATA_TABLE MuxData; + BXT_CONF_PAD0 padConfg0; + BXT_CONF_PAD1 padConfg1; + UINT8 *Ptr; + EFI_STATUS Status; + + // + // Read/write MUX info + // + Ptr =3D (UINT8 *) &MuxData; + for (index =3D 0; index < (sizeof (mBgMuxTable) / sizeof (mBgMuxTable[0]= )); index++) { + Status =3D ReadMux (mBgMuxTable[index].Address, mBgMuxTable[index].Reg= ister, &Data8); + DEBUG ((DEBUG_INFO, "%a(#%d) - %.*a [0x%02x:0x%02x] =3D 0x%02x (%r)\n"= , __FUNCTION__, __LINE__, MUX_TABLE_STRING_LENGTH, mBgMuxTable[index].Strin= g, (mBgMuxTable[index].Address << 1), mBgMuxTable[index].Register, Data8, S= tatus)); + Ptr[index] =3D Data8; + if ((mBgMuxTable[index].Data !=3D MUX_TABLE_NULL) && (!EFI_ERROR (Stat= us))) { + Data8 =3D (UINT8) (mBgMuxTable[index].Data & 0x00FF); + Status =3D WriteMux (mBgMuxTable[index].Address, mBgMuxTable[index].= Register, &Data8); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a(#%d) - ERROR: ByteWriteI2C returned %r fo= r %a =3D 0x%02x\n", __FUNCTION__, __LINE__, Status, mBgMuxTable[index].Stri= ng, Data8)); + } else { + Status =3D ReadMux (mBgMuxTable[index].Address, mBgMuxTable[index]= .Register, &Data8); + DEBUG ((DEBUG_INFO, "%a(#%d) - %.*a [0x%02x:0x%02x] =3D 0x%02x (%r= )\n", __FUNCTION__, __LINE__, MUX_TABLE_STRING_LENGTH, mBgMuxTable[index].S= tring, (mBgMuxTable[index].Address << 1), mBgMuxTable[index].Register, Data= 8, Status)); + Ptr[index] =3D Data8; + } + } + } + + // + // Display HPD + // + padConfg0.padCnf0 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF0_OFFS= ET); + padConfg1.padCnf1 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF1_OFFS= ET); + DEBUG ((DEBUG_INFO, "%a(#%d) - GPIO_199 (DDI1 HPD) Rx =3D %d RxInv =3D = %d\n", __FUNCTION__, __LINE__, padConfg0.r.GPIORxState, padConfg0.r.RXINV)); + + // + // See if we need to assert the HPD on the MUX + // + if ((MuxData.MuxStatus & BIT7) =3D=3D BIT7) { + // + // We are in DP mode + // + if ((MuxData.HpdAssert & BIT7) !=3D BIT7) { + // + // We need to assert the MUX HPD + // + Data8 =3D MuxData.HpdAssert | BIT7; + Status =3D WriteMux (A_STATUS, R_MUX_HPD_ASSERT, &Data8); + + // + // Display HPD + // + padConfg0.padCnf0 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF0_= OFFSET); + padConfg1.padCnf1 =3D GpioPadRead (NW_GPIO_199 + BXT_GPIO_PAD_CONF1_= OFFSET); + DEBUG ((DEBUG_INFO, "%a(#%d) - GPIO_199 (DDI1 HPD) Rx =3D %d RxInv = =3D %d\n", __FUNCTION__, __LINE__, padConfg0.r.GPIORxState, padConfg0.r.RXI= NV)); + } + } + + return EFI_SUCCESS; +} + diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/TypeC.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/TypeC.h new file mode 100644 index 0000000..c145c69 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Type= C.h @@ -0,0 +1,79 @@ +/** @file + Multiplatform initialization header file. + This file includes package header files, library classes. + + Copyright (c) 2017, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BS= D License + which accompanies this distribution. The full text of the license may b= e found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMP= LIED. + +**/ + +#ifndef _BENSON_TYPEC_LIB_H_ +#define _BENSON_TYPEC_LIB_H_ + +#include +#include + +#include +#include +#include +#include + +// +// Parade Tech PS8750 TypeC MUX +// +#define PARADE_MUX_I2C_BUS 0x01 +#define A_GENERAL 0x08 +#define R_FIRMWARE_VERSION 0x90 +#define A_STATUS 0x09 +#define R_DP_AUX_SNOOP_BW 0x10 +#define R_DP_AUX_SNOOP_LC 0x11 +#define R_DP_AUX_SNOOP_L0 0x12 +#define R_DP_AUX_SNOOP_L1 0x13 +#define R_DP_AUX_SNOOP_L2 0x14 +#define R_DP_AUX_SNOOP_L3 0x15 +#define R_DP_AUX_SNOOP_D3 0x1E +#define R_MUX_STATUS 0x80 +#define R_MUX_DP_TRAINING 0x83 +#define R_MUX_DP_AUX_INTERCEPT 0x85 +#define R_MUX_DP_EQ_CONFIG 0x86 +#define R_MUX_DP_OUTPUT_CONFIG 0x87 +#define R_MUX_HPD_ASSERT 0xBC +#define R_CC_STATUS_1 0xEC +#define R_CC_STATUS_2 0xED +#define R_CC_STATUS_3 0xEE +#define MUX_TABLE_NULL 0xFFFF +#define MUX_RETRY_COUNT 0x03 +#define MUX_TABLE_STRING_LENGTH 32 + +typedef struct { + UINT8 Address; + UINT8 Register; + UINT16 Data; + CHAR8 String[MUX_TABLE_STRING_LENGTH]; +} MUX_PROGRAMMING_TABLE; + +typedef struct { + // + // These UINT8 elements need to match the MUX_PROGRAMMING_TABLE list so = we can use the Index to reference them + // + UINT8 FirmwareVersion; // Offset 0 + UINT8 CcStatus1; // Offset 1 + UINT8 CcStatus2; // Offset 2 + UINT8 CcStatus3; // Offset 3 + UINT8 MuxStatus; // Offset 4 + UINT8 HpdAssert; // Offset 5 + UINT8 DpTraining; // Offset 6 + UINT8 DpAuxIntercept; // Offset 7 + UINT8 DpEqConfig; // Offset 8 + UINT8 DpOutputConfig; // Offset 9 +} MUX_DATA_TABLE; + +#endif + --=20 2.10.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel