.../BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
Set bit30(VCL) of R_SPI_LVSCC because Vendor Specific Component Capabilities should be locked.
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
---
.../BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c
index 722f297..4240fd5 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c
@@ -1,7 +1,7 @@
/** @file
SC SPI Common Driver implements the SPI Host Controller Compatibility Interface.
- Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -74,6 +74,8 @@ SpiProtocolConstructor (
SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP);
DEBUG ((DEBUG_INFO, "Flash RegionPermission : %0x\n", SpiInstance->RegionPermission));
+ MmioOr32 (ScSpiBar0 + R_SPI_LVSCC, B_SPI_LVSCC_VCL);
+
SpiInstance->SfdpVscc0Value = MmioRead32 (ScSpiBar0 + R_SPI_LVSCC);
DEBUG ((DEBUG_INFO, "Component 0 SFDP VSCC value : %0x\n", SpiInstance->SfdpVscc0Value));
SpiInstance->SfdpVscc1Value = MmioRead32 (ScSpiBar0 + R_SPI_UVSCC);
--
2.10.1.windows.1
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Reviewed-by: zwei4 <david.wei@intel.com> Thanks, David Wei Intel SSG/STO/UEFI BIOS -----Original Message----- From: Guo, Mang Sent: Wednesday, June 13, 2018 5:05 PM To: edk2-devel@lists.01.org Cc: Wei, David <david.wei@intel.com> Subject: [Patch][edk2-platforms/devel-MinnowBoardMax-UDK2017] Set R_SPI_LVSCC Set bit30(VCL) of R_SPI_LVSCC because Vendor Specific Component Capabilities should be locked. Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com> --- .../BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c index 722f297..4240fd5 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c @@ -1,7 +1,7 @@ /** @file SC SPI Common Driver implements the SPI Host Controller Compatibility Interface. - Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -74,6 +74,8 @@ SpiProtocolConstructor ( SpiInstance->RegionPermission = MmioRead16 (ScSpiBar0 + R_SPI_FRAP); DEBUG ((DEBUG_INFO, "Flash RegionPermission : %0x\n", SpiInstance->RegionPermission)); + MmioOr32 (ScSpiBar0 + R_SPI_LVSCC, B_SPI_LVSCC_VCL); + SpiInstance->SfdpVscc0Value = MmioRead32 (ScSpiBar0 + R_SPI_LVSCC); DEBUG ((DEBUG_INFO, "Component 0 SFDP VSCC value : %0x\n", SpiInstance->SfdpVscc0Value)); SpiInstance->SfdpVscc1Value = MmioRead32 (ScSpiBar0 + R_SPI_UVSCC); -- 2.10.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
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