Add a new CPU model called 'EPYC' to model processors from AMD EPYC
family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx).
The following features bits have been added/removed compare to Opteron_G5
Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw,
fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha
xsaveopt, xsavec, xgetbv1, arat
Removed: xop, fma4, tbm
The patch is depend on EPYC CPU model supported introduced in qemu [1]
[1] https://patchwork.kernel.org/patch/9902205/
Cc: Tom Lendacky <Thomas.Lendacky@amd.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
src/cpu/cpu_map.xml | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index 8e7ac49..522d66b 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -251,6 +251,9 @@
<feature name='clflushopt'>
<cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00800000'/>
</feature>
+ <feature name='sha_ni'>
+ <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x20000000'/>
+ </feature>
<feature name='avx512pf'>
<cpuid eax_in='0x07' ecx_in='0x00' ebx='0x04000000'/>
</feature>
@@ -1545,6 +1548,77 @@
<feature name='xop'/>
<feature name='xsave'/>
</model>
+
+ <model name='EPYC'>
+ <signature family='23' model='1'/>
+ <vendor name='AMD'/>
+ <feature name='sse2'/>
+ <feature name='sse'/>
+ <feature name='fxsr'/>
+ <feature name='mmx'/>
+ <feature name='clflush'/>
+ <feature name='pse36'/>
+ <feature name='pat'/>
+ <feature name='cmov'/>
+ <feature name='mca'/>
+ <feature name='pge'/>
+ <feature name='mtrr'/>
+ <feature name='sep'/>
+ <feature name='apic'/>
+ <feature name='cx8'/>
+ <feature name='mce'/>
+ <feature name='pae'/>
+ <feature name='msr'/>
+ <feature name='tsc'/>
+ <feature name='pse'/>
+ <feature name='de'/>
+ <feature name='vme'/>
+ <feature name='fpu'/>
+ <feature name='rdrand'/>
+ <feature name='f16c'/>
+ <feature name='avx'/>
+ <feature name='xsave'/>
+ <feature name='aes'/>
+ <feature name='popcnt'/>
+ <feature name='movbe'/>
+ <feature name='sse4.2'/>
+ <feature name='sse4.1'/>
+ <feature name='cx16'/>
+ <feature name='fma'/>
+ <feature name='ssse3'/>
+ <feature name='monitor'/>
+ <feature name='pclmuldq'/>
+ <feature name='pni'/>
+ <feature name='lm'/>
+ <feature name='rdtscp'/>
+ <feature name='pdpe1gb'/>
+ <feature name='fxsr_opt'/>
+ <feature name='mmxext'/>
+ <feature name='nx'/>
+ <feature name='syscall'/>
+ <feature name='osvw'/>
+ <feature name='3dnowprefetch'/>
+ <feature name='misalignsse'/>
+ <feature name='sse4a'/>
+ <feature name='abm'/>
+ <feature name='cr8legacy'/>
+ <feature name='svm'/>
+ <feature name='lahf_lm'/>
+ <feature name='fsgsbase'/>
+ <feature name='bmi1'/>
+ <feature name='avx2'/>
+ <feature name='smep'/>
+ <feature name='bmi2'/>
+ <feature name='rdseed'/>
+ <feature name='adx'/>
+ <feature name='smap'/>
+ <feature name='clflushopt'/>
+ <feature name='sha_ni'/>
+ <feature name='xsaveopt'/>
+ <feature name='xsavec'/>
+ <feature name='xgetbv1'/>
+ <feature name='arat'/>
+ </model>
</arch>
<arch name='ppc64'>
--
2.9.4
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On Wed, Aug 23, 2017 at 13:49:41 -0500, Brijesh Singh wrote: > Add a new CPU model called 'EPYC' to model processors from AMD EPYC > family (which includes EPYC 76xx,75xx,74xx, 73xx and 72xx). > > The following features bits have been added/removed compare to Opteron_G5 > > Added: monitor, movbe, rdrand, mmxext, ffxsr, rdtscp, cr8legacy, osvw, > fsgsbase, bmi1, avx2, smep, bmi2, rdseed, adx, smap, clfshopt, sha > xsaveopt, xsavec, xgetbv1, arat > > Removed: xop, fma4, tbm > > The patch is depend on EPYC CPU model supported introduced in qemu [1] > > [1] https://patchwork.kernel.org/patch/9902205/ > > Cc: Tom Lendacky <Thomas.Lendacky@amd.com> > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > --- > src/cpu/cpu_map.xml | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 74 insertions(+) > > diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml > index 8e7ac49..522d66b 100644 > --- a/src/cpu/cpu_map.xml > +++ b/src/cpu/cpu_map.xml > @@ -251,6 +251,9 @@ > <feature name='clflushopt'> > <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x00800000'/> > </feature> > + <feature name='sha_ni'> QEMU calls this feature "sha-ni". > + <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x20000000'/> > + </feature> The CPU features in cpu_map.xml are sorted by CPUID bits, which means this new feature should go between avx512cd and avx512bw. > <feature name='avx512pf'> > <cpuid eax_in='0x07' ecx_in='0x00' ebx='0x04000000'/> > </feature> > @@ -1545,6 +1548,77 @@ > <feature name='xop'/> > <feature name='xsave'/> > </model> > + > + <model name='EPYC'> > + <signature family='23' model='1'/> > + <vendor name='AMD'/> > + <feature name='sse2'/> > + <feature name='sse'/> > + <feature name='fxsr'/> ... We list model's features sorted by name. ACK with the issues fixed. However, it would be nice to add some CPUID data to our test suite. Luckily enough I have such data so I'll just resend [1] a fixed version of this patch with the test data added. Jirka [1] https://www.redhat.com/archives/libvir-list/2017-September/msg00111.html -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list
On Wed, Sep 6, 2017 at 7:08 AM, Jiri Denemark <jdenemar@redhat.com> wrote: .... > > > We list model's features sorted by name. > > ACK with the issues fixed. > > However, it would be nice to add some CPUID data to our test suite. > Luckily enough I have such data so I'll just resend [1] a fixed version > of this patch with the test data added. > > Jirka > > [1] https://www.redhat.com/archives/libvir-list/2017- > September/msg00111.html > > (sending via my gmail account) Somehow I did not receive your this email on my corporate account, I just saw you updated patch. Thank you very much Jirka. Now I need to go and talk to our IT folks to see what is going on. Thanks Brijesh > -- > libvir-list mailing list > libvir-list@redhat.com > https://www.redhat.com/mailman/listinfo/libvir-list > -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list
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