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From: Jiri Denemark <jdenemar@redhat.com>
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Subject: [libvirt] [PATCH 16/17] cpu: Add Skylake-Server-IBRS CPU model
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This is a variant of Skylake-Server with indirect branch prediction
protection. The only difference between Skylake-Server and
Skylake-Server-IBRS is the added "spec-ctrl" feature.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
---
 src/cpu/cpu_map.xml                                | 76 ++++++++++++++++++=
++++
 .../x86_64-cpuid-Xeon-Gold-5115-guest.xml          |  3 +-
 .../x86_64-cpuid-Xeon-Gold-5115-host.xml           |  3 +-
 .../x86_64-cpuid-Xeon-Gold-5115-json.xml           |  3 +-
 4 files changed, 79 insertions(+), 6 deletions(-)

diff --git a/src/cpu/cpu_map.xml b/src/cpu/cpu_map.xml
index ccc01ba0b0..25289d94ed 100644
--- a/src/cpu/cpu_map.xml
+++ b/src/cpu/cpu_map.xml
@@ -1837,6 +1837,82 @@
       <feature name=3D'xsaveopt'/>
     </model>
=20
+    <model name=3D'Skylake-Server-IBRS'>
+      <signature family=3D'6' model=3D'85'/>
+      <vendor name=3D'Intel'/>
+      <feature name=3D'3dnowprefetch'/>
+      <feature name=3D'abm'/>
+      <feature name=3D'adx'/>
+      <feature name=3D'aes'/>
+      <feature name=3D'apic'/>
+      <feature name=3D'arat'/>
+      <feature name=3D'avx'/>
+      <feature name=3D'avx2'/>
+      <feature name=3D'avx512bw'/>
+      <feature name=3D'avx512cd'/>
+      <feature name=3D'avx512dq'/>
+      <feature name=3D'avx512f'/>
+      <feature name=3D'avx512vl'/>
+      <feature name=3D'bmi1'/>
+      <feature name=3D'bmi2'/>
+      <feature name=3D'clflush'/>
+      <feature name=3D'clwb'/>
+      <feature name=3D'cmov'/>
+      <feature name=3D'cx16'/>
+      <feature name=3D'cx8'/>
+      <feature name=3D'de'/>
+      <feature name=3D'erms'/>
+      <feature name=3D'f16c'/>
+      <feature name=3D'fma'/>
+      <feature name=3D'fpu'/>
+      <feature name=3D'fsgsbase'/>
+      <feature name=3D'fxsr'/>
+      <feature name=3D'hle'/>
+      <feature name=3D'invpcid'/>
+      <feature name=3D'lahf_lm'/>
+      <feature name=3D'lm'/>
+      <feature name=3D'mca'/>
+      <feature name=3D'mce'/>
+      <feature name=3D'mmx'/>
+      <feature name=3D'movbe'/>
+      <feature name=3D'mpx'/>
+      <feature name=3D'msr'/>
+      <feature name=3D'mtrr'/>
+      <feature name=3D'nx'/>
+      <feature name=3D'pae'/>
+      <feature name=3D'pat'/>
+      <feature name=3D'pcid'/>
+      <feature name=3D'pclmuldq'/>
+      <feature name=3D'pdpe1gb'/>
+      <feature name=3D'pge'/>
+      <feature name=3D'pni'/>
+      <feature name=3D'popcnt'/>
+      <feature name=3D'pse'/>
+      <feature name=3D'pse36'/>
+      <feature name=3D'rdrand'/>
+      <feature name=3D'rdseed'/>
+      <feature name=3D'rdtscp'/>
+      <feature name=3D'rtm'/>
+      <feature name=3D'sep'/>
+      <feature name=3D'smap'/>
+      <feature name=3D'smep'/>
+      <feature name=3D'spec-ctrl'/>
+      <feature name=3D'sse'/>
+      <feature name=3D'sse2'/>
+      <feature name=3D'sse4.1'/>
+      <feature name=3D'sse4.2'/>
+      <feature name=3D'ssse3'/>
+      <feature name=3D'syscall'/>
+      <feature name=3D'tsc'/>
+      <feature name=3D'tsc-deadline'/>
+      <feature name=3D'vme'/>
+      <feature name=3D'x2apic'/>
+      <feature name=3D'xgetbv1'/>
+      <feature name=3D'xsave'/>
+      <feature name=3D'xsavec'/>
+      <feature name=3D'xsaveopt'/>
+    </model>
+
     <!-- AMD CPUs -->
     <model name=3D'athlon'>
       <vendor name=3D'AMD'/>
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml b/test=
s/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml
index 5a7f3beee8..5f51dea631 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-guest.xml
@@ -1,5 +1,5 @@
 <cpu mode=3D'custom' match=3D'exact'>
-  <model fallback=3D'forbid'>Skylake-Server</model>
+  <model fallback=3D'forbid'>Skylake-Server-IBRS</model>
   <vendor>Intel</vendor>
   <feature policy=3D'require' name=3D'ds'/>
   <feature policy=3D'require' name=3D'acpi'/>
@@ -22,7 +22,6 @@
   <feature policy=3D'require' name=3D'cmt'/>
   <feature policy=3D'require' name=3D'clflushopt'/>
   <feature policy=3D'require' name=3D'pku'/>
-  <feature policy=3D'require' name=3D'spec-ctrl'/>
   <feature policy=3D'require' name=3D'xsaves'/>
   <feature policy=3D'require' name=3D'mbm_total'/>
   <feature policy=3D'require' name=3D'mbm_local'/>
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml b/tests=
/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml
index 15f2fa72d5..a11b31369d 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-host.xml
@@ -1,6 +1,6 @@
 <cpu>
   <arch>x86_64</arch>
-  <model>Skylake-Server</model>
+  <model>Skylake-Server-IBRS</model>
   <vendor>Intel</vendor>
   <feature name=3D'ds'/>
   <feature name=3D'acpi'/>
@@ -23,7 +23,6 @@
   <feature name=3D'cmt'/>
   <feature name=3D'clflushopt'/>
   <feature name=3D'pku'/>
-  <feature name=3D'spec-ctrl'/>
   <feature name=3D'xsaves'/>
   <feature name=3D'mbm_total'/>
   <feature name=3D'mbm_local'/>
diff --git a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml b/tests=
/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml
index 866528c957..7c7e95ce0d 100644
--- a/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Xeon-Gold-5115-json.xml
@@ -1,9 +1,8 @@
 <cpu mode=3D'custom' match=3D'exact'>
-  <model fallback=3D'forbid'>Skylake-Server</model>
+  <model fallback=3D'forbid'>Skylake-Server-IBRS</model>
   <vendor>Intel</vendor>
   <feature policy=3D'require' name=3D'ss'/>
   <feature policy=3D'require' name=3D'hypervisor'/>
   <feature policy=3D'require' name=3D'tsc_adjust'/>
   <feature policy=3D'require' name=3D'clflushopt'/>
-  <feature policy=3D'require' name=3D'spec-ctrl'/>
 </cpu>
--=20
2.15.1

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