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Violators will be prosecuted; Wed, 1 Feb 2017 20:50:04 +1000 Received: from d23relay10.au.ibm.com (d23relay10.au.ibm.com [9.190.26.77]) by d23dlp01.au.ibm.com (Postfix) with ESMTP id 4ACD52CE8046; Wed, 1 Feb 2017 21:50:04 +1100 (EST) Received: from d23av01.au.ibm.com (d23av01.au.ibm.com [9.190.234.96]) by d23relay10.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v11Anubn32309466; Wed, 1 Feb 2017 21:50:04 +1100 Received: from d23av01.au.ibm.com (localhost [127.0.0.1]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v11AnVNm014951; Wed, 1 Feb 2017 21:49:32 +1100 Received: from bharata.in.ibm.com ([9.77.205.252]) by d23av01.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v11AnSb2014611; Wed, 1 Feb 2017 21:49:29 +1100 From: Bharata B Rao To: qemu-devel@nongnu.org Date: Wed, 1 Feb 2017 16:19:06 +0530 X-Mailer: git-send-email 2.7.4 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 17020110-0008-0000-0000-00000105D9CC X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17020110-0009-0000-0000-000008FB7241 Message-Id: <1485946146-21639-1-git-send-email-bharata@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-02-01_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1612050000 definitions=main-1702010106 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v0] softfloat: Add float128_to_uint64_round_to_zero() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, nikunj@linux.vnet.ibm.com, qemu-ppc@nongnu.org, Bharata B Rao , david@gibson.dropbear.id.au, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Implement float128_to_uint64() and use that to implement float128_to_uint64_round_to_zero() This is required by xscvqpudz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao --- fpu/softfloat.c | 65 +++++++++++++++++++++++++++++++++++++++++++++= ++++ include/fpu/softfloat.h | 2 ++ 2 files changed, 67 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index c295f31..49a06c5 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6110,6 +6110,71 @@ int64_t float128_to_int64_round_to_zero(float128 a, = float_status *status) =20 /*------------------------------------------------------------------------= ---- | Returns the result of converting the quadruple-precision floating-point +| value `a' to the 64-bit unsigned integer format. The conversion +| is performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic---which means in particular that the conversion is rounded +| according to the current rounding mode. If `a' is a NaN, the largest +| positive integer is returned. Otherwise, if the conversion overflows, t= he +| largest unsigned integer is returned. If 'a' is negative, the value is +| rounded and zero is returned; negative values that do not round to zero +| will raise the inexact exception. +*-------------------------------------------------------------------------= ---*/ + +uint64_t float128_to_uint64(float128 a, float_status *status) +{ + flag aSign; + int32_t aExp, shiftCount; + uint64_t aSig0, aSig1; + + aSig1 =3D extractFloat128Frac1( a ); + aSig0 =3D extractFloat128Frac0( a ); + aExp =3D extractFloat128Exp( a ); + aSign =3D extractFloat128Sign( a ); + if ( aExp ) aSig0 |=3D LIT64( 0x0001000000000000 ); + shiftCount =3D 0x402F - aExp; + if ( shiftCount <=3D 0 ) { + if ( 0x403E < aExp ) { + float_raise(float_flag_invalid, status); + if ( ! aSign + || ( ( aExp =3D=3D 0x7FFF ) + && ( aSig1 || ( aSig0 !=3D LIT64( 0x0001000000000000= ) ) ) + ) + ) { + return LIT64( 0xFFFFFFFFFFFFFFFF ); + } + return 0; + } + shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); + } + else { + shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1= ); + } + return roundAndPackUint64(aSign, aSig0, aSig1, status); +} + +/*------------------------------------------------------------------------= ---- +| Returns the result of converting the quadruple-precision floating-point +| value `a' to the 64-bit unsigned integer format. The conversion +| is performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic, except that the conversion is always rounded toward zero. +| according to the current rounding mode. If `a' is a NaN, the largest +| positive integer is returned. Otherwise, if the conversion overflows, t= he +| largest unsigned integer is returned. If 'a' is negative, the value is +| rounded and zero is returned; negative values that do not round to zero +| will raise the inexact exception. +*-------------------------------------------------------------------------= ---*/ + +uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status) +{ + signed char current_rounding_mode =3D status->float_rounding_mode; + set_float_rounding_mode(float_round_to_zero, status); + uint64_t v =3D float128_to_uint64(a, status); + set_float_rounding_mode(current_rounding_mode, status); + return v; +} + +/*------------------------------------------------------------------------= ---- +| Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point | Arithmetic. diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 842ec6b..4e99253 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -712,6 +712,8 @@ int32_t float128_to_int32(float128, float_status *statu= s); int32_t float128_to_int32_round_to_zero(float128, float_status *status); int64_t float128_to_int64(float128, float_status *status); int64_t float128_to_int64_round_to_zero(float128, float_status *status); +uint64_t float128_to_uint64(float128, float_status *status); +uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); --=20 2.7.4